From: Andrew Lunn <andrew@lunn.ch>
To: "Voon, Weifeng" <weifeng.voon@intel.com>
Cc: "Sit, Michael Wei Hong" <michael.wei.hong.sit@intel.com>,
"peppe.cavallaro@st.com" <peppe.cavallaro@st.com>,
"alexandre.torgue@st.com" <alexandre.torgue@st.com>,
"joabreu@synopsys.com" <joabreu@synopsys.com>,
"davem@davemloft.net" <davem@davemloft.net>,
"kuba@kernel.org" <kuba@kernel.org>,
"mcoquelin.stm32@gmail.com" <mcoquelin.stm32@gmail.com>,
"linux@armlinux.org.uk" <linux@armlinux.org.uk>,
"Ong, Boon Leong" <boon.leong.ong@intel.com>,
"qiangqing.zhang@nxp.com" <qiangqing.zhang@nxp.com>,
"Wong, Vee Khee" <vee.khee.wong@intel.com>,
"fugang.duan@nxp.com" <fugang.duan@nxp.com>,
"Chuah, Kim Tatt" <kim.tatt.chuah@intel.com>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"linux-stm32@st-md-mailman.stormreply.com"
<linux-stm32@st-md-mailman.stormreply.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"hkallweit1@gmail.com" <hkallweit1@gmail.com>
Subject: Re: [PATCH net-next v2 0/2] Enable 2.5Gbps speed for stmmac
Date: Tue, 6 Apr 2021 22:06:15 +0200 [thread overview]
Message-ID: <YGy/N+cRLGTifJSN@lunn.ch> (raw)
In-Reply-To: <SN6PR11MB313690E7953BF715A8F488D688769@SN6PR11MB3136.namprd11.prod.outlook.com>
> The limitation is not on the MAC, PCS or the PHY. For Intel mgbe, the
> overclocking of 2.5 times clock rate to support 2.5G is only able to be
> configured in the BIOS during boot time. Kernel driver has no access to
> modify the clock rate for 1Gbps/2.5G mode. The way to determined the
> current 1G/2.5G mode is by reading a dedicated adhoc register through mdio bus.
> In short, after the system boot up, it is either in 1G mode or 2.5G mode
> which not able to be changed on the fly.
Right. It would of been a lot easier if this was in the commit message
from the beginning. Please ensure the next version does say this.
> Since the stmmac MAC can pair with any PCS and PHY, I still prefer that we tie
> this platform specific limitation with the of MAC. As stmmac does handle platform
> specific config/limitation.
So yes, this needs to be somewhere in the intel specific stmmac code,
with a nice comment explaining what is going on.
What PHY are you using? The Aquantia/Marvell multi-gige phy can do
rate adaptation. So you could fix the MAC-PHY link to 2500BaseX, and
let the PHY internally handle the different line speeds.
Andrew
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next prev parent reply other threads:[~2021-04-06 20:09 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-05 11:29 [PATCH net-next v2 0/2] Enable 2.5Gbps speed for stmmac Michael Sit Wei Hong
2021-04-05 11:29 ` [PATCH net-next v2 1/2] net: stmmac: enable 2.5Gbps link speed Michael Sit Wei Hong
2021-04-05 11:29 ` [PATCH net-next v2 2/2] net: pcs: configure xpcs 2.5G speed mode Michael Sit Wei Hong
2021-04-05 13:11 ` [PATCH net-next v2 0/2] Enable 2.5Gbps speed for stmmac Andrew Lunn
2021-04-05 14:23 ` Sit, Michael Wei Hong
2021-04-05 14:35 ` Andrew Lunn
2021-04-06 9:05 ` Voon, Weifeng
2021-04-06 20:06 ` Andrew Lunn [this message]
2021-04-07 3:02 ` Voon, Weifeng
2021-04-07 12:44 ` Andrew Lunn
2021-04-07 13:00 ` Russell King - ARM Linux admin
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