From: Abel Vesa <abel.vesa@nxp.com>
To: Dong Aisheng <dongas86@gmail.com>
Cc: Abel Vesa <abelvesa@kernel.org>, Rob Herring <robh@kernel.org>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>, Jacky Bai <ping.bai@nxp.com>,
Dong Aisheng <aisheng.dong@nxp.com>,
NXP Linux Team <linux-imx@nxp.com>,
devicetree <devicetree@vger.kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 2/7] arm64: dts: imx8-ss-lsio: Add mu5a mailbox
Date: Wed, 2 Jun 2021 12:48:17 +0300 [thread overview]
Message-ID: <YLdT4efsABJlXwpt@ryzen.lan> (raw)
In-Reply-To: <CAA+hA=RhJ56aQdndPxopXCeQf9UK1AMrLy0QXAmY8Fs7UJucrg@mail.gmail.com>
On 21-05-18 15:50:51, Dong Aisheng wrote:
> On Tue, May 18, 2021 at 1:14 AM <abelvesa@kernel.org> wrote:
> >
> > From: Abel Vesa <abel.vesa@nxp.com>
> >
> > The mailbox of the lsio mu5a is used by rpmsg on imx8qxp and
> > imx8dxl platforms.
> >
> > Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> > ---
> > arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi | 9 +++++++++
> > 1 file changed, 9 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
> > index ee4e585a9c39..8e3c92c82fac 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
> > @@ -141,6 +141,15 @@ lsio_mu4: mailbox@5d1f0000 {
> > status = "disabled";
> > };
> >
> > + lsio_mu5: mailbox@5d200000 {
> > + compatible = "fsl,imx6sx-mu";
>
> For normal devices node, the compatible string are prefered to be
> defined in soc-ss-xxx.dtsi
> in case to handle HW minus difference. e.g. mu13
>
Moved it to imx8dxl-ss-lsio.dtsi.
>
> > + reg = <0x5d200000 0x10000>;
> > + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> > + #mbox-cells = <2>;
> > + power-domains = <&pd IMX_SC_R_MU_5A>;
> > + };
> > +
> > +
> > lsio_mu13: mailbox@5d280000 {
> > reg = <0x5d280000 0x10000>;
> > interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
> > --
> > 2.31.1
> >
> >
> > _______________________________________________
> > linux-arm-kernel mailing list
> > linux-arm-kernel@lists.infradead.org
> > https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Flists.infradead.org%2Fmailman%2Flistinfo%2Flinux-arm-kernel&data=04%7C01%7Cabel.vesa%40nxp.com%7C868b5c19cea64f7f3e4008d919d1ce23%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637569211161280172%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=z2cyzPRkkbHM8LgNIW97x5iPn%2BOjHlqSUvAaJ6%2BAOck%3D&reserved=0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-06-02 9:50 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-17 17:11 [PATCH 0/7] arm64: dts: freescale: Add i.MX8DXL support abelvesa
2021-05-17 17:11 ` [PATCH 1/7] arm64: dts: freescale: Add the top level dtsi support for imx8dxl abelvesa
2021-05-18 7:35 ` Dong Aisheng
2021-06-02 9:29 ` Abel Vesa
2021-05-17 17:12 ` [PATCH 2/7] arm64: dts: imx8-ss-lsio: Add mu5a mailbox abelvesa
2021-05-18 7:50 ` Dong Aisheng
2021-06-02 9:48 ` Abel Vesa [this message]
2021-05-17 17:12 ` [PATCH 3/7] arm64: dts: freescale: Add adma subsystem dtsi for imx8dxl abelvesa
2021-05-18 7:52 ` Dong Aisheng
2021-06-02 11:28 ` Abel Vesa
2021-05-17 17:12 ` [PATCH 4/7] arm64: dts: freescale: Add the imx8dxl connectivity subsys dtsi abelvesa
2021-05-18 7:53 ` Dong Aisheng
2021-05-17 17:12 ` [PATCH 5/7] arm64: dts: freescale: Add ddr subsys dtsi for imx8dxl abelvesa
2021-05-18 7:54 ` Dong Aisheng
2021-05-17 17:12 ` [PATCH 6/7] arm64: dts: freescale: Add lsio " abelvesa
2021-05-18 7:55 ` Dong Aisheng
2021-05-17 17:12 ` [PATCH 7/7] arm64: dts: imx8dxl: Add i.MX8DXL evk board support abelvesa
2021-05-18 7:57 ` Dong Aisheng
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=YLdT4efsABJlXwpt@ryzen.lan \
--to=abel.vesa@nxp.com \
--cc=abelvesa@kernel.org \
--cc=aisheng.dong@nxp.com \
--cc=devicetree@vger.kernel.org \
--cc=dongas86@gmail.com \
--cc=festevam@gmail.com \
--cc=kernel@pengutronix.de \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-imx@nxp.com \
--cc=linux-kernel@vger.kernel.org \
--cc=ping.bai@nxp.com \
--cc=robh@kernel.org \
--cc=shawnguo@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).