Re: [PATCH v4 7/7] arm64: dts: exynos: Add initial device tree support for Exynos7885 SoC

From: David Virag <virag.david003@gmail.com>
To: Marc Zyngier <maz@kernel.org>
Cc: Sam Protsenko <semen.protsenko@linaro.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
	Rob Herring <robh+dt@kernel.org>,
	 Sylwester Nawrocki <s.nawrocki@samsung.com>,
	Tomasz Figa <tomasz.figa@gmail.com>,
	Chanwoo Choi <cw00.choi@samsung.com>,
	 Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	 linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org,
	 linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org
Subject: Re: [PATCH v4 7/7] arm64: dts: exynos: Add initial device tree support for Exynos7885 SoC
Date: Sun, 19 Dec 2021 15:36:20 +0100	[thread overview]
Message-ID: <cc27e22d9945b1ab5ccc7ef20eb36af63402ef54.camel@gmail.com> (raw)
In-Reply-To: <b0f95b77e335596ee567ae83c1cbe549@misterjones.org>

On Tue, 2021-12-07 at 19:42 +0000, Marc Zyngier wrote:
> On 2021-12-06 15:31, David Virag wrote:
> > Add initial Exynos7885 device tree nodes with dts for the Samsung 
> > Galaxy
> > A8 (2018), a.k.a. "jackpotlte", with model number "SM-A530F".
> > Currently this includes some clock support, UART support, and I2C 
> > nodes.
> > 
> > Signed-off-by: David Virag <virag.david003@gmail.com>
> 
> [...]
> 
> > +       psci {
> > +               compatible = "arm,psci";
> > +               method = "smc";
> > +               cpu_suspend = <0xc4000001>;
> > +               cpu_off = <0x84000002>;
> > +               cpu_on = <0xc4000003>;
> 
> Aren't these the standard PSCI 0.2 function numbers? Can't you
> make the compatible "arm,psci-0.2" instead?

This is not a proper PSCI 0.2 implementation. For example 0.2 has a get
version call which is definitely not implemented properly as after
setting the compatible to 0.2 I get the following:

[    0.000000] psci: PSCIv65535.65535 detected in firmware.

Which is obviously not right.

> 
> > +       };
> > +
> > +       timer {
> > +               compatible = "arm,armv8-timer";
> > +               /* Hypervisor Virtual Timer interrupt is not wired
> > to GIC */
> 
> I don't understand this comment. You seem to have a bunch of
> ARMv8.0 cores, for which there is no such thing as a hypervisor
> virtual timer (this is an ARMv8.1 addition).

My bad, will remove it! Should have read docs better.

> 
> > +               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | 
> > IRQ_TYPE_LEVEL_LOW)>,
> > +                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) |
> > IRQ_TYPE_LEVEL_LOW)>,
> > +                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) |
> > IRQ_TYPE_LEVEL_LOW)>,
> > +                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) |
> > IRQ_TYPE_LEVEL_LOW)>;
> > +       };
> 
> Thanks,
> 
>          M.

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