[PATCH v2 0/4] arm64: dts: imx8mq: Add NWL DSI host controller to Librem 5 Devkit

[PATCH v2 0/4] arm64: dts: imx8mq: Add NWL DSI host controller to Librem 5 Devkit

[Guido Günther]

These patches add the NWL host controller to the imx8mq and make use of it on
the Librem 5 Devkit enabling the built in MIPI DSI LCD panel.

I opted to add imx8mq internal ports and endpoints between nwl and lcdif to the
generic dtsi since those are SOC rather than board specific properties.

Changes from v1
- Add Reviewed-by from Fabio Estevam, thanks!
  https://lore.kernel.org/linux-arm-kernel/CAOMZO5DUA5eS8apZPbte0EcSQ4Vwpg6YLK7D0YdjSUy+kdBu8Q@mail.gmail.com/
  https://lore.kernel.org/linux-arm-kernel/CAOMZO5ANrd2JCmHyxZ0Sv0WNcU9T-q3MbaeADxbOwf+31MQ4LQ@mail.gmail.com/#t
  https://lore.kernel.org/linux-arm-kernel/CAOMZO5Dg5NGpJ0SQkYny04Kv3ky0619J7YwT-0eE1dsK19o1-w@mail.gmail.com/
- As per review comment by Fabio Estevam
  Re-sync DRM related defconfig bits. I didn't resyc the whole defconfig since
  this is pretty much kernel version dependent.

Guido Günther (4):
  arm64: dts: imx8mq: Add NWL MIPI DSI controller
  arm64: dts: imx8mq-librem5-devkit: Enable the LCD panel
  arm64: defconfig: re-sync DRM related defconfig bits
  arm64: defconfig: Enable imx8mq-librem5-devkit display stack

 .../dts/freescale/imx8mq-librem5-devkit.dts   | 33 +++++++++++++
 arch/arm64/boot/dts/freescale/imx8mq.dtsi     | 49 +++++++++++++++++++
 arch/arm64/configs/defconfig                  |  6 ++-
 3 files changed, 87 insertions(+), 1 deletion(-)

-- 
2.26.2


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[PATCH v2 1/4] arm64: dts: imx8mq: Add NWL MIPI DSI controller

[Guido Günther]

Add a node for the Northwest Logic MIPI DSI IP core, "disabled" by
default. This also adds the necessary port to LCDIF.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
---
 arch/arm64/boot/dts/freescale/imx8mq.dtsi | 49 +++++++++++++++++++++++
 1 file changed, 49 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index f70435cf9ad57..e5fa77e1dfe71 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -523,6 +523,12 @@ lcdif: lcd-controller@30320000 {
 						  <&clk IMX8MQ_VIDEO_PLL1_OUT>;
 				assigned-clock-rates = <0>, <0>, <0>, <594000000>;
 				status = "disabled";
+
+				port@0 {
+					lcdif_mipi_dsi: endpoint {
+						remote-endpoint = <&mipi_dsi_lcdif_in>;
+					};
+				};
 			};
 
 			iomuxc: pinctrl@30330000 {
@@ -899,6 +905,49 @@ sec_jr2: jr@3000 {
 				};
 			};
 
+			mipi_dsi: mipi-dsi@30a00000 {
+				compatible = "fsl,imx8mq-nwl-dsi";
+				reg = <0x30a00000 0x300>;
+				clocks = <&clk IMX8MQ_CLK_DSI_CORE>,
+					 <&clk IMX8MQ_CLK_DSI_AHB>,
+					 <&clk IMX8MQ_CLK_DSI_IPG_DIV>,
+					 <&clk IMX8MQ_CLK_DSI_PHY_REF>,
+					 <&clk IMX8MQ_CLK_LCDIF_PIXEL>;
+				clock-names = "core", "rx_esc", "tx_esc", "phy_ref", "lcdif";
+				assigned-clocks = <&clk IMX8MQ_CLK_DSI_AHB>,
+						  <&clk IMX8MQ_CLK_DSI_CORE>,
+						  <&clk IMX8MQ_CLK_DSI_IPG_DIV>;
+				assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>,
+							 <&clk IMX8MQ_SYS1_PLL_266M>;
+				assigned-clock-rates = <80000000>, <266000000>, <20000000>;
+				interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+				mux-controls = <&mux 0>;
+				power-domains = <&pgc_mipi>;
+				phys = <&dphy>;
+				phy-names = "dphy";
+				resets = <&src IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N>,
+					 <&src IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N>,
+					 <&src IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N>,
+					 <&src IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N>;
+				reset-names = "byte", "dpi", "esc", "pclk";
+				status = "disabled";
+
+				ports {
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					port@0 {
+						reg = <0>;
+						#address-cells = <1>;
+						#size-cells = <0>;
+						mipi_dsi_lcdif_in: endpoint@0 {
+							reg = <0>;
+							remote-endpoint = <&lcdif_mipi_dsi>;
+						};
+					};
+				};
+			};
+
 			dphy: dphy@30a00300 {
 				compatible = "fsl,imx8mq-mipi-dphy";
 				reg = <0x30a00300 0x100>;
-- 
2.26.2


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[PATCH v2 2/4] arm64: dts: imx8mq-librem5-devkit: Enable the LCD panel

[Guido Günther]

Enable LCD panel output by adding nodes for the NWL DSI host controller,
the Rocktech panel and the eLCDIF display controller.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
---
 .../dts/freescale/imx8mq-librem5-devkit.dts   | 33 +++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts b/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts
index e7b5c595ceed7..48e22e93a7a74 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts
@@ -830,6 +830,39 @@ MX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9	0x19 /* WWAN_RESET */
 	};
 };
 
+&lcdif {
+	status = "okay";
+};
+
+&mipi_dsi {
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	panel@0 {
+		compatible = "rocktech,jh057n00900";
+		reg = <0>;
+		backlight = <&backlight_dsi>;
+		reset-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
+		iovcc-supply = <&reg_1v8_p>;
+		vcc-supply = <&reg_2v8_p>;
+		port {
+			panel_in: endpoint {
+				remote-endpoint = <&mipi_dsi_out>;
+			};
+		};
+	};
+
+	ports {
+		port@1 {
+			reg = <1>;
+			mipi_dsi_out: endpoint {
+				remote-endpoint = <&panel_in>;
+			};
+		};
+	};
+};
+
 &pgc_gpu {
 	power-supply = <&buck3_reg>;
 };
-- 
2.26.2


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[PATCH v2 3/4] arm64: defconfig: re-sync DRM related defconfig bits

[Guido Günther]

This moves the CONFIG_DRM_SIMPLE_BRIDGE entry around making further
updates simpler.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
---
 arch/arm64/configs/defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index a03cefd587996..21598afdf34fb 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -645,11 +645,11 @@ CONFIG_DRM_MSM=m
 CONFIG_DRM_TEGRA=m
 CONFIG_DRM_PANEL_LVDS=m
 CONFIG_DRM_PANEL_SIMPLE=m
-CONFIG_DRM_SIMPLE_BRIDGE=m
 CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=m
 CONFIG_DRM_DISPLAY_CONNECTOR=m
 CONFIG_DRM_LONTIUM_LT9611=m
 CONFIG_DRM_SII902X=m
+CONFIG_DRM_SIMPLE_BRIDGE=m
 CONFIG_DRM_THINE_THC63LVD1024=m
 CONFIG_DRM_TI_SN65DSI86=m
 CONFIG_DRM_I2C_ADV7511=m
-- 
2.26.2


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[PATCH v2 4/4] arm64: defconfig: Enable imx8mq-librem5-devkit display stack

[Guido Günther]

Enable the panel, NWL DSI host controller and dphy. This
also needs the reset controller.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
---
 arch/arm64/configs/defconfig | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 21598afdf34fb..a9a37075cd367 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -645,9 +645,11 @@ CONFIG_DRM_MSM=m
 CONFIG_DRM_TEGRA=m
 CONFIG_DRM_PANEL_LVDS=m
 CONFIG_DRM_PANEL_SIMPLE=m
+CONFIG_DRM_PANEL_SITRONIX_ST7703=m
 CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=m
 CONFIG_DRM_DISPLAY_CONNECTOR=m
 CONFIG_DRM_LONTIUM_LT9611=m
+CONFIG_DRM_NWL_MIPI_DSI=m
 CONFIG_DRM_SII902X=m
 CONFIG_DRM_SIMPLE_BRIDGE=m
 CONFIG_DRM_THINE_THC63LVD1024=m
@@ -943,11 +945,13 @@ CONFIG_PWM_SAMSUNG=y
 CONFIG_PWM_SUN4I=m
 CONFIG_PWM_TEGRA=m
 CONFIG_QCOM_PDC=y
+CONFIG_RESET_IMX7=y
 CONFIG_RESET_QCOM_AOSS=y
 CONFIG_RESET_QCOM_PDC=m
 CONFIG_RESET_TI_SCI=y
 CONFIG_PHY_XGENE=y
 CONFIG_PHY_SUN4I_USB=y
+CONFIG_PHY_MIXEL_MIPI_DPHY=m
 CONFIG_PHY_HI6220_USB=y
 CONFIG_PHY_HISTB_COMBPHY=y
 CONFIG_PHY_HISI_INNO_USB2=y
-- 
2.26.2


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Re: [PATCH v2 1/4] arm64: dts: imx8mq: Add NWL MIPI DSI controller

[Martin Kepplinger]

On 20.08.20 10:50, Guido Günther wrote:
> Add a node for the Northwest Logic MIPI DSI IP core, "disabled" by
> default. This also adds the necessary port to LCDIF.
> 
> Signed-off-by: Guido Günther <agx@sigxcpu.org>
> Reviewed-by: Fabio Estevam <festevam@gmail.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8mq.dtsi | 49 +++++++++++++++++++++++
>  1 file changed, 49 insertions(+)

Hi Guido,

Tested-by: Martin Kepplinger <martin.kepplinger@puri.sm>

on the librem5 devkit.

thanks,
                              martin

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Re: [PATCH v2 1/4] arm64: dts: imx8mq: Add NWL MIPI DSI controller

[Martin Kepplinger]

On 20.08.20 10:50, Guido Günther wrote:
> Add a node for the Northwest Logic MIPI DSI IP core, "disabled" by
> default. This also adds the necessary port to LCDIF.
> 
> Signed-off-by: Guido Günther <agx@sigxcpu.org>
> Reviewed-by: Fabio Estevam <festevam@gmail.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8mq.dtsi | 49 +++++++++++++++++++++++
>  1 file changed, 49 insertions(+)

Hi Guido,

Tested-by: Martin Kepplinger <martin.kepplinger@puri.sm>

on the librem5 devkit.

thanks,
                              martin

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Re: [PATCH v2 2/4] arm64: dts: imx8mq-librem5-devkit: Enable the LCD panel

[Martin Kepplinger]

On 20.08.20 10:50, Guido Günther wrote:
> Enable LCD panel output by adding nodes for the NWL DSI host controller,
> the Rocktech panel and the eLCDIF display controller.
> 
> Signed-off-by: Guido Günther <agx@sigxcpu.org>
> Reviewed-by: Fabio Estevam <festevam@gmail.com>
> ---
>  .../dts/freescale/imx8mq-librem5-devkit.dts   | 33 +++++++++++++++++++
>  1 file changed, 33 insertions(+)
> 


Hi Guido,

Tested-by: Martin Kepplinger <martin.kepplinger@puri.sm>

thanks,
                              martin

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Re: [PATCH v2 1/4] arm64: dts: imx8mq: Add NWL MIPI DSI controller

[Shawn Guo]

On Thu, Aug 20, 2020 at 10:50:56AM +0200, Guido Günther wrote:
> Add a node for the Northwest Logic MIPI DSI IP core, "disabled" by
> default. This also adds the necessary port to LCDIF.
> 
> Signed-off-by: Guido Günther <agx@sigxcpu.org>
> Reviewed-by: Fabio Estevam <festevam@gmail.com>

Applied, thanks.

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Re: [PATCH v2 2/4] arm64: dts: imx8mq-librem5-devkit: Enable the LCD panel

[Shawn Guo]

On Thu, Aug 20, 2020 at 10:50:57AM +0200, Guido Günther wrote:
> Enable LCD panel output by adding nodes for the NWL DSI host controller,
> the Rocktech panel and the eLCDIF display controller.
> 
> Signed-off-by: Guido Günther <agx@sigxcpu.org>
> Reviewed-by: Fabio Estevam <festevam@gmail.com>

Applied, thanks.

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Re: [PATCH v2 3/4] arm64: defconfig: re-sync DRM related defconfig bits

[Shawn Guo]

On Thu, Aug 20, 2020 at 10:50:58AM +0200, Guido Günther wrote:
> This moves the CONFIG_DRM_SIMPLE_BRIDGE entry around making further
> updates simpler.
> 
> Signed-off-by: Guido Günther <agx@sigxcpu.org>

Patch #3 and #4 do not apply to my branch.

Shawn

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Re: [PATCH v2 3/4] arm64: defconfig: re-sync DRM related defconfig bits

[Guido Günther]

Hi,
On Sun, Aug 23, 2020 at 10:56:22AM +0800, Shawn Guo wrote:
> On Thu, Aug 20, 2020 at 10:50:58AM +0200, Guido Günther wrote:
> > This moves the CONFIG_DRM_SIMPLE_BRIDGE entry around making further
> > updates simpler.
> > 
> > Signed-off-by: Guido Günther <agx@sigxcpu.org>
> 
> Patch #3 and #4 do not apply to my branch.

Thanks for applying the other two already! I've rebased these against

  https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git/log/?h=imx/defconfig

in v4:

  https://lore.kernel.org/linux-devicetree/cover.1598166983.git.agx@sigxcpu.org/T/#t  

Cheers,
 -- Guido


> 
> Shawn
> 

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