From: Joseph Lo <josephl@nvidia.com>
To: Jon Hunter <jonathanh@nvidia.com>,
Thierry Reding <thierry.reding@gmail.com>
Cc: linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 4/6] arm64: dts: tegra210: add CPU idle states properties
Date: Fri, 25 Jan 2019 11:58:09 +0800 [thread overview]
Message-ID: <dc12f759-d324-c696-26bc-30fde9c3a0b7@nvidia.com> (raw)
In-Reply-To: <ef99309d-4c03-0c9e-16f0-055059a355d4@nvidia.com>
On 1/24/19 7:21 PM, Jon Hunter wrote:
>
> On 07/01/2019 03:28, Joseph Lo wrote:
>> Add idle states properties for generic ARM CPU idle driver. This
>> includes a C7 state which is the power down state of CPU cores.
>>
>> Signed-off-by: Joseph Lo <josephl@nvidia.com>
>> ---
>> Note:
>> This dt patch depends on the DT changes in below series.
>> http://patchwork.ozlabs.org/project/linux-tegra/list/?series=84380
>> ---
>> arch/arm64/boot/dts/nvidia/tegra210.dtsi | 17 +++++++++++++++++
>> 1 file changed, 17 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
>> index 143bd103c923..b583d3065946 100644
>> --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
>> +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
>> @@ -1308,24 +1308,41 @@
>> <&dfll>;
>> clock-names = "cpu_g", "pll_x", "pll_p", "dfll";
>> clock-latency = <300000>;
>> + cpu-idle-states = <&C7>;
>> };
>>
>> cpu@1 {
>> device_type = "cpu";
>> compatible = "arm,cortex-a57";
>> reg = <1>;
>> + cpu-idle-states = <&C7>;
>> };
>>
>> cpu@2 {
>> device_type = "cpu";
>> compatible = "arm,cortex-a57";
>> reg = <2>;
>> + cpu-idle-states = <&C7>;
>> };
>>
>> cpu@3 {
>> device_type = "cpu";
>> compatible = "arm,cortex-a57";
>> reg = <3>;
>> + cpu-idle-states = <&C7>;
>> + };
>> +
>> + idle-states {
>> + entry-method = "psci";
>> +
>> + C7: c7 {
>> + compatible = "arm,idle-state";
>> + arm,psci-suspend-param = <0x40000007>;
>> + wakeup-latency-us = <130>;
>> + min-residency-us = <1000>;
>> + idle-state-name = "c7-cpu-powergated";
>> + status = "disabled";
>> + };
>> };
>> };
>
> The binding doc says that both 'entry-latency-us' and 'exit-latency-us'
> properties are required. Are we able to populate these?
>
Indeed, will fix that.
Thanks,
Joseph
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next prev parent reply other threads:[~2019-01-25 3:58 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-07 3:28 [PATCH 0/6] Add CPUidle support for Tegra210 Joseph Lo
2019-01-07 3:28 ` [PATCH 1/6] dt-bindings: timer: add Tegra210 timer Joseph Lo
2019-01-11 22:21 ` Rob Herring
2019-01-24 10:30 ` Jon Hunter
2019-01-25 3:23 ` Joseph Lo
2019-01-25 12:01 ` Jon Hunter
2019-01-25 12:06 ` Jon Hunter
2019-01-28 3:09 ` Joseph Lo
2019-01-07 3:28 ` [PATCH 2/6] clocksource: tegra: add Tegra210 timer driver Joseph Lo
2019-01-24 11:09 ` Jon Hunter
2019-01-25 4:12 ` Joseph Lo
2019-01-07 3:28 ` [PATCH 3/6] arm64: dts: tegra210: fix timer node Joseph Lo
2019-01-24 11:16 ` Jon Hunter
2019-01-25 3:56 ` Joseph Lo
2019-01-07 3:28 ` [PATCH 4/6] arm64: dts: tegra210: add CPU idle states properties Joseph Lo
2019-01-24 11:21 ` Jon Hunter
2019-01-25 3:58 ` Joseph Lo [this message]
2019-01-07 3:28 ` [PATCH 5/6] arm64: dts: tegra210-p2180: Enable CPU idle support Joseph Lo
2019-01-07 3:28 ` [PATCH 6/6] arm64: dts: tegra210-smaug: " Joseph Lo
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