linux-arm-kernel.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
From: "liuqi (BA)" <liuqi115@huawei.com>
To: Qi Liu <liuqi115@huawei.com>, <will@kernel.org>, <mark.rutland@arm.com>
Cc: <linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <zhangshaokun@hisilicon.com>,
	Linuxarm <linuxarm@huawei.com>, <mingo@redhat.com>,
	<acme@kernel.org>, <linux-perf-users@vger.kernel.org>,
	<peterz@infradead.org>
Subject: Re: [PATCH 2/2] perf jevents: Add support for HiSilicon CPA PMU aliasing
Date: Tue, 15 Feb 2022 09:23:20 +0800	[thread overview]
Message-ID: <e8360562-4e09-c2ed-9584-054a0b3d01bf@huawei.com> (raw)
In-Reply-To: <20220214114228.40859-3-liuqi115@huawei.com>



+CC perf tool list and maintainers.

Qi

On 2022/2/14 19:42, Qi Liu wrote:
> Add support for HiSilicon CPA PMU aliasing.
> 
> The kernel driver is in drivers/perf/hisilicon/hisi_uncore_cpa_pmu.c
> 
> Signed-off-by: Qi Liu <liuqi115@huawei.com>
> ---
>   .../arm64/hisilicon/hip09/sys/uncore-cpa.json | 81 +++++++++++++++++++
>   tools/perf/pmu-events/jevents.c               |  1 +
>   2 files changed, 82 insertions(+)
>   create mode 100644 tools/perf/pmu-events/arch/arm64/hisilicon/hip09/sys/uncore-cpa.json
> 
> diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip09/sys/uncore-cpa.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip09/sys/uncore-cpa.json
> new file mode 100644
> index 000000000000..35c90da7f54b
> --- /dev/null
> +++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip09/sys/uncore-cpa.json
> @@ -0,0 +1,81 @@
> +[
> +	{
> +		"ConfigCode": "0x00",
> +		"EventName": "cpa_cycles",
> +		"BriefDescription": "count of CPA cycles",
> +		"Compat": "0x00000030",
> +		"Unit": "hisi_sicl,cpa"
> +	},
> +	{
> +		"ConfigCode": "0x61",
> +		"EventName": "p1_wr_dat",
> +		"BriefDescription": "Number of write ops transmitted by the P1 port",
> +		"Compat": "0x00000030",
> +		"Unit": "hisi_sicl,cpa"
> +	},
> +	{
> +		"ConfigCode": "0x62",
> +		"EventName": "p1_rd_dat",
> +		"BriefDescription": "Number of read ops transmitted by the P1 port",
> +		"Compat": "0x00000030",
> +		"Unit": "hisi_sicl,cpa"
> +	},
> +	{
> +		"ConfigCode": "0x3",
> +		"EventName": "p1_rd_dat_64b",
> +		"BriefDescription": "Number of read ops transmitted by the P1 port which size is 64 bytes",
> +		"Compat": "0x00000030",
> +		"Unit": "hisi_sicl,cpa"
> +	},
> +	{
> +		"ConfigCode": "0x4",
> +		"EventName": "p1_rd_dat_32b",
> +		"BriefDescription": "Number of read ops transmitted by the P1 port which size is 32 bytes",
> +		"Compat": "0x00000030",
> +		"Unit": "hisi_sicl,cpa"
> +	},
> +	{
> +		"ConfigCode": "0xE1",
> +		"EventName": "p0_wr_dat",
> +		"BriefDescription": "Number of write ops transmitted by the P0 port",
> +		"Compat": "0x00000030",
> +		"Unit": "hisi_sicl,cpa"
> +	},
> +	{
> +		"ConfigCode": "0xE2",
> +		"EventName": "p0_rd_dat",
> +		"BriefDescription": "Number of read ops transmitted by the P0 port",
> +		"Compat": "0x00000030",
> +		"Unit": "hisi_sicl,cpa"
> +	},
> +	{
> +		"ConfigCode": "0x83",
> +		"EventName": "p0_rd_dat_64b",
> +		"BriefDescription": "Number of read ops transmitted by the P0 port which size is 64 bytes",
> +		"Compat": "0x00000030",
> +		"Unit": "hisi_sicl,cpa"
> +	},
> +	{
> +		"ConfigCode": "0x84",
> +		"EventName": "p0_rd_dat_32b",
> +		"BriefDescription": "Number of read ops transmitted by the P0 port which size is 32 bytes",
> +		"Compat": "0x00000030",
> +		"Unit": "hisi_sicl,cpa"
> +	},
> +	{
> +		"MetricExpr": "(p1_wr_dat * 64 + p1_rd_dat_64b * 64 + p1_rd_dat_32b * 32) / cpa_cycles",
> +		"BriefDescription": "Average bandwidth of CPA Port 1",
> +		"MetricGroup": "CPA",
> +		"MetricName": "p1_avg_bw",
> +		"Compat": "0x00000030",
> +		"Unit": "hisi_sicl,cpa"
> +	},
> +	{
> +		"MetricExpr": "(p0_wr_dat * 64 + p0_rd_dat_64b * 64 + p0_rd_dat_32b * 32) / cpa_cycles",
> +		"BriefDescription": "Average bandwidth of CPA Port 0",
> +		"MetricGroup": "CPA",
> +		"MetricName": "p0_avg_bw",
> +		"Compat": "0x00000030",
> +		"Unit": "hisi_sicl,cpa"
> +	}
> +]
> diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c
> index 1a57c3f81dd4..159d9eab6e79 100644
> --- a/tools/perf/pmu-events/jevents.c
> +++ b/tools/perf/pmu-events/jevents.c
> @@ -277,6 +277,7 @@ static struct map {
>   	{ "CPU-M-CF", "cpum_cf" },
>   	{ "CPU-M-SF", "cpum_sf" },
>   	{ "UPI LL", "uncore_upi" },
> +	{ "hisi_sicl,cpa", "hisi_sicl,cpa"},
>   	{ "hisi_sccl,ddrc", "hisi_sccl,ddrc" },
>   	{ "hisi_sccl,hha", "hisi_sccl,hha" },
>   	{ "hisi_sccl,l3c", "hisi_sccl,l3c" },
> 

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

      parent reply	other threads:[~2022-02-15  1:24 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-14 11:42 [PATCH 0/2] Add Support for HiSilicon CPA PMU Qi Liu
2022-02-14 11:42 ` [PATCH 1/2] drivers/perf: hisi: Add Support for " Qi Liu
2022-02-15 10:47   ` John Garry
2022-02-16  3:16     ` liuqi (BA)
2022-02-17 18:11       ` John Garry
2022-02-18  8:07         ` liuqi (BA)
2022-02-14 11:42 ` [PATCH 2/2] perf jevents: Add support for HiSilicon CPA PMU aliasing Qi Liu
2022-02-14 12:04   ` John Garry
2022-02-15  1:27     ` liuqi (BA)
2022-02-15  1:23   ` liuqi (BA) [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=e8360562-4e09-c2ed-9584-054a0b3d01bf@huawei.com \
    --to=liuqi115@huawei.com \
    --cc=acme@kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-perf-users@vger.kernel.org \
    --cc=linuxarm@huawei.com \
    --cc=mark.rutland@arm.com \
    --cc=mingo@redhat.com \
    --cc=peterz@infradead.org \
    --cc=will@kernel.org \
    --cc=zhangshaokun@hisilicon.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).