From: Maxime Ripard <maxime.ripard@bootlin.com>
To: Mark Rutland <mark.rutland@arm.com>,
Rob Herring <robh+dt@kernel.org>,
Frank Rowand <frowand.list@gmail.com>,
Chen-Yu Tsai <wens@csie.org>,
Maxime Ripard <maxime.ripard@bootlin.com>
Cc: devicetree@vger.kernel.org,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Arnd Bergmann <arnd@arndb.de>,
dri-devel@lists.freedesktop.org,
Georgi Djakov <georgi.djakov@linaro.org>,
Paul Kocialkowski <paul.kocialkowski@bootlin.com>,
Yong Deng <yong.deng@magewell.com>,
Robin Murphy <robin.murphy@arm.com>,
Dave Martin <dave.martin@arm.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 7/7] ARM: dts: sun5i: Add the MBUS controller
Date: Mon, 11 Feb 2019 16:02:55 +0100 [thread overview]
Message-ID: <edf5e68d0dbb25877d2867554a5a19de1bf01236.1549897336.git-series.maxime.ripard@bootlin.com> (raw)
In-Reply-To: <cover.f2e5fbb4d21384168973fa32377a33d627768146.1549897336.git-series.maxime.ripard@bootlin.com>
The MBUS (and its associated controller) is the bus in the Allwinner SoCs
that DMA devices use in the system to access the memory.
Among other things (and depending on the SoC generation), it can also
enforce priorities or report bandwidth usages on a per-master basis.
One of the most notable thing is that instead of having the same mapping
for the RAM than the CPU, it maps it at address 0, which means we'll have
to do address translation thanks to the dma-ranges property.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
---
arch/arm/boot/dts/sun5i.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi
index 5497d985c54a..a29203b7661d 100644
--- a/arch/arm/boot/dts/sun5i.dtsi
+++ b/arch/arm/boot/dts/sun5i.dtsi
@@ -127,6 +127,7 @@
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
+ dma-ranges;
ranges;
system-control@1c00000 {
@@ -181,6 +182,14 @@
};
};
+ mbus: dram-controller@1c01000 {
+ compatible = "allwinner,sun5i-a13-mbus";
+ reg = <0x01c01000 0x1000>;
+ clocks = <&ccu CLK_MBUS>;
+ dma-ranges = <0x00000000 0x40000000 0x20000000>;
+ #interconnect-cells = <1>;
+ };
+
dma: dma-controller@1c02000 {
compatible = "allwinner,sun4i-a10-dma";
reg = <0x01c02000 0x1000>;
@@ -727,6 +736,8 @@
clock-names = "ahb", "mod",
"ram";
resets = <&ccu RST_DE_FE>;
+ interconnects = <&mbus 19>;
+ interconnect-names = "dma";
status = "disabled";
ports {
@@ -755,6 +766,8 @@
clock-names = "ahb", "mod",
"ram";
resets = <&ccu RST_DE_BE>;
+ interconnects = <&mbus 18>;
+ interconnect-names = "dma";
status = "disabled";
assigned-clocks = <&ccu CLK_DE_BE>;
--
git-series 0.9.1
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prev parent reply other threads:[~2019-02-11 15:06 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-11 15:02 [PATCH v3 0/7] sunxi: Add DT representation for the MBUS controller Maxime Ripard
2019-02-11 15:02 ` [PATCH v3 1/7] dt-bindings: interconnect: Add a dma interconnect name Maxime Ripard
2019-03-01 17:48 ` Georgi Djakov
2019-03-05 15:53 ` Maxime Ripard
2019-03-05 16:14 ` Robin Murphy
2019-03-07 15:15 ` Georgi Djakov
2019-03-07 15:47 ` Maxime Ripard
2019-03-07 16:09 ` Chen-Yu Tsai
2019-03-11 10:11 ` Maxime Ripard
2019-03-11 14:11 ` Chen-Yu Tsai
2019-03-13 11:48 ` Georgi Djakov
2019-02-11 15:02 ` [PATCH v3 2/7] dt-bindings: bus: Add binding for the Allwinner MBUS controller Maxime Ripard
2019-02-12 18:53 ` Robin Murphy
2019-02-11 15:02 ` [PATCH v3 3/7] of: address: Add parent pointer to the __of_translate_address args Maxime Ripard
2019-02-12 18:02 ` Robin Murphy
2019-02-11 15:02 ` [PATCH v3 4/7] of: address: Add support for the parent DMA bus Maxime Ripard
2019-02-12 18:15 ` Robin Murphy
2019-02-11 15:02 ` [PATCH v3 5/7] drm/sun4i: Rely on dma interconnect for our RAM offset Maxime Ripard
2019-02-12 18:46 ` Robin Murphy
2019-02-13 15:41 ` Maxime Ripard
2019-02-13 16:40 ` Robin Murphy
2019-02-19 10:55 ` Maxime Ripard
2019-03-05 16:11 ` Robin Murphy
2019-02-11 15:02 ` [PATCH v3 6/7] clk: sunxi-ng: sun5i: Export the MBUS clock Maxime Ripard
2019-02-11 15:02 ` Maxime Ripard [this message]
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