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From: varada@codeaurora.org (Varadarajan Narayanan)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 1/5] pinctrl: qcom: Add ipq8074 pinctrl driver
Date: Thu, 18 May 2017 14:09:26 +0530	[thread overview]
Message-ID: <f5a3da8b-c3a4-3cb3-9f5f-0cbdb87688ed@codeaurora.org> (raw)
In-Reply-To: <20170517193315.GF12920@tuxbook>



On 5/18/2017 1:03 AM, Bjorn Andersson wrote:
> On Mon 15 May 02:05 PDT 2017, Varadarajan Narayanan wrote:
> 
>> On 5/14/2017 9:53 AM, Bjorn Andersson wrote:
>>> On Thu 11 May 03:33 PDT 2017, Varadarajan Narayanan wrote:
>>>
>>>> On 5/11/2017 4:13 AM, Bjorn Andersson wrote:
>>>>> On Thu 04 May 04:53 PDT 2017, Varadarajan Narayanan wrote:
> [..]
>>>>>> +	msm_mux_qpic_pad4,
>>>>>
>>>>> What are qpic_pad and qpic_pad0 through qpic_pad8? Different functions,
>>>>> alternative muxings...?
>>>>
>>>> This is for the NAND and LCD display. The pins listed are the 9 data pins.
>>>>
>>>
>>> Then you can describe them all as "qpic_pad" (or simply "qpic"?). (It's
>>> possible to reference a partial group in the DTS, if that's necessary)
>>
>> There are two sets of 9 pins, either of which can go to NAND or LCD.
>> Will rename qpic_pad as qpic_a and qpic_pad[0-8] as qpic_b.
>> Is that ok?
>>
> 
> So you have NAND and LCD hardware muxed to either "a" or "b" and then
> you mux either "a" or "b" out onto actual pins?
> 
> How is this first mux configured?
> 
> I think the a/b scheme sounds reasonable, if above is how it works.

Sorry, I was wrong. I had misread the documentation.

There are 18 pins. 15 pins are common between LCD and NAND. The QPIC 
controller arbitrates between LCD and NAND. Of the remaining 4, 2 are 
for NAND and 2 are for LCD exclusively. We plan to group the qpic pins 
into 3 groups namely, qpic_common, qpic_nand and qpic_lcd. Is that ok?

Thanks
Varada

> 
> Regards,
> Bjorn
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> 

-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora 
Forum, a Linux Foundation Collaborative Project

  reply	other threads:[~2017-05-18  8:39 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-04 11:53 [PATCH v2 0/5] Add minimal boot support for IPQ8074 Varadarajan Narayanan
2017-05-04 11:53 ` [PATCH v2 1/5] pinctrl: qcom: Add ipq8074 pinctrl driver Varadarajan Narayanan
2017-05-08  5:49   ` Varadarajan Narayanan
2017-05-08 16:38   ` Rob Herring
2017-05-10 22:43   ` Bjorn Andersson
2017-05-11 10:33     ` Varadarajan Narayanan
2017-05-14  4:23       ` Bjorn Andersson
2017-05-15  9:05         ` Varadarajan Narayanan
2017-05-15 11:24           ` Varadarajan Narayanan
2017-05-17 19:47             ` Bjorn Andersson
2017-05-18  8:37               ` Varadarajan Narayanan
2017-05-17 19:33           ` Bjorn Andersson
2017-05-18  8:39             ` Varadarajan Narayanan [this message]
2017-05-20  5:54               ` Bjorn Andersson
2017-05-23  9:26                 ` Linus Walleij
2017-05-04 11:53 ` [PATCH v2 2/5] dt-bindings: qcom: Add IPQ8074 bindings Varadarajan Narayanan
2017-05-08 16:38   ` Rob Herring
2017-05-04 11:53 ` [PATCH v2 3/5] clk: qcom: ipq8074: Add Global Clock Controller support Varadarajan Narayanan
2017-05-08 16:40   ` Rob Herring
2017-05-04 11:54 ` [PATCH v2 4/5] arm64: dts: Add ipq8074 SoC and HK01 board support Varadarajan Narayanan
2017-05-04 11:54 ` [PATCH v2 5/5] arm64: defconfig: Enable QCOM IPQ8074 clock and pinctrl Varadarajan Narayanan

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