From: Alexandru Elisei <alexandru.elisei@arm.com>
To: Andre Przywara <andre.przywara@arm.com>,
Andrew Jones <drjones@redhat.com>,
Paolo Bonzini <pbonzini@redhat.com>
Cc: Marc Zyngier <maz@kernel.org>,
kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org
Subject: Re: [kvm-unit-tests PATCH 08/17] arm: gic: Add simple SPI MP test
Date: Tue, 12 Nov 2019 15:41:56 +0000 [thread overview]
Message-ID: <f7f11075-4313-dfc7-2e70-07c37fb61531@arm.com> (raw)
In-Reply-To: <20191108144240.204202-9-andre.przywara@arm.com>
Hi,
What does MP stand for in the subject? Multi-processor? I think changing it to SMP
makes more sense, as that is also in the test name that you've added.
On 11/8/19 2:42 PM, Andre Przywara wrote:
> Shared Peripheral Interrupts (SPI) can target a specific CPU. Test this
> feature by routing the test SPI to each of the vCPUs, then triggering it
> and confirm its reception on that requested core.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> arm/gic.c | 31 ++++++++++++++++++++++++++++++-
> 1 file changed, 30 insertions(+), 1 deletion(-)
>
> diff --git a/arm/gic.c b/arm/gic.c
> index 63aa9f4..304b7b9 100644
> --- a/arm/gic.c
> +++ b/arm/gic.c
> @@ -620,16 +620,45 @@ static void spi_test_single(void)
> check_acked("now enabled SPI fires", &cpumask);
> }
>
> +static void spi_test_smp(void)
> +{
> + int cpu;
> + int cores = 1;
> +
> + wait_on_ready();
> + for_each_present_cpu(cpu) {
> + if (cpu == smp_processor_id())
> + continue;
> + spi_configure_irq(SPI_IRQ, cpu);
> + if (trigger_and_check_spi(NULL, IRQ_STAT_IRQ, cpu))
> + cores++;
> + else
> + report_info("SPI delivery failed on core %d", cpu);
> + }
> + report("SPI delievered on all cores", cores == nr_cpus);
> +}
> +
> static void spi_send(void)
> {
> irqs_enable();
>
> spi_test_single();
>
> + if (nr_cpus > 1)
> + spi_test_smp();
> +
> check_spurious();
> exit(report_summary());
> }
>
> +static void spi_test(void *data __unused)
> +{
> + if (smp_processor_id() == 0)
> + spi_send();
> + else
> + irq_recv();
> +}
> +
> int main(int argc, char **argv)
> {
> if (!gic_init()) {
> @@ -663,7 +692,7 @@ int main(int argc, char **argv)
> report_prefix_pop();
> } else if (strcmp(argv[1], "irq") == 0) {
> report_prefix_push(argv[1]);
> - spi_send();
> + on_cpus(spi_test, NULL);
This is a bit strange. You call on_cpus here, which means you assume that you have
more than one CPU, but then you check if you have more than one CPU in spi_send,
which gets executed on CPU 0.
How about this instead (compile tested only):
diff --git a/arm/gic.c b/arm/gic.c
index 63aa9f4a9fda..7d2443b06ffa 100644
--- a/arm/gic.c
+++ b/arm/gic.c
@@ -620,12 +620,42 @@ static void spi_test_single(void)
check_acked("now enabled SPI fires", &cpumask);
}
-static void spi_send(void)
+static void spi_test_smp(void)
{
- irqs_enable();
+ int cpu;
+ int cores = 1;
+
+ for_each_present_cpu(cpu) {
+ if (cpu == smp_processor_id())
+ continue;
+ smp_boot_secondary(cpu, irq_recv);
+ }
+ wait_on_ready();
+ for_each_present_cpu(cpu) {
+ if (cpu == smp_processor_id())
+ continue;
+ spi_configure_irq(SPI_IRQ, cpu);
+ if (trigger_and_check_spi(NULL, IRQ_STAT_IRQ, cpu))
+ cores++;
+ else
+ report_info("SPI delivery failed on core %d", cpu);
+ }
+ report("SPI delievered on all cores", cores == nr_cpus);
+}
+
+static void spi_test(void)
+{
+ irqs_enable();
spi_test_single();
+ if (nr_cpus == 1) {
+ report_skip("At least 2 cpus required to run the SPI SMP test");
+ goto out;
+ }
+
+ spi_test_smp();
+out:
check_spurious();
exit(report_summary());
}
@@ -663,7 +693,7 @@ int main(int argc, char **argv)
report_prefix_pop();
} else if (strcmp(argv[1], "irq") == 0) {
report_prefix_push(argv[1]);
- spi_send();
+ spi_test();
report_prefix_pop();
} else {
report_abort("Unknown subtest '%s'", argv[1]);
What do you think?
Thanks,
Alex
> report_prefix_pop();
> } else {
> report_abort("Unknown subtest '%s'", argv[1]);
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-11-12 15:42 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-08 14:42 [kvm-unit-tests PATCH 00/17] arm: gic: Test SPIs and interrupt groups Andre Przywara
2019-11-08 14:42 ` [kvm-unit-tests PATCH 01/17] arm: gic: Enable GIC MMIO tests for GICv3 as well Andre Przywara
2019-11-08 17:28 ` Alexandru Elisei
2019-11-12 12:49 ` Auger Eric
2019-11-08 14:42 ` [kvm-unit-tests PATCH 02/17] arm: gic: Generalise function names Andre Przywara
2019-11-12 11:11 ` Alexandru Elisei
2019-11-12 12:49 ` Auger Eric
2019-11-08 14:42 ` [kvm-unit-tests PATCH 03/17] arm: gic: Provide per-IRQ helper functions Andre Przywara
2019-11-12 12:51 ` Alexandru Elisei
2019-11-12 15:53 ` Auger Eric
2019-11-12 16:53 ` Alexandru Elisei
2019-11-12 13:49 ` Auger Eric
2019-11-08 14:42 ` [kvm-unit-tests PATCH 04/17] arm: gic: Support no IRQs test case Andre Przywara
2019-11-12 13:26 ` Alexandru Elisei
2019-11-12 21:14 ` Auger Eric
2019-11-08 14:42 ` [kvm-unit-tests PATCH 05/17] arm: gic: Prepare IRQ handler for handling SPIs Andre Przywara
2019-11-12 13:36 ` Alexandru Elisei
2019-11-12 20:56 ` Auger Eric
2019-11-08 14:42 ` [kvm-unit-tests PATCH 06/17] arm: gic: Add simple shared IRQ test Andre Przywara
2019-11-12 13:54 ` Alexandru Elisei
2019-11-08 14:42 ` [kvm-unit-tests PATCH 07/17] arm: gic: Extend check_acked() to allow silent call Andre Przywara
2019-11-12 15:23 ` Alexandru Elisei
2019-11-14 12:32 ` Andrew Jones
2019-11-15 11:32 ` Alexandru Elisei
2019-11-08 14:42 ` [kvm-unit-tests PATCH 08/17] arm: gic: Add simple SPI MP test Andre Przywara
2019-11-12 15:41 ` Alexandru Elisei [this message]
2019-11-08 14:42 ` [kvm-unit-tests PATCH 09/17] arm: gic: Add test for flipping GICD_CTLR.DS Andre Przywara
2019-11-12 16:42 ` Alexandru Elisei
2019-11-14 13:39 ` Vladimir Murzin
2019-11-14 14:17 ` Andre Przywara
2019-11-14 14:50 ` Vladimir Murzin
2019-11-14 15:21 ` Alexandru Elisei
2019-11-14 15:27 ` Peter Maydell
2019-11-14 15:47 ` Alexandru Elisei
2019-11-14 15:56 ` Peter Maydell
2019-11-08 14:42 ` [kvm-unit-tests PATCH 10/17] arm: gic: Check for writable IGROUPR registers Andre Przywara
2019-11-12 16:51 ` Alexandru Elisei
2019-11-08 14:42 ` [kvm-unit-tests PATCH 11/17] arm: gic: Check for validity of both group enable bits Andre Przywara
2019-11-12 16:58 ` Alexandru Elisei
2019-11-08 14:42 ` [kvm-unit-tests PATCH 12/17] arm: gic: Change gic_read_iar() to take group parameter Andre Przywara
2019-11-12 17:19 ` Alexandru Elisei
2019-11-14 12:50 ` Andrew Jones
2019-11-08 14:42 ` [kvm-unit-tests PATCH 13/17] arm: gic: Change write_eoir() " Andre Przywara
2019-11-08 14:42 ` [kvm-unit-tests PATCH 14/17] arm: gic: Prepare for receiving GIC group 0 interrupts via FIQs Andre Przywara
2019-11-12 17:30 ` Alexandru Elisei
2019-11-08 14:42 ` [kvm-unit-tests PATCH 15/17] arm: gic: Provide FIQ handler Andre Przywara
2019-11-13 10:14 ` Alexandru Elisei
2019-11-08 14:42 ` [kvm-unit-tests PATCH 16/17] arm: gic: Prepare interrupt statistics for both groups Andre Przywara
2019-11-13 10:44 ` Alexandru Elisei
2019-11-08 14:42 ` [kvm-unit-tests PATCH 17/17] arm: gic: Test Group0 SPIs Andre Przywara
2019-11-13 11:26 ` Alexandru Elisei
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=f7f11075-4313-dfc7-2e70-07c37fb61531@arm.com \
--to=alexandru.elisei@arm.com \
--cc=andre.przywara@arm.com \
--cc=drjones@redhat.com \
--cc=kvm@vger.kernel.org \
--cc=kvmarm@lists.cs.columbia.edu \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=maz@kernel.org \
--cc=pbonzini@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).