[PATCH 0/3] Basic support for inforce IFC6410 board

[PATCH 0/3] Basic support for inforce IFC6410 board

[Rob Clark]

Couple little patches, plus work-in-progress DT file for the IFC6410.
With this, plus the msm clk support[1], I have serial console working
on top of 3.13-rc4.  The debug UART patch is not strictly required,
but it is a lot easier to debug when you can see what is going on in
early boot before the serial driver is up.


[1] http://www.spinics.net/lists/devicetree/msg08409.html

Rob Clark (3):
  mach-msm: add aqp8064 debug uart
  mach-msm: enable sparsemem for 8960
  RFC: mach-msm: add DT for ifc6410 (apq8064)

 arch/arm/Kconfig.debug                     |   9 ++
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 131 +++++++++++++++++++++++++++++
 arch/arm/include/debug/msm.S               |   5 ++
 arch/arm/mach-msm/Kconfig                  |   3 +
 arch/arm/mach-msm/board-dt.c               |   1 +
 arch/arm/mach-msm/include/mach/memory.h    |  22 +++++
 6 files changed, 171 insertions(+)
 create mode 100644 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
 create mode 100644 arch/arm/mach-msm/include/mach/memory.h

-- 
1.8.4.2

[PATCH 1/3] mach-msm: add aqp8064 debug uart

[Rob Clark]

Signed-off-by: Rob Clark <robdclark@gmail.com>
---
 arch/arm/Kconfig.debug       | 9 +++++++++
 arch/arm/include/debug/msm.S | 5 +++++
 2 files changed, 14 insertions(+)

diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 5765abf..de9207d 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -357,6 +357,15 @@ choice
 		  Say Y here if you want the debug print routines to direct
 		  their output to the serial port on MSM 8960 devices.
 
+	config DEBUG_APQ8064_UART
+		bool "Kernel low-level debugging messages via APQ 8064 UART"
+		depends on ARCH_MSM8960
+		select MSM_HAS_DEBUG_UART_HS
+		select DEBUG_MSM_UART
+		help
+		  Say Y here if you want the debug print routines to direct
+		  their output to the serial port on APQ 8064 devices.
+
 	config DEBUG_MSM8974_UART
 		bool "Kernel low-level debugging messages via MSM 8974 UART"
 		depends on ARCH_MSM8974
diff --git a/arch/arm/include/debug/msm.S b/arch/arm/include/debug/msm.S
index 9d653d4..08dc880 100644
--- a/arch/arm/include/debug/msm.S
+++ b/arch/arm/include/debug/msm.S
@@ -46,6 +46,11 @@
 #define MSM_DEBUG_UART_PHYS	0x16440000
 #endif
 
+#ifdef CONFIG_DEBUG_APQ8064_UART
+#define MSM_DEBUG_UART_BASE     0xFA740000
+#define MSM_DEBUG_UART_PHYS     0x16640000
+#endif
+
 #ifdef CONFIG_DEBUG_MSM8974_UART
 #define MSM_DEBUG_UART_BASE	0xFA71E000
 #define MSM_DEBUG_UART_PHYS	0xF991E000
-- 
1.8.4.2

[PATCH 2/3] mach-msm: enable sparsemem for 8960

[Rob Clark]

fixes:

------------[ cut here ]------------
WARNING: CPU: 0 PID: 0 at /home/robclark/src/linux/lib/list_debug.c:29 __list_add+0x6c/0xc0()
list_add corruption. next->prev should be prev (c09eb13c), but was c09eb138. (next=c1077814).
Modules linked in:
CPU: 0 PID: 0 Comm: swapper Not tainted 3.13.0-rc2-00172-g0a3e79c-dirty #214
[<c0214e2c>] (unwind_backtrace+0x0/0x138) from [<c021270c>] (show_stack+0x10/0x14)
[<c021270c>] (show_stack+0x10/0x14) from [<c06f53ac>] (dump_stack+0x6c/0xac)
[<c06f53ac>] (dump_stack+0x6c/0xac) from [<c022c218>] (warn_slowpath_common+0x68/0x8c)
[<c022c218>] (warn_slowpath_common+0x68/0x8c) from [<c022c2d0>] (warn_slowpath_fmt+0x30/0x40)
[<c022c2d0>] (warn_slowpath_fmt+0x30/0x40) from [<c04c5564>] (__list_add+0x6c/0xc0)
[<c04c5564>] (__list_add+0x6c/0xc0) from [<c02d3078>] (__free_pages_ok.part.47+0x144/0x2bc)
[<c02d3078>] (__free_pages_ok.part.47+0x144/0x2bc) from [<c0963f28>] (free_all_bootmem+0x114/0x2a4)
[<c0963f28>] (free_all_bootmem+0x114/0x2a4) from [<c095582c>] (mem_init+0xe4/0x404)
[<c095582c>] (mem_init+0xe4/0x404) from [<c095090c>] (start_kernel+0x16c/0x358)
[<c095090c>] (start_kernel+0x16c/0x358) from [<80208074>] (0x80208074)
---[ end trace 3406ff24bd97382e ]---
------------[ cut here ]------------

Signed-off-by: Rob Clark <robdclark@gmail.com>

Conflicts:
	arch/arm/mach-msm/Kconfig
---
 arch/arm/mach-msm/Kconfig               |  3 +++
 arch/arm/mach-msm/include/mach/memory.h | 22 ++++++++++++++++++++++
 2 files changed, 25 insertions(+)
 create mode 100644 arch/arm/mach-msm/include/mach/memory.h

diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index 702553b..24c76a0 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -54,6 +54,9 @@ config ARCH_MSM8X60
 config ARCH_MSM8960
 	bool "MSM8960"
 	select ARCH_MSM_DT
+	select ARCH_HAS_HOLES_MEMORYMODEL
+	select ARCH_SPARSEMEM_ENABLE
+	select NEED_MACH_MEMORY_H
 	select ARM_GIC
 	select CPU_V7
 	select HAVE_SMP
diff --git a/arch/arm/mach-msm/include/mach/memory.h b/arch/arm/mach-msm/include/mach/memory.h
new file mode 100644
index 0000000..15aa2cd
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/memory.h
@@ -0,0 +1,22 @@
+/* arch/arm/mach-msm/include/mach/memory.h
+ *
+ * Copyright (C) 2007 Google, Inc.
+ * Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+#ifndef __ASM_ARCH_MEMORY_H
+#define __ASM_ARCH_MEMORY_H
+
+#define MAX_PHYSMEM_BITS 32
+#define SECTION_SIZE_BITS 28
+
+#endif
-- 
1.8.4.2

[RFC 3/3] RFC: mach-msm: add DT for ifc6410 (apq8064)

[Rob Clark]

This depends on gcc and mmcc clk stuff, which isn't merged yet.  And
the display/gpu parts need regulators which are missing.  So this
patch is only RFC at this point.

---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 131 +++++++++++++++++++++++++++++
 arch/arm/mach-msm/board-dt.c               |   1 +
 2 files changed, 132 insertions(+)
 create mode 100644 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts

diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
new file mode 100644
index 0000000..84c9b29
--- /dev/null
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -0,0 +1,131 @@
+/dts-v1/;
+
+/include/ "skeleton.dtsi"
+
+#include <dt-bindings/clk/msm-gcc-8960.h>
+#include <dt-bindings/clk/msm-mmcc-8960.h>
+
+/ {
+	model = "Qualcomm APQ8064/IFC6410";
+	compatible = "qcom,apq8064-ifc6410", "qcom,apq8064";
+	interrupt-parent = <&intc>;
+
+	intc: interrupt-controller@2000000 {
+		compatible = "qcom,msm-qgic2";
+		interrupt-controller;
+		#interrupt-cells = <3>;
+		reg = < 0x02000000 0x1000 >,
+		      < 0x02002000 0x1000 >;
+	};
+
+	timer@200a000 {
+		compatible = "qcom,kpss-timer", "qcom,msm-timer";
+		interrupts = <1 1 0x301>,
+			     <1 2 0x301>,
+			     <1 3 0x301>;
+		reg = <0x0200a000 0x100>;
+		clock-frequency = <27000000>,
+				  <32768>;
+		cpu-offset = <0x80000>;
+	};
+
+	msmgpio: gpio@800000 {
+		compatible = "qcom,msm-gpio";
+		gpio-controller;
+		#gpio-cells = <2>;
+		ngpio = <150>;
+		interrupts = <0 32 0x4>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+		reg = <0x00800000 0x4000>;
+	};
+
+	serial@16640000 {
+		compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
+		reg = <0x16640000 0x1000>,
+		      <0x16600000 0x1000>;
+		interrupts = <0 154 0x0>;
+		clocks = <&gcc GSBI5_UART_CLK>, <&gcc GSBI5_H_CLK>;
+		clock-names = "core", "iface";
+	};
+
+	qcom,ssbi@500000 {
+		compatible = "qcom,ssbi";
+		reg = <0x00500000 0x1000>;
+		qcom,controller-type = "pmic-arbiter";
+	};
+
+	gcc: clock-controller@900000 {
+		compatible = "qcom,gcc-8960", "qcom,gcc";
+		reg = <0x00900000 0x4000>;
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+	};
+
+	mmcc: clock-controller@4000000 {
+		compatible = "qcom,mmcc-8960", "qcom,mmcc";
+		reg = <0x04000000 0x1000>;
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+	};
+
+	gpu: qcom,kgsl-3d0@4300000 {
+		compatible = "qcom,kgsl-3d0";
+		reg = <0x04300000 0x20000>;
+		qcom,chipid = <0x03020100>;
+
+		qcom,gpu-pwrlevels {
+			compatible = "qcom,gpu-pwrlevels";
+
+			qcom,gpu-pwrlevel@0 {
+				qcom,gpu-freq = <450000000>;
+			};
+
+			qcom,gpu-pwrlevel@1 {
+				qcom,gpu-freq = <27000000>;
+			};
+		};
+	};
+
+	hdmi: qcom,hdmi-tx@4a00000 {
+		compatible = "qcom,hdmi-tx";
+		reg-names = "core_physical";
+		reg = <0x04a00000 0x1000>;
+		clock-names =
+		    "core_clk",
+		    "master_iface_clk",
+		    "slave_iface_clk";
+		clocks =
+		    <&mmcc HDMI_APP_CLK>,
+		    <&mmcc HDMI_M_AHB_CLK>,
+		    <&mmcc HDMI_S_AHB_CLK>;
+		qcom,hdmi-phy = "8960";
+		qcom,hdmi-tx-ddc-clk = <&msmgpio 70 0>;
+		qcom,hdmi-tx-ddc-data = <&msmgpio 71 0>;
+		qcom,hdmi-tx-hpd = <&msmgpio 72 0>;
+	};
+
+	mdp: qcom,mdp@5100000 {
+		compatible = "qcom,mdp";
+		reg = <0x05100000 0xf0000>;
+		interrupts = <0 107 0>;
+		hdmi = <&hdmi>;
+		gpu = <&gpu>;
+		clock-names =
+		    "core_clk",
+		    "iface_clk",
+		    "lut_clk",
+		    "src_clk",
+		    "hdmi_clk",
+		    "mdp_clk";
+		clocks =
+		    <&mmcc MDP_SRC>,
+		    <&mmcc MDP_AHB_CLK>,
+		    <&mmcc MDP_LUT_CLK>,
+		    <&mmcc TV_SRC>,
+		    <&mmcc HDMI_TV_CLK>,
+		    <&mmcc MDP_TV_CLK>;
+// need footswitch!
+//		vdd-supply = <&gdsc_mdss>;
+	};
+};
diff --git a/arch/arm/mach-msm/board-dt.c b/arch/arm/mach-msm/board-dt.c
index 1f11d93..00796d1 100644
--- a/arch/arm/mach-msm/board-dt.c
+++ b/arch/arm/mach-msm/board-dt.c
@@ -23,6 +23,7 @@ static const char * const msm_dt_match[] __initconst = {
 	"qcom,msm8660-fluid",
 	"qcom,msm8660-surf",
 	"qcom,msm8960-cdp",
+	"qcom,apq8064-ifc6410",
 	NULL
 };
 
-- 
1.8.4.2

Re: [PATCH 1/3] mach-msm: add aqp8064 debug uart

[Christopher Covington]

Hi Rob,

Small typo in the subject of this patch (s/aqp/apq/).

Regards,
Christopher

-- 
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by the Linux Foundation.

Re: [PATCH 1/3] mach-msm: add aqp8064 debug uart

[Rob Clark]

On Mon, Dec 16, 2013 at 12:26 PM, Christopher Covington
<cov@codeaurora.org> wrote:
> Hi Rob,
>
> Small typo in the subject of this patch (s/aqp/apq/).

oh, whoops.. looks like I wasn't minding my p's and q's

(but at a small enough font size, it is pretty hard to tell the difference :-P)

BR,
-R

>
> Regards,
> Christopher
>
> --
> Employee of Qualcomm Innovation Center, Inc.
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> hosted by the Linux Foundation.

Re: [PATCH 2/3] mach-msm: enable sparsemem for 8960

[Rob Clark]

hmm, ok, if I understand properly the root issue is the memory atags
passed to the kernel from the bootloader..

Putting 'mem=2G@0x80000000' in the cmdline also does the trick without
requiring sparsemem

BR,
-R


On Mon, Dec 16, 2013 at 12:00 PM, Rob Clark <robdclark@gmail.com> wrote:
> fixes:
>
> ------------[ cut here ]------------
> WARNING: CPU: 0 PID: 0 at /home/robclark/src/linux/lib/list_debug.c:29 __list_add+0x6c/0xc0()
> list_add corruption. next->prev should be prev (c09eb13c), but was c09eb138. (next=c1077814).
> Modules linked in:
> CPU: 0 PID: 0 Comm: swapper Not tainted 3.13.0-rc2-00172-g0a3e79c-dirty #214
> [<c0214e2c>] (unwind_backtrace+0x0/0x138) from [<c021270c>] (show_stack+0x10/0x14)
> [<c021270c>] (show_stack+0x10/0x14) from [<c06f53ac>] (dump_stack+0x6c/0xac)
> [<c06f53ac>] (dump_stack+0x6c/0xac) from [<c022c218>] (warn_slowpath_common+0x68/0x8c)
> [<c022c218>] (warn_slowpath_common+0x68/0x8c) from [<c022c2d0>] (warn_slowpath_fmt+0x30/0x40)
> [<c022c2d0>] (warn_slowpath_fmt+0x30/0x40) from [<c04c5564>] (__list_add+0x6c/0xc0)
> [<c04c5564>] (__list_add+0x6c/0xc0) from [<c02d3078>] (__free_pages_ok.part.47+0x144/0x2bc)
> [<c02d3078>] (__free_pages_ok.part.47+0x144/0x2bc) from [<c0963f28>] (free_all_bootmem+0x114/0x2a4)
> [<c0963f28>] (free_all_bootmem+0x114/0x2a4) from [<c095582c>] (mem_init+0xe4/0x404)
> [<c095582c>] (mem_init+0xe4/0x404) from [<c095090c>] (start_kernel+0x16c/0x358)
> [<c095090c>] (start_kernel+0x16c/0x358) from [<80208074>] (0x80208074)
> ---[ end trace 3406ff24bd97382e ]---
> ------------[ cut here ]------------
>
> Signed-off-by: Rob Clark <robdclark@gmail.com>
>
> Conflicts:
>         arch/arm/mach-msm/Kconfig
> ---
>  arch/arm/mach-msm/Kconfig               |  3 +++
>  arch/arm/mach-msm/include/mach/memory.h | 22 ++++++++++++++++++++++
>  2 files changed, 25 insertions(+)
>  create mode 100644 arch/arm/mach-msm/include/mach/memory.h
>
> diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
> index 702553b..24c76a0 100644
> --- a/arch/arm/mach-msm/Kconfig
> +++ b/arch/arm/mach-msm/Kconfig
> @@ -54,6 +54,9 @@ config ARCH_MSM8X60
>  config ARCH_MSM8960
>         bool "MSM8960"
>         select ARCH_MSM_DT
> +       select ARCH_HAS_HOLES_MEMORYMODEL
> +       select ARCH_SPARSEMEM_ENABLE
> +       select NEED_MACH_MEMORY_H
>         select ARM_GIC
>         select CPU_V7
>         select HAVE_SMP
> diff --git a/arch/arm/mach-msm/include/mach/memory.h b/arch/arm/mach-msm/include/mach/memory.h
> new file mode 100644
> index 0000000..15aa2cd
> --- /dev/null
> +++ b/arch/arm/mach-msm/include/mach/memory.h
> @@ -0,0 +1,22 @@
> +/* arch/arm/mach-msm/include/mach/memory.h
> + *
> + * Copyright (C) 2007 Google, Inc.
> + * Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
> + *
> + * This software is licensed under the terms of the GNU General Public
> + * License version 2, as published by the Free Software Foundation, and
> + * may be copied, distributed, and modified under those terms.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + */
> +#ifndef __ASM_ARCH_MEMORY_H
> +#define __ASM_ARCH_MEMORY_H
> +
> +#define MAX_PHYSMEM_BITS 32
> +#define SECTION_SIZE_BITS 28
> +
> +#endif
> --
> 1.8.4.2
>

Re: [RFC 3/3] RFC: mach-msm: add DT for ifc6410 (apq8064)

[Stephen Boyd]

On 12/16, Rob Clark wrote:
> +
> +	msmgpio: gpio@800000 {
> +		compatible = "qcom,msm-gpio";
> +		gpio-controller;
> +		#gpio-cells = <2>;
> +		ngpio = <150>;
> +		interrupts = <0 32 0x4>;

This should be 16.

> +		interrupt-controller;
> +		#interrupt-cells = <2>;
> +		reg = <0x00800000 0x4000>;
> +	};
> +

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation

Re: [RFC 3/3] RFC: mach-msm: add DT for ifc6410 (apq8064)

[Olof Johansson]

On Mon, Dec 16, 2013 at 9:00 AM, Rob Clark <robdclark@gmail.com> wrote:

> +
> +/ {
> +       model = "Qualcomm APQ8064/IFC6410";
> +       compatible = "qcom,apq8064-ifc6410", "qcom,apq8064";
> +       interrupt-parent = <&intc>;

[...]

> diff --git a/arch/arm/mach-msm/board-dt.c b/arch/arm/mach-msm/board-dt.c
> index 1f11d93..00796d1 100644
> --- a/arch/arm/mach-msm/board-dt.c
> +++ b/arch/arm/mach-msm/board-dt.c
> @@ -23,6 +23,7 @@ static const char * const msm_dt_match[] __initconst = {
>         "qcom,msm8660-fluid",
>         "qcom,msm8660-surf",
>         "qcom,msm8960-cdp",
> +       "qcom,apq8064-ifc6410",


We shouldn't enumerate boards here, it should probably list the
second-level compatible instead. I.e. "qcom,apq8064" in this case.


-Olof

Re: [RFC 3/3] RFC: mach-msm: add DT for ifc6410 (apq8064)

[Rob Clark]

On Mon, Dec 16, 2013 at 3:03 PM, Olof Johansson <olof@lixom.net> wrote:
> On Mon, Dec 16, 2013 at 9:00 AM, Rob Clark <robdclark@gmail.com> wrote:
>
>> +
>> +/ {
>> +       model = "Qualcomm APQ8064/IFC6410";
>> +       compatible = "qcom,apq8064-ifc6410", "qcom,apq8064";
>> +       interrupt-parent = <&intc>;
>
> [...]
>
>> diff --git a/arch/arm/mach-msm/board-dt.c b/arch/arm/mach-msm/board-dt.c
>> index 1f11d93..00796d1 100644
>> --- a/arch/arm/mach-msm/board-dt.c
>> +++ b/arch/arm/mach-msm/board-dt.c
>> @@ -23,6 +23,7 @@ static const char * const msm_dt_match[] __initconst = {
>>         "qcom,msm8660-fluid",
>>         "qcom,msm8660-surf",
>>         "qcom,msm8960-cdp",
>> +       "qcom,apq8064-ifc6410",
>
>
> We shouldn't enumerate boards here, it should probably list the
> second-level compatible instead. I.e. "qcom,apq8064" in this case.

oh, yeah, that does sound more sensible..

I guess I could split .dts up too, to separate parts that would apply
to all apq8064..  although not sure if that is overkill to do before
we have >1 apq8064 device supported..

BR,
-R

>
> -Olof

Re: [RFC 3/3] RFC: mach-msm: add DT for ifc6410 (apq8064)

[Olof Johansson]

On Mon, Dec 16, 2013 at 12:10 PM, Rob Clark <robdclark@gmail.com> wrote:
> On Mon, Dec 16, 2013 at 3:03 PM, Olof Johansson <olof@lixom.net> wrote:
>> On Mon, Dec 16, 2013 at 9:00 AM, Rob Clark <robdclark@gmail.com> wrote:
>>
>>> +
>>> +/ {
>>> +       model = "Qualcomm APQ8064/IFC6410";
>>> +       compatible = "qcom,apq8064-ifc6410", "qcom,apq8064";
>>> +       interrupt-parent = <&intc>;
>>
>> [...]
>>
>>> diff --git a/arch/arm/mach-msm/board-dt.c b/arch/arm/mach-msm/board-dt.c
>>> index 1f11d93..00796d1 100644
>>> --- a/arch/arm/mach-msm/board-dt.c
>>> +++ b/arch/arm/mach-msm/board-dt.c
>>> @@ -23,6 +23,7 @@ static const char * const msm_dt_match[] __initconst = {
>>>         "qcom,msm8660-fluid",
>>>         "qcom,msm8660-surf",
>>>         "qcom,msm8960-cdp",
>>> +       "qcom,apq8064-ifc6410",
>>
>>
>> We shouldn't enumerate boards here, it should probably list the
>> second-level compatible instead. I.e. "qcom,apq8064" in this case.
>
> oh, yeah, that does sound more sensible..
>
> I guess I could split .dts up too, to separate parts that would apply
> to all apq8064..  although not sure if that is overkill to do before
> we have >1 apq8064 device supported..

Yeah. I've got a dragonboard here that's sitting idle due to lack of
meaningful dts/driver support. Sounds like things are coming together
to a point where I can start putting it to use.

Having the onchip IP blocks in a shared DTSI (but marked as disabled
in some cases) is usually how we do it.


-Olof