From: Matthew McClintock <mmcclint@codeaurora.org>
To: andy.gross@linaro.org, linux-arm-msm@vger.kernel.org
Cc: qca-upstream.external@qca.qualcomm.com,
Matthew McClintock <mmcclint@codeaurora.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
Senthilkumar N L <snlakshm@codeaurora.org>,
Varadarajan Narayanan <varada@codeaurora.org>,
Pradeep Banavathi <pradeepb@codeaurora.org>,
"open list:COMMON CLK FRAMEWORK" <linux-clk@vger.kernel.org>,
open list <linux-kernel@vger.kernel.org>
Subject: [PATCH 04/17] clk: qcom: ipq4019: switch remaining defines to enums
Date: Wed, 23 Mar 2016 17:04:59 -0500 [thread overview]
Message-ID: <1458770712-10880-5-git-send-email-mmcclint@codeaurora.org> (raw)
In-Reply-To: <1458770712-10880-1-git-send-email-mmcclint@codeaurora.org>
When this was added not all the remaining defines were switched over to
use enums, so let's complete that process here
Reported-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
---
drivers/clk/qcom/gcc-ipq4019.c | 60 ++++++++++++++++++------------------------
1 file changed, 25 insertions(+), 35 deletions(-)
diff --git a/drivers/clk/qcom/gcc-ipq4019.c b/drivers/clk/qcom/gcc-ipq4019.c
index 21def7f..38ada8d 100644
--- a/drivers/clk/qcom/gcc-ipq4019.c
+++ b/drivers/clk/qcom/gcc-ipq4019.c
@@ -129,20 +129,10 @@ static const char * const gcc_xo_ddr_500_200[] = {
};
#define F(f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) }
-#define P_XO 0
-#define FE_PLL_200 1
-#define FE_PLL_500 2
-#define DDRC_PLL_666 3
-
-#define DDRC_PLL_666_SDCC 1
-#define FE_PLL_125_DLY 1
-
-#define FE_PLL_WCSS2G 1
-#define FE_PLL_WCSS5G 1
static const struct freq_tbl ftbl_gcc_audio_pwm_clk[] = {
F(48000000, P_XO, 1, 0, 0),
- F(200000000, FE_PLL_200, 1, 0, 0),
+ F(200000000, P_FEPLL200, 1, 0, 0),
{ }
};
@@ -334,15 +324,15 @@ static struct clk_branch gcc_blsp1_qup2_spi_apps_clk = {
};
static const struct freq_tbl ftbl_gcc_blsp1_uart1_2_apps_clk[] = {
- F(1843200, FE_PLL_200, 1, 144, 15625),
- F(3686400, FE_PLL_200, 1, 288, 15625),
- F(7372800, FE_PLL_200, 1, 576, 15625),
- F(14745600, FE_PLL_200, 1, 1152, 15625),
- F(16000000, FE_PLL_200, 1, 2, 25),
+ F(1843200, P_FEPLL200, 1, 144, 15625),
+ F(3686400, P_FEPLL200, 1, 288, 15625),
+ F(7372800, P_FEPLL200, 1, 576, 15625),
+ F(14745600, P_FEPLL200, 1, 1152, 15625),
+ F(16000000, P_FEPLL200, 1, 2, 25),
F(24000000, P_XO, 1, 1, 2),
- F(32000000, FE_PLL_200, 1, 4, 25),
- F(40000000, FE_PLL_200, 1, 1, 5),
- F(46400000, FE_PLL_200, 1, 29, 125),
+ F(32000000, P_FEPLL200, 1, 4, 25),
+ F(40000000, P_FEPLL200, 1, 1, 5),
+ F(46400000, P_FEPLL200, 1, 29, 125),
F(48000000, P_XO, 1, 0, 0),
{ }
};
@@ -410,9 +400,9 @@ static struct clk_branch gcc_blsp1_uart2_apps_clk = {
};
static const struct freq_tbl ftbl_gcc_gp_clk[] = {
- F(1250000, FE_PLL_200, 1, 16, 0),
- F(2500000, FE_PLL_200, 1, 8, 0),
- F(5000000, FE_PLL_200, 1, 4, 0),
+ F(1250000, P_FEPLL200, 1, 16, 0),
+ F(2500000, P_FEPLL200, 1, 8, 0),
+ F(5000000, P_FEPLL200, 1, 4, 0),
{ }
};
@@ -512,11 +502,11 @@ static struct clk_branch gcc_gp3_clk = {
static const struct freq_tbl ftbl_gcc_sdcc1_apps_clk[] = {
F(144000, P_XO, 1, 3, 240),
F(400000, P_XO, 1, 1, 0),
- F(20000000, FE_PLL_500, 1, 1, 25),
- F(25000000, FE_PLL_500, 1, 1, 20),
- F(50000000, FE_PLL_500, 1, 1, 10),
- F(100000000, FE_PLL_500, 1, 1, 5),
- F(193000000, DDRC_PLL_666_SDCC, 1, 0, 0),
+ F(20000000, P_FEPLL500, 1, 1, 25),
+ F(25000000, P_FEPLL500, 1, 1, 20),
+ F(50000000, P_FEPLL500, 1, 1, 10),
+ F(100000000, P_FEPLL500, 1, 1, 5),
+ F(193000000, P_DDRPLL, 1, 0, 0),
{ }
};
@@ -536,9 +526,9 @@ static struct clk_rcg2 sdcc1_apps_clk_src = {
static const struct freq_tbl ftbl_gcc_apps_clk[] = {
F(48000000, P_XO, 1, 0, 0),
- F(200000000, FE_PLL_200, 1, 0, 0),
- F(500000000, FE_PLL_500, 1, 0, 0),
- F(626000000, DDRC_PLL_666, 1, 0, 0),
+ F(200000000, P_FEPLL200, 1, 0, 0),
+ F(500000000, P_FEPLL500, 1, 0, 0),
+ F(626000000, P_DDRPLLAPSS, 1, 0, 0),
{ }
};
@@ -557,7 +547,7 @@ static struct clk_rcg2 apps_clk_src = {
static const struct freq_tbl ftbl_gcc_apps_ahb_clk[] = {
F(48000000, P_XO, 1, 0, 0),
- F(100000000, FE_PLL_200, 2, 0, 0),
+ F(100000000, P_FEPLL200, 2, 0, 0),
{ }
};
@@ -941,7 +931,7 @@ static struct clk_branch gcc_usb2_mock_utmi_clk = {
};
static const struct freq_tbl ftbl_gcc_usb30_mock_utmi_clk[] = {
- F(2000000, FE_PLL_200, 10, 0, 0),
+ F(2000000, P_FEPLL200, 10, 0, 0),
{ }
};
@@ -1008,7 +998,7 @@ static struct clk_branch gcc_usb3_mock_utmi_clk = {
};
static const struct freq_tbl ftbl_gcc_fephy_dly_clk[] = {
- F(125000000, FE_PLL_125_DLY, 1, 0, 0),
+ F(125000000, P_FEPLL125DLY, 1, 0, 0),
{ }
};
@@ -1028,7 +1018,7 @@ static struct clk_rcg2 fephy_125m_dly_clk_src = {
static const struct freq_tbl ftbl_gcc_wcss2g_clk[] = {
F(48000000, P_XO, 1, 0, 0),
- F(250000000, FE_PLL_WCSS2G, 1, 0, 0),
+ F(250000000, P_FEPLLWCSS2G, 1, 0, 0),
{ }
};
@@ -1098,7 +1088,7 @@ static struct clk_branch gcc_wcss2g_rtc_clk = {
static const struct freq_tbl ftbl_gcc_wcss5g_clk[] = {
F(48000000, P_XO, 1, 0, 0),
- F(250000000, FE_PLL_WCSS5G, 1, 0, 0),
+ F(250000000, P_FEPLLWCSS5G, 1, 0, 0),
{ }
};
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2016-03-23 22:04 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-23 22:04 [PATCH 00/17] Additional IPQ4019 platform support Matthew McClintock
2016-03-23 22:04 ` [PATCH 01/17] pinctrl: qcom: ipq4019: set ngpios to correct value Matthew McClintock
2016-03-25 21:19 ` Bjorn Andersson
2016-03-31 9:53 ` Linus Walleij
2016-03-23 22:04 ` [PATCH 02/17] pinctrl: qcom: ipq4019: fix the function enum for gpio mode Matthew McClintock
2016-03-25 21:22 ` Bjorn Andersson
2016-03-31 9:55 ` Linus Walleij
2016-03-23 22:04 ` [PATCH 03/17] pinctrl: qcom: ipq4019: fix register offsets Matthew McClintock
2016-03-25 21:31 ` Bjorn Andersson
2016-03-31 9:57 ` Linus Walleij
2016-03-23 22:04 ` Matthew McClintock [this message]
2016-03-29 23:31 ` [PATCH 04/17] clk: qcom: ipq4019: switch remaining defines to enums Stephen Boyd
2016-03-23 22:05 ` [PATCH 05/17] clk: qcom: ipq4019: add some fixed clocks for ddrppl and fepll Matthew McClintock
2016-03-29 23:31 ` Stephen Boyd
[not found] ` <1458770712-10880-1-git-send-email-mmcclint-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-03-23 22:05 ` [PATCH 06/17] watchdog: qcom: update device tree bindings Matthew McClintock
2016-03-23 22:26 ` Stephen Boyd
2016-03-24 15:49 ` Matthew McClintock
[not found] ` <1458770712-10880-7-git-send-email-mmcclint-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-03-25 14:13 ` Rob Herring
2016-03-23 22:05 ` [PATCH 09/17] watchdog: qcom: add kpss-standalone to device tree binding Matthew McClintock
2016-03-25 14:15 ` Rob Herring
2016-03-28 17:02 ` Matthew McClintock
2016-03-28 17:26 ` Rob Herring
2016-03-28 18:15 ` Guenter Roeck
[not found] ` <20160328181544.GB29820-0h96xk9xTtrk1uMJSBkQmQ@public.gmane.org>
2016-03-28 22:22 ` Matthew McClintock
2016-03-23 22:05 ` [PATCH 15/17] qcom: ipq4019: add cpu operating points for cpufreq support Matthew McClintock
[not found] ` <1458770712-10880-16-git-send-email-mmcclint-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-03-23 22:33 ` Stephen Boyd
2017-03-22 14:10 ` [15/17] " Sven Eckelmann
2016-03-23 22:05 ` [PATCH 07/17] watchdog: qcom: add option for standalone watchdog not in timer block Matthew McClintock
[not found] ` <1458770712-10880-8-git-send-email-mmcclint-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-03-23 22:40 ` Stephen Boyd
2016-03-25 16:23 ` Guenter Roeck
[not found] ` <20160325162326.GA25767-0h96xk9xTtrk1uMJSBkQmQ@public.gmane.org>
2016-03-28 16:55 ` Matthew McClintock
[not found] ` <D54FA5B6-F170-40D3-BF0D-60D40A2C2829-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-03-28 18:13 ` Guenter Roeck
2016-03-28 20:40 ` Matthew McClintock
2016-03-28 21:56 ` Guenter Roeck
[not found] ` <20160328215638.GA25221-0h96xk9xTtrk1uMJSBkQmQ@public.gmane.org>
2016-03-28 22:21 ` Matthew McClintock
2016-03-23 22:05 ` [PATCH 08/17] watchdog: qcom: configure BARK time in addition to BITE time Matthew McClintock
[not found] ` <1458770712-10880-9-git-send-email-mmcclint-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-03-23 22:42 ` Stephen Boyd
2016-03-24 15:46 ` Matthew McClintock
2016-03-24 16:17 ` Guenter Roeck
2016-03-24 19:49 ` Matthew McClintock
2016-04-07 7:02 ` Guenter Roeck
2016-03-23 22:05 ` [PATCH 10/17] qcom: ipq4019: add watchdog node to ipq4019 SoC and DK01 device tree Matthew McClintock
2016-03-23 22:05 ` [PATCH 11/17] qcom: ipq4019: add support for reset via qcom,ps-hold Matthew McClintock
2016-03-23 22:05 ` [PATCH 12/17] qcom: ipq4019: add spi node to ipq4019 SoC and DK01 device tree Matthew McClintock
2016-03-23 22:05 ` [PATCH 13/17] qcom: ipq4019: add i2c " Matthew McClintock
2016-03-23 22:05 ` [PATCH 14/17] cpufreq: ipq4019: add cpufreq driver Matthew McClintock
2016-03-24 6:44 ` Viresh Kumar
2016-03-24 15:42 ` Matthew McClintock
2016-03-23 22:05 ` [PATCH 16/17] qcom: ipq4019: add crypto nodes to ipq4019 SoC and DK01 device tree Matthew McClintock
2016-03-23 22:05 ` [PATCH 17/17] qcom: ipq4019: add DMA " Matthew McClintock
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