From: Rajendra Nayak <rnayak@codeaurora.org>
To: viresh.kumar@linaro.org, sboyd@kernel.org,
bjorn.andersson@linaro.org, agross@kernel.org
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, mka@chromium.org,
Rajendra Nayak <rnayak@codeaurora.org>
Subject: [PATCH v2 07/17] arm64: dts: sdm845: Add DSI and MDP OPP tables and power-domains
Date: Fri, 17 Apr 2020 19:34:29 +0530 [thread overview]
Message-ID: <1587132279-27659-8-git-send-email-rnayak@codeaurora.org> (raw)
In-Reply-To: <1587132279-27659-1-git-send-email-rnayak@codeaurora.org>
Add the OPP tables for DSI and MDP based on the perf state/clk
requirements, and add the power-domains property to specify the
scalable power domain.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 59 ++++++++++++++++++++++++++++++++++++
1 file changed, 59 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 36b9fb1..7a625ad 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -3309,6 +3309,59 @@
#reset-cells = <1>;
};
+ mdp_opp_table: mdp-opp-table {
+ compatible = "operating-points-v2";
+
+ opp-19200000 {
+ opp-hz = /bits/ 64 <19200000>;
+ required-opps = <&rpmhpd_opp_min_svs>;
+ };
+
+ opp-171428571 {
+ opp-hz = /bits/ 64 <171428571>;
+ required-opps = <&rpmhpd_opp_low_svs>;
+ };
+
+ opp-344000000 {
+ opp-hz = /bits/ 64 <344000000>;
+ required-opps = <&rpmhpd_opp_svs_l1>;
+ };
+
+ opp-430000000 {
+ opp-hz = /bits/ 64 <430000000>;
+ required-opps = <&rpmhpd_opp_nom>;
+ };
+ };
+
+ dsi_opp_table: dsi-opp-table {
+ compatible = "operating-points-v2";
+
+ opp-19200000 {
+ opp-hz = /bits/ 64 <19200000>;
+ required-opps = <&rpmhpd_opp_min_svs>;
+ };
+
+ opp-180000000 {
+ opp-hz = /bits/ 64 <180000000>;
+ required-opps = <&rpmhpd_opp_low_svs>;
+ };
+
+ opp-275000000 {
+ opp-hz = /bits/ 64 <275000000>;
+ required-opps = <&rpmhpd_opp_svs>;
+ };
+
+ opp-328580000 {
+ opp-hz = /bits/ 64 <328580000>;
+ required-opps = <&rpmhpd_opp_svs_l1>;
+ };
+
+ opp-358000000 {
+ opp-hz = /bits/ 64 <358000000>;
+ required-opps = <&rpmhpd_opp_nom>;
+ };
+ };
+
mdss: mdss@ae00000 {
compatible = "qcom,sdm845-mdss";
reg = <0 0x0ae00000 0 0x1000>;
@@ -3353,6 +3406,8 @@
<&dispcc DISP_CC_MDSS_VSYNC_CLK>;
assigned-clock-rates = <300000000>,
<19200000>;
+ operating-points-v2 = <&mdp_opp_table>;
+ power-domains = <&rpmhpd SDM845_CX>;
interrupt-parent = <&mdss>;
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
@@ -3399,6 +3454,8 @@
"core",
"iface",
"bus";
+ operating-points-v2 = <&dsi_opp_table>;
+ power-domains = <&rpmhpd SDM845_CX>;
phys = <&dsi0_phy>;
phy-names = "dsi";
@@ -3463,6 +3520,8 @@
"core",
"iface",
"bus";
+ operating-points-v2 = <&dsi_opp_table>;
+ power-domains = <&rpmhpd SDM845_CX>;
phys = <&dsi1_phy>;
phy-names = "dsi";
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
next prev parent reply other threads:[~2020-04-17 14:05 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-17 14:04 [PATCH v2 00/17] DVFS for IO devices on sdm845 and sc7180 Rajendra Nayak
2020-04-17 14:04 ` [PATCH v2 01/17] tty: serial: qcom_geni_serial: Use OPP API to set clk/perf state Rajendra Nayak
2020-04-17 18:00 ` Matthias Kaehlcke
2020-04-18 8:05 ` Rajendra Nayak
2020-04-22 9:22 ` Rajendra Nayak
2020-04-23 13:51 ` Greg Kroah-Hartman
2020-04-17 14:04 ` [PATCH v2 02/17] spi: spi-geni-qcom: " Rajendra Nayak
2020-04-17 14:04 ` [PATCH v2 03/17] arm64: dts: sdm845: Add OPP table for all qup devices Rajendra Nayak
2020-04-17 14:04 ` [PATCH v2 04/17] arm64: dts: sc7180: " Rajendra Nayak
2020-04-17 14:04 ` [PATCH v2 05/17] drm/msm/dpu: Use OPP API to set clk/perf state Rajendra Nayak
2020-04-17 18:17 ` Matthias Kaehlcke
2020-04-18 8:12 ` Rajendra Nayak
2020-04-17 14:04 ` [PATCH v2 06/17] drm/msm: dsi: " Rajendra Nayak
2020-04-17 14:04 ` Rajendra Nayak [this message]
2020-04-17 14:04 ` [PATCH v2 08/17] arm64: dts: sc7180: Add DSI and MDP OPP tables and power-domains Rajendra Nayak
2020-04-17 14:04 ` [PATCH v2 09/17] mmc: sdhci-msm: Use OPP API to set clk/perf state Rajendra Nayak
2020-04-20 8:13 ` Ulf Hansson
2020-04-17 14:04 ` [PATCH v2 10/17] arm64: dts: sdm845: Add sdhc opps and power-domains Rajendra Nayak
2020-04-17 14:04 ` [PATCH v2 11/17] arm64: dts: sc7180: " Rajendra Nayak
2020-04-17 14:04 ` [PATCH v2 12/17] media: venus: core: Add support for opp tables/perf voting Rajendra Nayak
2020-04-17 14:04 ` [PATCH v2 13/17] arm64: dts: sdm845: Add OPP tables and power-domains for venus Rajendra Nayak
2020-04-17 14:04 ` [PATCH v2 14/17] arm64: dts: sc7180: " Rajendra Nayak
2020-04-17 14:04 ` [PATCH v2 15/17] spi: spi-qcom-qspi: Use OPP API to set clk/perf state Rajendra Nayak
2020-04-17 14:04 ` [PATCH v2 16/17] arm64: dts: sdm845: Add qspi opps and power-domains Rajendra Nayak
2020-04-17 14:04 ` [PATCH v2 17/17] arm64: dts: sc7180: " Rajendra Nayak
2020-04-20 3:36 ` [PATCH v2 00/17] DVFS for IO devices on sdm845 and sc7180 Viresh Kumar
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1587132279-27659-8-git-send-email-rnayak@codeaurora.org \
--to=rnayak@codeaurora.org \
--cc=agross@kernel.org \
--cc=bjorn.andersson@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mka@chromium.org \
--cc=sboyd@kernel.org \
--cc=viresh.kumar@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).