* [PATCH] arm64: dts: qcom: sc8280xp: fix ufs_card_phy ref clock
@ 2022-10-05 14:33 Johan Hovold
2022-10-06 14:38 ` Brian Masney
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Johan Hovold @ 2022-10-05 14:33 UTC (permalink / raw)
To: Bjorn Andersson
Cc: Andy Gross, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Brian Masney, linux-arm-msm, devicetree, linux-kernel,
Johan Hovold
The GCC_UFS_REF_CLKREF_CLK must be enabled or the second UFS controller
fails to enumerate on sa8295p-adp.
Note that the vendor kernel enables both GCC_UFS_REF_CLKREF_CLK and
GCC_UFS_1_CARD_CLKREF_CLK and it is possible that the former should be
modelled as a parent of the latter. The clock driver also has a
GCC_UFS_CARD_CLKREF_CLK clock which the firmware appears to enable on
the ADP.
The usual lack of documentation for Qualcomm SoCs makes this a highly
annoying guessing game, but as the second controller works on the ADP
without either card reference clock enabled, only enable
GCC_UFS_REF_CLKREF_CLK for now.
Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
---
The related issue for the first controller is being fixed here:
https://lore.kernel.org/lkml/20220830180120.2082734-1-bmasney@redhat.com/T/#u
Johan
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index cf7ef37c11ec..917f1feac6ac 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -960,7 +960,7 @@ ufs_card_phy: phy@1da7000 {
ranges;
clock-names = "ref",
"ref_aux";
- clocks = <&gcc GCC_UFS_1_CARD_CLKREF_CLK>,
+ clocks = <&gcc GCC_UFS_REF_CLKREF_CLK>,
<&gcc GCC_UFS_CARD_PHY_AUX_CLK>;
resets = <&ufs_card_hc 0>;
--
2.35.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] arm64: dts: qcom: sc8280xp: fix ufs_card_phy ref clock
2022-10-05 14:33 [PATCH] arm64: dts: qcom: sc8280xp: fix ufs_card_phy ref clock Johan Hovold
@ 2022-10-06 14:38 ` Brian Masney
2022-10-07 19:29 ` Konrad Dybcio
2022-10-18 3:05 ` Bjorn Andersson
2 siblings, 0 replies; 4+ messages in thread
From: Brian Masney @ 2022-10-06 14:38 UTC (permalink / raw)
To: Johan Hovold
Cc: Bjorn Andersson, Andy Gross, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, linux-arm-msm, devicetree, linux-kernel
On Wed, Oct 05, 2022 at 04:33:05PM +0200, Johan Hovold wrote:
> The GCC_UFS_REF_CLKREF_CLK must be enabled or the second UFS controller
> fails to enumerate on sa8295p-adp.
>
> Note that the vendor kernel enables both GCC_UFS_REF_CLKREF_CLK and
> GCC_UFS_1_CARD_CLKREF_CLK and it is possible that the former should be
> modelled as a parent of the latter. The clock driver also has a
> GCC_UFS_CARD_CLKREF_CLK clock which the firmware appears to enable on
> the ADP.
>
> The usual lack of documentation for Qualcomm SoCs makes this a highly
> annoying guessing game, but as the second controller works on the ADP
> without either card reference clock enabled, only enable
> GCC_UFS_REF_CLKREF_CLK for now.
>
> Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
> Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Brian Masney <bmasney@redhat.com>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] arm64: dts: qcom: sc8280xp: fix ufs_card_phy ref clock
2022-10-05 14:33 [PATCH] arm64: dts: qcom: sc8280xp: fix ufs_card_phy ref clock Johan Hovold
2022-10-06 14:38 ` Brian Masney
@ 2022-10-07 19:29 ` Konrad Dybcio
2022-10-18 3:05 ` Bjorn Andersson
2 siblings, 0 replies; 4+ messages in thread
From: Konrad Dybcio @ 2022-10-07 19:29 UTC (permalink / raw)
To: Johan Hovold, Bjorn Andersson
Cc: Andy Gross, Rob Herring, Krzysztof Kozlowski, Brian Masney,
linux-arm-msm, devicetree, linux-kernel
On 5.10.2022 16:33, Johan Hovold wrote:
> The GCC_UFS_REF_CLKREF_CLK must be enabled or the second UFS controller
> fails to enumerate on sa8295p-adp.
>
> Note that the vendor kernel enables both GCC_UFS_REF_CLKREF_CLK and
> GCC_UFS_1_CARD_CLKREF_CLK and it is possible that the former should be
> modelled as a parent of the latter. The clock driver also has a
> GCC_UFS_CARD_CLKREF_CLK clock which the firmware appears to enable on
> the ADP.
My guess would be that XBL/whatever other bootloader enables all of them as
it scans for bootable devices and only gates one afterwards..
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Konrad
>
> The usual lack of documentation for Qualcomm SoCs makes this a highly
> annoying guessing game, but as the second controller works on the ADP
> without either card reference clock enabled, only enable
> GCC_UFS_REF_CLKREF_CLK for now.
>
> Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
> Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
> ---
>
> The related issue for the first controller is being fixed here:
>
> https://lore.kernel.org/lkml/20220830180120.2082734-1-bmasney@redhat.com/T/#u
>
> Johan
>
>
> arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> index cf7ef37c11ec..917f1feac6ac 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> @@ -960,7 +960,7 @@ ufs_card_phy: phy@1da7000 {
> ranges;
> clock-names = "ref",
> "ref_aux";
> - clocks = <&gcc GCC_UFS_1_CARD_CLKREF_CLK>,
> + clocks = <&gcc GCC_UFS_REF_CLKREF_CLK>,
> <&gcc GCC_UFS_CARD_PHY_AUX_CLK>;
>
> resets = <&ufs_card_hc 0>;
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] arm64: dts: qcom: sc8280xp: fix ufs_card_phy ref clock
2022-10-05 14:33 [PATCH] arm64: dts: qcom: sc8280xp: fix ufs_card_phy ref clock Johan Hovold
2022-10-06 14:38 ` Brian Masney
2022-10-07 19:29 ` Konrad Dybcio
@ 2022-10-18 3:05 ` Bjorn Andersson
2 siblings, 0 replies; 4+ messages in thread
From: Bjorn Andersson @ 2022-10-18 3:05 UTC (permalink / raw)
To: johan+linaro
Cc: devicetree, linux-kernel, agross, bmasney, robh+dt,
linux-arm-msm, Krzysztof Kozlowski, Konrad Dybcio
On Wed, 5 Oct 2022 16:33:05 +0200, Johan Hovold wrote:
> The GCC_UFS_REF_CLKREF_CLK must be enabled or the second UFS controller
> fails to enumerate on sa8295p-adp.
>
> Note that the vendor kernel enables both GCC_UFS_REF_CLKREF_CLK and
> GCC_UFS_1_CARD_CLKREF_CLK and it is possible that the former should be
> modelled as a parent of the latter. The clock driver also has a
> GCC_UFS_CARD_CLKREF_CLK clock which the firmware appears to enable on
> the ADP.
>
> [...]
Applied, thanks!
[1/1] arm64: dts: qcom: sc8280xp: fix ufs_card_phy ref clock
commit: 8d6b458ce6e93286a607e54f787f7a86067f58bd
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2022-10-18 3:07 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-10-05 14:33 [PATCH] arm64: dts: qcom: sc8280xp: fix ufs_card_phy ref clock Johan Hovold
2022-10-06 14:38 ` Brian Masney
2022-10-07 19:29 ` Konrad Dybcio
2022-10-18 3:05 ` Bjorn Andersson
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).