[PATCH v3 0/6] MSM8998 basic USB support

[PATCH v3 0/6] MSM8998 basic USB support

[Jeffrey Hugo]

This series provides basic USB support for MSM8998.  Currently missing is
wiring up the Type-C detection logic so that the controller can correctly
switch between host and peripheral modes.  Work to implement that is
ongoing, and expected to appear soon in followup patches.  Also missing is
Display Port (DP) support which apparently is different from sdm845 and
needs additional investigation.

v3:
-Dropped accepted phy changes
-Changed DT node labels per discussion with Bjorn
-Made DT reg property addresses fill width
-Added Bjorn's reviewed-by

v2:
-Fixed typo in QUSB2 bindings changes
-Split out bindings changes
-Fixed dual lane support in QMP to reflect Doug's updates
-Dropped the clock fixes which were accepted

Jeffrey Hugo (6):
  clk: qcom: Add missing freq for usb30_master_clk on 8998
  clk: qcom: Skip halt checks on gcc_usb3_phy_pipe_clk for 8998
  phy: qcom-qusb2: Add QUSB2 PHY support for msm8998
  phy: qcom-qmp: Add QMP V3 USB3 PHY support for msm8998
  usb: dwc3: qcom: Add support for MSM8998
  arm64: dts: qcom: msm8998: Add USB-related nodes

 .../devicetree/bindings/phy/qcom-qmp-phy.txt       |   5 +
 .../devicetree/bindings/phy/qcom-qusb2-phy.txt     |   1 +
 .../devicetree/bindings/usb/qcom,dwc3.txt          |   1 +
 arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi          |  22 ++++
 arch/arm64/boot/dts/qcom/msm8998.dtsi              |  90 +++++++++++++
 drivers/clk/qcom/gcc-msm8998.c                     |   3 +-
 drivers/phy/qualcomm/phy-qcom-qmp.c                | 142 +++++++++++++++++++++
 drivers/phy/qualcomm/phy-qcom-qmp.h                |   4 +
 drivers/phy/qualcomm/phy-qcom-qusb2.c              |  41 ++++++
 drivers/usb/dwc3/dwc3-qcom.c                       |   1 +
 10 files changed, 309 insertions(+), 1 deletion(-)

-- 
Qualcomm Datacenter Technologies as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.

[PATCH v3 1/3] dt-bindings: usb: Add support for msm8998

[Jeffrey Hugo]

msm8998 USB has a dwc3 controller just like the existing sdm845 support.

Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
 Documentation/devicetree/bindings/usb/qcom,dwc3.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.txt b/Documentation/devicetree/bindings/usb/qcom,dwc3.txt
index 95afdcf..cb695aa 100644
--- a/Documentation/devicetree/bindings/usb/qcom,dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.txt
@@ -4,6 +4,7 @@ Required properties:
 - compatible:		Compatible list, contains
 			"qcom,dwc3"
 			"qcom,msm8996-dwc3" for msm8996 SOC.
+			"qcom,msm8998-dwc3" for msm8998 SOC.
 			"qcom,sdm845-dwc3" for sdm845 SOC.
 - reg:			Offset and length of register set for QSCRATCH wrapper
 - power-domains:	specifies a phandle to PM domain provider node
-- 
Qualcomm Datacenter Technologies as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.

Re: [PATCH v3 1/3] dt-bindings: usb: Add support for msm8998

[Rob Herring]

On Mon, Jan 21, 2019 at 02:32:46PM -0700, Jeffrey Hugo wrote:
> msm8998 USB has a dwc3 controller just like the existing sdm845 support.
> 
> Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> ---
>  Documentation/devicetree/bindings/usb/qcom,dwc3.txt | 1 +
>  1 file changed, 1 insertion(+)

You missed my R-by.

Re: [PATCH v3 1/3] dt-bindings: usb: Add support for msm8998

[Jeffrey Hugo]

On 1/30/2019 8:42 AM, Rob Herring wrote:
> On Mon, Jan 21, 2019 at 02:32:46PM -0700, Jeffrey Hugo wrote:
>> msm8998 USB has a dwc3 controller just like the existing sdm845 support.
>>
>> Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
>> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
>> ---
>>   Documentation/devicetree/bindings/usb/qcom,dwc3.txt | 1 +
>>   1 file changed, 1 insertion(+)
> 
> You missed my R-by.
> 

Drat.  Sorry.

-- 
Jeffrey Hugo
Qualcomm Datacenter Technologies as an affiliate of Qualcomm 
Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.

[PATCH v3 2/3] usb: dwc3: qcom: Add support for MSM8998

[Jeffrey Hugo]

Add a MSM8998 specific DT compatible so that we can properly bind to the
device and enable the USB controller.

Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
 drivers/usb/dwc3/dwc3-qcom.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c
index a6d0203..184df4d 100644
--- a/drivers/usb/dwc3/dwc3-qcom.c
+++ b/drivers/usb/dwc3/dwc3-qcom.c
@@ -595,6 +595,7 @@ static int __maybe_unused dwc3_qcom_runtime_resume(struct device *dev)
 static const struct of_device_id dwc3_qcom_of_match[] = {
 	{ .compatible = "qcom,dwc3" },
 	{ .compatible = "qcom,msm8996-dwc3" },
+	{ .compatible = "qcom,msm8998-dwc3" },
 	{ .compatible = "qcom,sdm845-dwc3" },
 	{ }
 };
-- 
Qualcomm Datacenter Technologies as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.

Re: [PATCH v3 2/3] usb: dwc3: qcom: Add support for MSM8998

[Andy Gross]

On Mon, Jan 21, 2019 at 02:33:08PM -0700, Jeffrey Hugo wrote:
> Add a MSM8998 specific DT compatible so that we can properly bind to the
> device and enable the USB controller.
> 
> Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> ---
>  drivers/usb/dwc3/dwc3-qcom.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c
> index a6d0203..184df4d 100644
> --- a/drivers/usb/dwc3/dwc3-qcom.c
> +++ b/drivers/usb/dwc3/dwc3-qcom.c
> @@ -595,6 +595,7 @@ static int __maybe_unused dwc3_qcom_runtime_resume(struct device *dev)
>  static const struct of_device_id dwc3_qcom_of_match[] = {
>  	{ .compatible = "qcom,dwc3" },
>  	{ .compatible = "qcom,msm8996-dwc3" },
> +	{ .compatible = "qcom,msm8998-dwc3" },
>  	{ .compatible = "qcom,sdm845-dwc3" },
>  	{ }

Reviewed-by: Andy Gross <andy.gross@linaro.org>

[PATCH v3 3/3] arm64: dts: qcom: msm8998: Add USB-related nodes

[Jeffrey Hugo]

Add nodes for USB and related PHYs.

Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
 arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi | 22 ++++++++
 arch/arm64/boot/dts/qcom/msm8998.dtsi     | 92 +++++++++++++++++++++++++++++++
 2 files changed, 114 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi b/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi
index 50e9033..23676ae 100644
--- a/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi
@@ -65,6 +65,13 @@
 	status = "okay";
 };
 
+&qusb2phy {
+	status = "okay";
+
+	vdda-pll-supply = <&vreg_l12a_1p8>;
+	vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
+};
+
 &rpm_requests {
 	pm8998-regulators {
 		compatible = "qcom,rpm-pm8998-regulators";
@@ -257,3 +264,18 @@
 	pinctrl-0 = <&sdc2_clk_on  &sdc2_cmd_on  &sdc2_data_on  &sdc2_cd_on>;
 	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
 };
+
+&usb3 {
+	status = "okay";
+};
+
+&usb3_dwc3 {
+	dr_mode = "host"; /* Force to host until we have Type-C hooked up */
+};
+
+&usb3phy {
+	status = "okay";
+
+	vdda-phy-supply = <&vreg_l1a_0p875>;
+	vdda-pll-supply = <&vreg_l2a_1p2>;
+};
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index 8d41b69..89d8bef 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -540,6 +540,11 @@
 			reg = <0x780000 0x621c>;
 			#address-cells = <1>;
 			#size-cells = <1>;
+
+			qusb2_hstx_trim: hstx-trim@423a {
+				reg = <0x423a 0x1>;
+				bits = <0 4>;
+			};
 		};
 
 		gcc: clock-controller@100000 {
@@ -607,6 +612,93 @@
 			#mbox-cells = <1>;
 		};
 
+		usb3: usb@a8f8800 {
+			compatible = "qcom,msm8998-dwc3", "qcom,dwc3";
+			reg = <0x0a8f8800 0x400>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			clocks = <&gcc GCC_CFG_NOC_USB3_AXI_CLK>,
+				 <&gcc GCC_USB30_MASTER_CLK>,
+				 <&gcc GCC_AGGRE1_USB3_AXI_CLK>,
+				 <&gcc GCC_USB30_MOCK_UTMI_CLK>,
+				 <&gcc GCC_USB30_SLEEP_CLK>;
+			clock-names = "cfg_noc", "core", "iface", "mock_utmi",
+				      "sleep";
+
+			assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>,
+					  <&gcc GCC_USB30_MASTER_CLK>;
+			assigned-clock-rates = <19200000>, <120000000>;
+
+			interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "hs_phy_irq", "ss_phy_irq";
+
+			power-domains = <&gcc USB_30_GDSC>;
+
+			resets = <&gcc GCC_USB_30_BCR>;
+
+			usb3_dwc3: dwc3@a800000 {
+				compatible = "snps,dwc3";
+				reg = <0x0a800000 0xcd00>;
+				interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
+				snps,dis_u2_susphy_quirk;
+				snps,dis_enblslpm_quirk;
+				phys = <&qusb2phy>, <&usb3phy>;
+				phy-names = "usb2-phy", "usb3-phy";
+				snps,has-lpm-erratum;
+				snps,hird-threshold = /bits/ 8 <0x10>;
+			};
+		};
+
+		usb3phy: phy@c010000 {
+			compatible = "qcom,msm8998-qmp-usb3-phy";
+			reg = <0x0c010000 0x18c>;
+			status = "disabled";
+			#clock-cells = <1>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			clocks = <&gcc GCC_USB3_PHY_AUX_CLK>,
+				 <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
+				 <&gcc GCC_USB3_CLKREF_CLK>;
+			clock-names = "aux", "cfg_ahb", "ref";
+
+			resets = <&gcc GCC_USB3_PHY_BCR>,
+				 <&gcc GCC_USB3PHY_PHY_BCR>;
+			reset-names = "phy", "common";
+
+			usb1_ssphy: lane@c010200 {
+				reg = <0xc010200 0x128>,
+				      <0xc010400 0x200>,
+				      <0xc010c00 0x20c>,
+				      <0xc010600 0x128>,
+				      <0xc010800 0x200>;
+				#phy-cells = <0>;
+				clocks = <&gcc GCC_USB3_PHY_PIPE_CLK>;
+				clock-names = "pipe0";
+				clock-output-names = "usb3_phy_pipe_clk_src";
+			};
+		};
+
+		qusb2phy: phy@c012000 {
+			compatible = "qcom,msm8998-qusb2-phy";
+			reg = <0x0c012000 0x2a8>;
+			status = "disabled";
+			#phy-cells = <0>;
+
+			clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
+				 <&gcc GCC_RX1_USB2_CLKREF_CLK>;
+			clock-names = "cfg_ahb", "ref";
+
+			resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
+
+			nvmem-cells = <&qusb2_hstx_trim>;
+		};
+
 		sdhc2: sdhci@c0a4900 {
 			compatible = "qcom,sdhci-msm-v4";
 			reg = <0xc0a4900 0x314>, <0xc0a4000 0x800>;
-- 
Qualcomm Datacenter Technologies as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.

Re: [PATCH v3 0/6] MSM8998 basic USB support

[Marc Gonzalez]

On 21/01/2019 22:31, Jeffrey Hugo wrote:

> This series provides basic USB support for MSM8998.  Currently missing is
> wiring up the Type-C detection logic so that the controller can correctly
> switch between host and peripheral modes.  Work to implement that is
> ongoing, and expected to appear soon in followup patches.  Also missing is
> Display Port (DP) support which apparently is different from sdm845 and
> needs additional investigation.

FTR and FWIW:

_regmap_update_bits: reg=88014 old=3 new=2
[    CLK_BASE + 88014] = 00000002
------------[ cut here ]------------
gcc_rx1_usb2_clkref_clk status stuck at 'on'
WARNING: CPU: 3 PID: 1 at drivers/clk/qcom/clk-branch.c:92 clk_branch_toggle+0x19c/0x1c0
Modules linked in:
CPU: 3 PID: 1 Comm: swapper/0 Tainted: G S      W         5.0.0-rc6 #13
Hardware name: Qualcomm Technologies, Inc. MSM8998 v1 MTP (DT)
pstate: 60000085 (nZCv daIf -PAN -UAO)
pc : clk_branch_toggle+0x19c/0x1c0
lr : clk_branch_toggle+0x19c/0x1c0
sp : ffffff801005bc60
x29: ffffff801005bc60 x28: ffffff8010627464 
x27: ffffff8010c7b000 x26: ffffff80105b06d4 
x25: ffffff801054b1b8 x24: 0000000000000000 
x23: ffffff8010c39c18 x22: ffffff80102bf2f0 
x21: 0000000000000000 x20: ffffff8010c08000 
x19: 0000000000000000 x18: ffffffffffffffff 
x17: 0000000000000000 x16: 0000000000000000 
x15: ffffff8010c08548 x14: ffffff8010c807f0 
x13: ffffff8010c80431 x12: ffffff8010c14000 
x11: ffffff801005bc60 x10: ffffff801005bc60 
x9 : 00000000ffffffc8 x8 : 7320737574617473 
x7 : 206b6c635f666572 x6 : ffffff8010c7fabc 
x5 : 0000000000000000 x4 : 0000000000000000 
x3 : 00000000ffffffff x2 : 00000040ecf69000 
x1 : 59b62fd98d8ce200 x0 : 0000000000000000 
Call trace:
 clk_branch_toggle+0x19c/0x1c0
 clk_branch2_disable+0x2c/0x40
 clk_disable_unused_subtree+0xe8/0x250
 clk_disable_unused_subtree+0x34/0x250
 clk_disable_unused_subtree+0x34/0x250
 clk_disable_unused+0x44/0x140
 do_one_initcall+0x68/0x250
 kernel_init_freeable+0x288/0x32c
 kernel_init+0x18/0x110
 ret_from_fork+0x10/0x1c
---[ end trace d1565111e6d9749a ]---