From: Sudeep Holla <sudeep.holla@arm.com>
To: Amit Kucheria <amit.kucheria@linaro.org>
Cc: Matthias Kaehlcke <mka@chromium.org>,
Andy Gross <andy.gross@linaro.org>,
David Brown <david.brown@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
linux-arm-msm <linux-arm-msm@vger.kernel.org>,
"open list:ARM/QUALCOMM SUPPORT" <linux-soc@vger.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>, LKML <linux-kernel@vger.kernel.org>,
Douglas Anderson <dianders@chromium.org>,
Rajendra Nayak <rnayak@codeaurora.org>,
Sudeep Holla <sudeep.holla@arm.com>
Subject: Re: [PATCH] arm64: dts: sdm845: Add CPU topology
Date: Thu, 16 May 2019 14:22:08 +0100 [thread overview]
Message-ID: <20190516132208.GA22096@e107155-lin> (raw)
In-Reply-To: <CAHLCerPZ0Y-rkeMa_7BJWtR4g5af2vwfPY9FgOuvpUTJG3rf7g@mail.gmail.com>
On Mon, May 13, 2019 at 05:24:12PM +0530, Amit Kucheria wrote:
> On Mon, May 13, 2019 at 4:31 PM Amit Kucheria <amit.kucheria@linaro.org> wrote:
> >
> > On Tue, Jan 15, 2019 at 12:13 AM Matthias Kaehlcke <mka@chromium.org> wrote:
> > >
> > > The 8 CPU cores of the SDM845 are organized in two clusters of 4 big
> > > ("gold") and 4 little ("silver") cores. Add a cpu-map node to the DT
> > > that describes this topology.
> >
> > This is partly true. There are two groups of gold and silver cores,
> > but AFAICT they are in a single cluster, not two separate ones. SDM845
> > is one of the early examples of ARM's Dynamiq architecture.
> >
> > > Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
> >
> > I noticed that this patch sneaked through for this merge window but
> > perhaps we can whip up a quick fix for -rc2?
> >
>
> And please find attached a patch to fix this up. Andy, since this
> hasn't landed yet (can we still squash this into the original patch?),
> I couldn't add a Fixes tag.
>
> Regards,
> Amit
>
> > > ---
> > > arch/arm64/boot/dts/qcom/sdm845.dtsi | 38 ++++++++++++++++++++++++++++
> > > 1 file changed, 38 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > > index c27cbd3bcb0a6..f6c0d87e663f3 100644
> > > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > > @@ -192,6 +192,44 @@
> > > next-level-cache = <&L3_0>;
> > > };
> > > };
> > > +
> > > + cpu-map {
> > > + cluster0 {
> > > + core0 {
> > > + cpu = <&CPU0>;
> > > + };
> > > +
> > > + core1 {
> > > + cpu = <&CPU1>;
> > > + };
> > > +
> > > + core2 {
> > > + cpu = <&CPU2>;
> > > + };
> > > +
> > > + core3 {
> > > + cpu = <&CPU3>;
> > > + };
> > > + };
> > > +
> > > + cluster1 {
> >
> > This shouldn't exist.
> >
> > > + core0 {
> >
> > Rename to core4, 5, etc...
> >
> > > + cpu = <&CPU4>;
> > > + };
> > > +
> > > + core1 {
> > > + cpu = <&CPU5>;
> > > + };
> > > +
> > > + core2 {
> > > + cpu = <&CPU6>;
> > > + };
> > > +
> > > + core3 {
> > > + cpu = <&CPU7>;
> > > + };
> > > + };
> > > + };
> > > };
> > >
> > > pmu {
> > > --
> > > 2.20.1.97.g81188d93c3-goog
> > >
> From 9e7d60bcabad7594a1da43982bbc9fda04669717 Mon Sep 17 00:00:00 2001
> Message-Id: <9e7d60bcabad7594a1da43982bbc9fda04669717.1557748437.git.amit.kucheria@linaro.org>
> From: Amit Kucheria <amit.kucheria@linaro.org>
> Date: Mon, 13 May 2019 17:08:33 +0530
> Subject: [PATCH] arm64: dts: sdm845: Fix up CPU topology
>
> SDM845 implements ARM's Dynamiq architecture that allows the big and
> LITTLE cores to exist in a single cluster sharing the L3 cache.
>
> Fix the cpu-map to put all cpus into a single cluster.
>
Thanks for noticing and fixing this. I always mentioned this should
never land in mainline when Arm suggested this as hack/workaround
but it has unfortunately.
FWIW,
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
--
Regards,
Sudeep
prev parent reply other threads:[~2019-05-16 13:22 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-14 18:42 [PATCH] arm64: dts: sdm845: Add CPU topology Matthias Kaehlcke
2019-01-18 2:50 ` Doug Anderson
2019-05-13 11:01 ` Amit Kucheria
2019-05-13 11:54 ` Amit Kucheria
2019-05-14 21:16 ` Stephen Boyd
2019-05-16 11:54 ` Amit Kucheria
2019-05-17 21:55 ` Stephen Boyd
2019-06-05 17:20 ` Quentin Perret
2019-06-06 7:05 ` Vincent Guittot
2019-06-06 7:49 ` Quentin Perret
2019-06-06 8:20 ` Vincent Guittot
2019-06-06 8:29 ` Quentin Perret
2019-06-06 8:34 ` Dietmar Eggemann
2019-06-06 8:44 ` Vincent Guittot
2019-06-06 10:50 ` Morten Rasmussen
2019-05-22 4:03 ` Bjorn Andersson
2019-05-16 13:22 ` Sudeep Holla [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190516132208.GA22096@e107155-lin \
--to=sudeep.holla@arm.com \
--cc=amit.kucheria@linaro.org \
--cc=andy.gross@linaro.org \
--cc=david.brown@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=dianders@chromium.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-soc@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=mka@chromium.org \
--cc=rnayak@codeaurora.org \
--cc=robh+dt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).