Linux-ARM-MSM Archive on lore.kernel.org
 help / color / Atom feed
* [PATCH v3 0/7] Clock changes to support cpufreq on QCS404
@ 2019-11-25 13:59 Niklas Cassel
  2019-11-25 13:59 ` [PATCH v3 1/7] dt-bindings: mailbox: qcom: Add clock-name optional property Niklas Cassel
                   ` (6 more replies)
  0 siblings, 7 replies; 8+ messages in thread
From: Niklas Cassel @ 2019-11-25 13:59 UTC (permalink / raw)
  To: linux-arm-msm
  Cc: amit.kucheria, sboyd, bjorn.andersson, Niklas Cassel, devicetree,
	linux-kernel, linux-clk

The following clock changes are required to enable cpufreq support on
the QCS404.

Changes since v2:
-Addressed Stephen Boyd's comment regarding apcs-msm8916
should use new way of specifying clock parents.
-DT binding now has "pll" as first clock, in order to
not break DT backwards compatibility (in case no clock-names
are given).
-Moved EPROBE_DEFER error handling to its own patch.

Jorge Ramirez-Ortiz (6):
  dt-bindings: mailbox: qcom: Add clock-name optional property
  clk: qcom: gcc: limit GPLL0_AO_OUT operating frequency
  clk: qcom: hfpll: register as clock provider
  clk: qcom: hfpll: CLK_IGNORE_UNUSED
  clk: qcom: hfpll: use clk_parent_data to specify the parent
  clk: qcom: apcs-msm8916: silently error out on EPROBE_DEFER

Niklas Cassel (1):
  clk: qcom: apcs-msm8916: use clk_parent_data to specify the parent

 .../mailbox/qcom,apcs-kpss-global.txt         | 24 ++++++++++++++---
 drivers/clk/qcom/apcs-msm8916.c               | 26 ++++++++++++++-----
 drivers/clk/qcom/clk-alpha-pll.c              |  8 ++++++
 drivers/clk/qcom/clk-alpha-pll.h              |  1 +
 drivers/clk/qcom/gcc-qcs404.c                 |  2 +-
 drivers/clk/qcom/hfpll.c                      | 21 +++++++++++++--
 6 files changed, 70 insertions(+), 12 deletions(-)

-- 
2.23.0


^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH v3 1/7] dt-bindings: mailbox: qcom: Add clock-name optional property
  2019-11-25 13:59 [PATCH v3 0/7] Clock changes to support cpufreq on QCS404 Niklas Cassel
@ 2019-11-25 13:59 ` Niklas Cassel
  2019-11-25 13:59 ` [PATCH v3 2/7] clk: qcom: gcc: limit GPLL0_AO_OUT operating frequency Niklas Cassel
                   ` (5 subsequent siblings)
  6 siblings, 0 replies; 8+ messages in thread
From: Niklas Cassel @ 2019-11-25 13:59 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson
  Cc: linux-arm-msm, amit.kucheria, sboyd, Jorge Ramirez-Ortiz,
	Niklas Cassel, Rob Herring, Mark Rutland, devicetree,
	linux-kernel

From: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>

When the APCS clock is registered (platform dependent), it retrieves
its parent names from hardcoded values in the driver.

The following commit allows the DT node to provide such clock names to
the platform data based clock driver therefore avoiding having to
explicitly embed those names in the clock driver source code.

Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
Changes since v2:
-Swapped order of "pll" and "aux", in order to not break
DT backwards compatibility (in case no clock-names are given).

 .../mailbox/qcom,apcs-kpss-global.txt         | 24 ++++++++++++++++---
 1 file changed, 21 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt
index 0278482af65c..beec612dbe6a 100644
--- a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt
+++ b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt
@@ -21,10 +21,11 @@ platforms.
 	Usage: required
 	Value type: <prop-encoded-array>
 	Definition: must specify the base address and size of the global block
+
 - clocks:
-	Usage: required if #clocks-cells property is present
-	Value type: <phandle>
-	Definition: phandle to the input PLL, which feeds the APCS mux/divider
+	Usage: required if #clock-names property is present
+	Value type: <phandle array>
+	Definition: phandles to the two parent clocks of the clock driver.
 
 - #mbox-cells:
 	Usage: required
@@ -36,6 +37,12 @@ platforms.
 	Value type: <u32>
 	Definition: as described in clock.txt, must be 0
 
+- clock-names:
+	Usage: required if the platform data based clock driver needs to
+	retrieve the parent clock names from device tree.
+	This will requires two mandatory clocks to be defined.
+	Value type: <string-array>
+	Definition: must be "pll" and "aux"
 
 = EXAMPLE
 The following example describes the APCS HMSS found in MSM8996 and part of the
@@ -68,3 +75,14 @@ Below is another example of the APCS binding on MSM8916 platforms:
 		clocks = <&a53pll>;
 		#clock-cells = <0>;
 	};
+
+Below is another example of the APCS binding on QCS404 platforms:
+
+	apcs_glb: mailbox@b011000 {
+		compatible = "qcom,qcs404-apcs-apps-global", "syscon";
+		reg = <0x0b011000 0x1000>;
+		#mbox-cells = <1>;
+		clocks = <&apcs_hfpll>, <&gcc GCC_GPLL0_AO_OUT_MAIN>;
+		clock-names = "pll", "aux";
+		#clock-cells = <0>;
+	};
-- 
2.23.0


^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH v3 2/7] clk: qcom: gcc: limit GPLL0_AO_OUT operating frequency
  2019-11-25 13:59 [PATCH v3 0/7] Clock changes to support cpufreq on QCS404 Niklas Cassel
  2019-11-25 13:59 ` [PATCH v3 1/7] dt-bindings: mailbox: qcom: Add clock-name optional property Niklas Cassel
@ 2019-11-25 13:59 ` Niklas Cassel
  2019-11-25 13:59 ` [PATCH v3 3/7] clk: qcom: hfpll: register as clock provider Niklas Cassel
                   ` (4 subsequent siblings)
  6 siblings, 0 replies; 8+ messages in thread
From: Niklas Cassel @ 2019-11-25 13:59 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson
  Cc: linux-arm-msm, amit.kucheria, sboyd, Jorge Ramirez-Ortiz,
	Niklas Cassel, Michael Turquette, linux-clk, linux-kernel

From: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>

Limit the GPLL0_AO_OUT_MAIN operating frequency as per its hardware
specifications.

Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
---
Changes since v2:
-None

 drivers/clk/qcom/clk-alpha-pll.c | 8 ++++++++
 drivers/clk/qcom/clk-alpha-pll.h | 1 +
 drivers/clk/qcom/gcc-qcs404.c    | 2 +-
 3 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
index 055318f97991..9228b7b1f56e 100644
--- a/drivers/clk/qcom/clk-alpha-pll.c
+++ b/drivers/clk/qcom/clk-alpha-pll.c
@@ -878,6 +878,14 @@ static long clk_trion_pll_round_rate(struct clk_hw *hw, unsigned long rate,
 	return clamp(rate, min_freq, max_freq);
 }
 
+const struct clk_ops clk_alpha_pll_fixed_ops = {
+	.enable = clk_alpha_pll_enable,
+	.disable = clk_alpha_pll_disable,
+	.is_enabled = clk_alpha_pll_is_enabled,
+	.recalc_rate = clk_alpha_pll_recalc_rate,
+};
+EXPORT_SYMBOL_GPL(clk_alpha_pll_fixed_ops);
+
 const struct clk_ops clk_alpha_pll_ops = {
 	.enable = clk_alpha_pll_enable,
 	.disable = clk_alpha_pll_disable,
diff --git a/drivers/clk/qcom/clk-alpha-pll.h b/drivers/clk/qcom/clk-alpha-pll.h
index 15f27f4b06df..c28eb1a08c0c 100644
--- a/drivers/clk/qcom/clk-alpha-pll.h
+++ b/drivers/clk/qcom/clk-alpha-pll.h
@@ -109,6 +109,7 @@ struct alpha_pll_config {
 };
 
 extern const struct clk_ops clk_alpha_pll_ops;
+extern const struct clk_ops clk_alpha_pll_fixed_ops;
 extern const struct clk_ops clk_alpha_pll_hwfsm_ops;
 extern const struct clk_ops clk_alpha_pll_postdiv_ops;
 extern const struct clk_ops clk_alpha_pll_huayra_ops;
diff --git a/drivers/clk/qcom/gcc-qcs404.c b/drivers/clk/qcom/gcc-qcs404.c
index 9b0c4ce2ef4e..46d314d69250 100644
--- a/drivers/clk/qcom/gcc-qcs404.c
+++ b/drivers/clk/qcom/gcc-qcs404.c
@@ -330,7 +330,7 @@ static struct clk_alpha_pll gpll0_ao_out_main = {
 			.parent_names = (const char *[]){ "cxo" },
 			.num_parents = 1,
 			.flags = CLK_IS_CRITICAL,
-			.ops = &clk_alpha_pll_ops,
+			.ops = &clk_alpha_pll_fixed_ops,
 		},
 	},
 };
-- 
2.23.0


^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH v3 3/7] clk: qcom: hfpll: register as clock provider
  2019-11-25 13:59 [PATCH v3 0/7] Clock changes to support cpufreq on QCS404 Niklas Cassel
  2019-11-25 13:59 ` [PATCH v3 1/7] dt-bindings: mailbox: qcom: Add clock-name optional property Niklas Cassel
  2019-11-25 13:59 ` [PATCH v3 2/7] clk: qcom: gcc: limit GPLL0_AO_OUT operating frequency Niklas Cassel
@ 2019-11-25 13:59 ` Niklas Cassel
  2019-11-25 13:59 ` [PATCH v3 4/7] clk: qcom: hfpll: CLK_IGNORE_UNUSED Niklas Cassel
                   ` (3 subsequent siblings)
  6 siblings, 0 replies; 8+ messages in thread
From: Niklas Cassel @ 2019-11-25 13:59 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson
  Cc: linux-arm-msm, amit.kucheria, sboyd, Jorge Ramirez-Ortiz,
	Niklas Cassel, Michael Turquette, linux-clk, linux-kernel

From: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>

Make the output of the high frequency pll a clock provider.
On the QCS404 this PLL controls cpu frequency scaling.

Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
---
Changes since v2:
-None

 drivers/clk/qcom/hfpll.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/qcom/hfpll.c b/drivers/clk/qcom/hfpll.c
index a6de7101430c..e64c0fd82fe4 100644
--- a/drivers/clk/qcom/hfpll.c
+++ b/drivers/clk/qcom/hfpll.c
@@ -57,6 +57,7 @@ static int qcom_hfpll_probe(struct platform_device *pdev)
 		.num_parents = 1,
 		.ops = &clk_ops_hfpll,
 	};
+	int ret;
 
 	h = devm_kzalloc(dev, sizeof(*h), GFP_KERNEL);
 	if (!h)
@@ -79,7 +80,14 @@ static int qcom_hfpll_probe(struct platform_device *pdev)
 	h->clkr.hw.init = &init;
 	spin_lock_init(&h->lock);
 
-	return devm_clk_register_regmap(&pdev->dev, &h->clkr);
+	ret = devm_clk_register_regmap(dev, &h->clkr);
+	if (ret) {
+		dev_err(dev, "failed to register regmap clock: %d\n", ret);
+		return ret;
+	}
+
+	return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
+					   &h->clkr.hw);
 }
 
 static struct platform_driver qcom_hfpll_driver = {
-- 
2.23.0


^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH v3 4/7] clk: qcom: hfpll: CLK_IGNORE_UNUSED
  2019-11-25 13:59 [PATCH v3 0/7] Clock changes to support cpufreq on QCS404 Niklas Cassel
                   ` (2 preceding siblings ...)
  2019-11-25 13:59 ` [PATCH v3 3/7] clk: qcom: hfpll: register as clock provider Niklas Cassel
@ 2019-11-25 13:59 ` Niklas Cassel
  2019-11-25 13:59 ` [PATCH v3 5/7] clk: qcom: hfpll: use clk_parent_data to specify the parent Niklas Cassel
                   ` (2 subsequent siblings)
  6 siblings, 0 replies; 8+ messages in thread
From: Niklas Cassel @ 2019-11-25 13:59 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson
  Cc: linux-arm-msm, amit.kucheria, sboyd, Jorge Ramirez-Ortiz,
	Niklas Cassel, Michael Turquette, linux-clk, linux-kernel

From: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>

When COMMON_CLK_DISABLED_UNUSED is set, in an effort to save power and
to keep the software model of the clock in line with reality, the
framework transverses the clock tree and disables those clocks that
were enabled by the firmware but have not been enabled by any device
driver.

If CPUFREQ is enabled, early during the system boot, it might attempt
to change the CPU frequency ("set_rate"). If the HFPLL is selected as
a provider, it will then change the rate for this clock.

As boot continues, clk_disable_unused_subtree will run. Since it wont
find a valid counter (enable_count) for a clock that is actually
enabled it will attempt to disable it which will cause the CPU to
stop. Notice that in this driver, calls to check whether the clock is
enabled are routed via the is_enabled callback which queries the
hardware.

The following commit, rather than marking the clock critical and
forcing the clock to be always enabled, addresses the above scenario
making sure the clock is not disabled but it continues to rely on the
firmware to enable the clock.

Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
Changes since v2:
-None

 drivers/clk/qcom/hfpll.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/clk/qcom/hfpll.c b/drivers/clk/qcom/hfpll.c
index e64c0fd82fe4..225c675f6779 100644
--- a/drivers/clk/qcom/hfpll.c
+++ b/drivers/clk/qcom/hfpll.c
@@ -56,6 +56,13 @@ static int qcom_hfpll_probe(struct platform_device *pdev)
 		.parent_names = (const char *[]){ "xo" },
 		.num_parents = 1,
 		.ops = &clk_ops_hfpll,
+		/*
+		 * rather than marking the clock critical and forcing the clock
+		 * to be always enabled, we make sure that the clock is not
+		 * disabled: the firmware remains responsible of enabling this
+		 * clock (for more info check the commit log)
+		 */
+		.flags = CLK_IGNORE_UNUSED,
 	};
 	int ret;
 
-- 
2.23.0


^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH v3 5/7] clk: qcom: hfpll: use clk_parent_data to specify the parent
  2019-11-25 13:59 [PATCH v3 0/7] Clock changes to support cpufreq on QCS404 Niklas Cassel
                   ` (3 preceding siblings ...)
  2019-11-25 13:59 ` [PATCH v3 4/7] clk: qcom: hfpll: CLK_IGNORE_UNUSED Niklas Cassel
@ 2019-11-25 13:59 ` Niklas Cassel
  2019-11-25 13:59 ` [PATCH v3 6/7] clk: qcom: apcs-msm8916: silently error out on EPROBE_DEFER Niklas Cassel
  2019-11-25 13:59 ` [PATCH v3 7/7] clk: qcom: apcs-msm8916: use clk_parent_data to specify the parent Niklas Cassel
  6 siblings, 0 replies; 8+ messages in thread
From: Niklas Cassel @ 2019-11-25 13:59 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson
  Cc: linux-arm-msm, amit.kucheria, sboyd, Jorge Ramirez-Ortiz,
	Niklas Cassel, Michael Turquette, linux-clk, linux-kernel

From: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>

This permits extending the driver to other platforms without having to
modify its source code.

Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
---
Changes since v2:
-None

 drivers/clk/qcom/hfpll.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/qcom/hfpll.c b/drivers/clk/qcom/hfpll.c
index 225c675f6779..5ff7f5a60620 100644
--- a/drivers/clk/qcom/hfpll.c
+++ b/drivers/clk/qcom/hfpll.c
@@ -53,7 +53,6 @@ static int qcom_hfpll_probe(struct platform_device *pdev)
 	struct regmap *regmap;
 	struct clk_hfpll *h;
 	struct clk_init_data init = {
-		.parent_names = (const char *[]){ "xo" },
 		.num_parents = 1,
 		.ops = &clk_ops_hfpll,
 		/*
@@ -65,6 +64,7 @@ static int qcom_hfpll_probe(struct platform_device *pdev)
 		.flags = CLK_IGNORE_UNUSED,
 	};
 	int ret;
+	struct clk_parent_data pdata = { .index = 0 };
 
 	h = devm_kzalloc(dev, sizeof(*h), GFP_KERNEL);
 	if (!h)
@@ -83,6 +83,8 @@ static int qcom_hfpll_probe(struct platform_device *pdev)
 					  0, &init.name))
 		return -ENODEV;
 
+	init.parent_data = &pdata;
+
 	h->d = &hdata;
 	h->clkr.hw.init = &init;
 	spin_lock_init(&h->lock);
-- 
2.23.0


^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH v3 6/7] clk: qcom: apcs-msm8916: silently error out on EPROBE_DEFER
  2019-11-25 13:59 [PATCH v3 0/7] Clock changes to support cpufreq on QCS404 Niklas Cassel
                   ` (4 preceding siblings ...)
  2019-11-25 13:59 ` [PATCH v3 5/7] clk: qcom: hfpll: use clk_parent_data to specify the parent Niklas Cassel
@ 2019-11-25 13:59 ` Niklas Cassel
  2019-11-25 13:59 ` [PATCH v3 7/7] clk: qcom: apcs-msm8916: use clk_parent_data to specify the parent Niklas Cassel
  6 siblings, 0 replies; 8+ messages in thread
From: Niklas Cassel @ 2019-11-25 13:59 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson
  Cc: linux-arm-msm, amit.kucheria, sboyd, Jorge Ramirez-Ortiz,
	Niklas Cassel, Michael Turquette, linux-clk, linux-kernel

From: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>

If devm_clk_get() fails due to probe deferral, we shouldn't print an
error message. Just be silent in this case.

Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
---
Changes since v2:
-New patch. (This change was previously part of another
patch in this series.)

 drivers/clk/qcom/apcs-msm8916.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/qcom/apcs-msm8916.c b/drivers/clk/qcom/apcs-msm8916.c
index a6c89a310b18..46061b3d230e 100644
--- a/drivers/clk/qcom/apcs-msm8916.c
+++ b/drivers/clk/qcom/apcs-msm8916.c
@@ -79,7 +79,8 @@ static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev)
 	a53cc->pclk = devm_clk_get(parent, NULL);
 	if (IS_ERR(a53cc->pclk)) {
 		ret = PTR_ERR(a53cc->pclk);
-		dev_err(dev, "failed to get clk: %d\n", ret);
+		if (ret != -EPROBE_DEFER)
+			dev_err(dev, "failed to get clk: %d\n", ret);
 		return ret;
 	}
 
-- 
2.23.0


^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH v3 7/7] clk: qcom: apcs-msm8916: use clk_parent_data to specify the parent
  2019-11-25 13:59 [PATCH v3 0/7] Clock changes to support cpufreq on QCS404 Niklas Cassel
                   ` (5 preceding siblings ...)
  2019-11-25 13:59 ` [PATCH v3 6/7] clk: qcom: apcs-msm8916: silently error out on EPROBE_DEFER Niklas Cassel
@ 2019-11-25 13:59 ` Niklas Cassel
  6 siblings, 0 replies; 8+ messages in thread
From: Niklas Cassel @ 2019-11-25 13:59 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson
  Cc: linux-arm-msm, amit.kucheria, sboyd, Niklas Cassel,
	Michael Turquette, linux-clk, linux-kernel

Allow accessing the parent clock names required for the driver
operation by using the device tree node, while falling back to
the previous method of using names in the global name space.

This permits extending the driver to other platforms without having to
modify its source code.

Co-developed-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
---
Changes since v2:
-Use clk_parent_data when specifying clock parents.

 drivers/clk/qcom/apcs-msm8916.c | 23 ++++++++++++++++++-----
 1 file changed, 18 insertions(+), 5 deletions(-)

diff --git a/drivers/clk/qcom/apcs-msm8916.c b/drivers/clk/qcom/apcs-msm8916.c
index 46061b3d230e..bb91644edc00 100644
--- a/drivers/clk/qcom/apcs-msm8916.c
+++ b/drivers/clk/qcom/apcs-msm8916.c
@@ -19,9 +19,9 @@
 
 static const u32 gpll0_a53cc_map[] = { 4, 5 };
 
-static const char * const gpll0_a53cc[] = {
-	"gpll0_vote",
-	"a53pll",
+static const struct clk_parent_data pdata[] = {
+	{ .fw_name = "aux", .name = "gpll0_vote", },
+	{ .fw_name = "pll", .name = "a53pll", },
 };
 
 /*
@@ -51,6 +51,19 @@ static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev)
 	struct clk_init_data init = { };
 	int ret = -ENODEV;
 
+	/*
+	 * This driver is defined by the devicetree binding
+	 * Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt,
+	 * however, this driver is registered as a platform device by
+	 * qcom-apcs-ipc-mailbox.c. Because of this, when this driver
+	 * uses dev_get_regmap() and devm_clk_get(), it has to send the parent
+	 * device as argument.
+	 * When registering with the clock framework, we cannot use this trick,
+	 * since the clock framework always looks at dev->of_node when it tries
+	 * to find parent clock names using clk_parent_data.
+	 */
+	dev->of_node = parent->of_node;
+
 	regmap = dev_get_regmap(parent, NULL);
 	if (!regmap) {
 		dev_err(dev, "failed to get regmap: %d\n", ret);
@@ -62,8 +75,8 @@ static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev)
 		return -ENOMEM;
 
 	init.name = "a53mux";
-	init.parent_names = gpll0_a53cc;
-	init.num_parents = ARRAY_SIZE(gpll0_a53cc);
+	init.parent_data = pdata;
+	init.num_parents = ARRAY_SIZE(pdata);
 	init.ops = &clk_regmap_mux_div_ops;
 	init.flags = CLK_SET_RATE_PARENT;
 
-- 
2.23.0


^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, back to index

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-11-25 13:59 [PATCH v3 0/7] Clock changes to support cpufreq on QCS404 Niklas Cassel
2019-11-25 13:59 ` [PATCH v3 1/7] dt-bindings: mailbox: qcom: Add clock-name optional property Niklas Cassel
2019-11-25 13:59 ` [PATCH v3 2/7] clk: qcom: gcc: limit GPLL0_AO_OUT operating frequency Niklas Cassel
2019-11-25 13:59 ` [PATCH v3 3/7] clk: qcom: hfpll: register as clock provider Niklas Cassel
2019-11-25 13:59 ` [PATCH v3 4/7] clk: qcom: hfpll: CLK_IGNORE_UNUSED Niklas Cassel
2019-11-25 13:59 ` [PATCH v3 5/7] clk: qcom: hfpll: use clk_parent_data to specify the parent Niklas Cassel
2019-11-25 13:59 ` [PATCH v3 6/7] clk: qcom: apcs-msm8916: silently error out on EPROBE_DEFER Niklas Cassel
2019-11-25 13:59 ` [PATCH v3 7/7] clk: qcom: apcs-msm8916: use clk_parent_data to specify the parent Niklas Cassel

Linux-ARM-MSM Archive on lore.kernel.org

Archives are clonable:
	git clone --mirror https://lore.kernel.org/linux-arm-msm/0 linux-arm-msm/git/0.git

	# If you have public-inbox 1.1+ installed, you may
	# initialize and index your mirror using the following commands:
	public-inbox-init -V2 linux-arm-msm linux-arm-msm/ https://lore.kernel.org/linux-arm-msm \
		linux-arm-msm@vger.kernel.org
	public-inbox-index linux-arm-msm

Example config snippet for mirrors

Newsgroup available over NNTP:
	nntp://nntp.lore.kernel.org/org.kernel.vger.linux-arm-msm


AGPL code for this site: git clone https://public-inbox.org/public-inbox.git