* [PATCH] drm/msm/dsi_pll_7nm: Fix variable usage for pll_lockdet_rate
@ 2021-02-24 23:05 Dmitry Baryshkov
2021-02-25 7:26 ` [Freedreno] " abhinavk
2021-05-26 19:03 ` patchwork-bot+linux-arm-msm
0 siblings, 2 replies; 3+ messages in thread
From: Dmitry Baryshkov @ 2021-02-24 23:05 UTC (permalink / raw)
To: Rob Clark, Sean Paul; +Cc: linux-arm-msm, dri-devel, freedreno
The PLL_LOCKDET_RATE_1 was being programmed with a hardcoded value
directly, but the same value was also being specified in the
dsi_pll_regs struct pll_lockdet_rate variable: let's use it!
Based on 362cadf34b9f ("drm/msm/dsi_pll_10nm: Fix variable usage for
pll_lockdet_rate")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/dsi/pll/dsi_pll_7nm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_7nm.c b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_7nm.c
index 0458eda15114..e29b3bfd63d1 100644
--- a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_7nm.c
+++ b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_7nm.c
@@ -325,7 +325,7 @@ static void dsi_pll_commit(struct dsi_pll_7nm *pll)
pll_write(base + REG_DSI_7nm_PHY_PLL_FRAC_DIV_START_LOW_1, reg->frac_div_start_low);
pll_write(base + REG_DSI_7nm_PHY_PLL_FRAC_DIV_START_MID_1, reg->frac_div_start_mid);
pll_write(base + REG_DSI_7nm_PHY_PLL_FRAC_DIV_START_HIGH_1, reg->frac_div_start_high);
- pll_write(base + REG_DSI_7nm_PHY_PLL_PLL_LOCKDET_RATE_1, 0x40);
+ pll_write(base + REG_DSI_7nm_PHY_PLL_PLL_LOCKDET_RATE_1, reg->pll_lockdet_rate);
pll_write(base + REG_DSI_7nm_PHY_PLL_PLL_LOCK_DELAY, 0x06);
pll_write(base + REG_DSI_7nm_PHY_PLL_CMODE_1, 0x10); /* TODO: 0x00 for CPHY */
pll_write(base + REG_DSI_7nm_PHY_PLL_CLOCK_INVERTERS, reg->pll_clock_inverters);
--
2.30.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [Freedreno] [PATCH] drm/msm/dsi_pll_7nm: Fix variable usage for pll_lockdet_rate
2021-02-24 23:05 [PATCH] drm/msm/dsi_pll_7nm: Fix variable usage for pll_lockdet_rate Dmitry Baryshkov
@ 2021-02-25 7:26 ` abhinavk
2021-05-26 19:03 ` patchwork-bot+linux-arm-msm
1 sibling, 0 replies; 3+ messages in thread
From: abhinavk @ 2021-02-25 7:26 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Rob Clark, Sean Paul, linux-arm-msm, freedreno, dri-devel
Hi Dmitry
Thanks for the patch.
On 2021-02-24 15:05, Dmitry Baryshkov wrote:
> The PLL_LOCKDET_RATE_1 was being programmed with a hardcoded value
> directly, but the same value was also being specified in the
> dsi_pll_regs struct pll_lockdet_rate variable: let's use it!
>
> Based on 362cadf34b9f ("drm/msm/dsi_pll_10nm: Fix variable usage for
> pll_lockdet_rate")
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
> ---
> drivers/gpu/drm/msm/dsi/pll/dsi_pll_7nm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_7nm.c
> b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_7nm.c
> index 0458eda15114..e29b3bfd63d1 100644
> --- a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_7nm.c
> +++ b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_7nm.c
> @@ -325,7 +325,7 @@ static void dsi_pll_commit(struct dsi_pll_7nm *pll)
> pll_write(base + REG_DSI_7nm_PHY_PLL_FRAC_DIV_START_LOW_1,
> reg->frac_div_start_low);
> pll_write(base + REG_DSI_7nm_PHY_PLL_FRAC_DIV_START_MID_1,
> reg->frac_div_start_mid);
> pll_write(base + REG_DSI_7nm_PHY_PLL_FRAC_DIV_START_HIGH_1,
> reg->frac_div_start_high);
> - pll_write(base + REG_DSI_7nm_PHY_PLL_PLL_LOCKDET_RATE_1, 0x40);
> + pll_write(base + REG_DSI_7nm_PHY_PLL_PLL_LOCKDET_RATE_1,
> reg->pll_lockdet_rate);
> pll_write(base + REG_DSI_7nm_PHY_PLL_PLL_LOCK_DELAY, 0x06);
> pll_write(base + REG_DSI_7nm_PHY_PLL_CMODE_1, 0x10); /* TODO: 0x00
> for CPHY */
> pll_write(base + REG_DSI_7nm_PHY_PLL_CLOCK_INVERTERS,
> reg->pll_clock_inverters);
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] drm/msm/dsi_pll_7nm: Fix variable usage for pll_lockdet_rate
2021-02-24 23:05 [PATCH] drm/msm/dsi_pll_7nm: Fix variable usage for pll_lockdet_rate Dmitry Baryshkov
2021-02-25 7:26 ` [Freedreno] " abhinavk
@ 2021-05-26 19:03 ` patchwork-bot+linux-arm-msm
1 sibling, 0 replies; 3+ messages in thread
From: patchwork-bot+linux-arm-msm @ 2021-05-26 19:03 UTC (permalink / raw)
To: Dmitry Baryshkov; +Cc: linux-arm-msm
Hello:
This patch was applied to qcom/linux.git (refs/heads/for-next):
On Thu, 25 Feb 2021 02:05:28 +0300 you wrote:
> The PLL_LOCKDET_RATE_1 was being programmed with a hardcoded value
> directly, but the same value was also being specified in the
> dsi_pll_regs struct pll_lockdet_rate variable: let's use it!
>
> Based on 362cadf34b9f ("drm/msm/dsi_pll_10nm: Fix variable usage for
> pll_lockdet_rate")
>
> [...]
Here is the summary with links:
- drm/msm/dsi_pll_7nm: Fix variable usage for pll_lockdet_rate
https://git.kernel.org/qcom/c/9daaf3130785
You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html
^ permalink raw reply [flat|nested] 3+ messages in thread
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2021-02-24 23:05 [PATCH] drm/msm/dsi_pll_7nm: Fix variable usage for pll_lockdet_rate Dmitry Baryshkov
2021-02-25 7:26 ` [Freedreno] " abhinavk
2021-05-26 19:03 ` patchwork-bot+linux-arm-msm
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