* [PATCH V2 1/2] dt-bindings: clk: qcom: gcc-sm6125: Document SM6125 GCC driver
@ 2021-05-23 21:10 Martin Botka
2021-05-24 21:39 ` Rob Herring
[not found] ` <20210523211016.726736-2-martin.botka@somainline.org>
0 siblings, 2 replies; 3+ messages in thread
From: Martin Botka @ 2021-05-23 21:10 UTC (permalink / raw)
Cc: ~postmarketos/upstreaming, konrad.dybcio,
angelogioacchino.delregno, marijn.suijten, Martin Botka,
Andy Gross, Bjorn Andersson, Michael Turquette, Stephen Boyd,
Rob Herring, linux-arm-msm, linux-clk, devicetree, linux-kernel
Document the newly added SM6125 GCC driver.
Signed-off-by: Martin Botka <martin.botka@somainline.org>
---
Changes in V2:
Add commit description.
.../bindings/clock/qcom,gcc-sm6125.yaml | 72 +++++++++++++++++++
1 file changed, 72 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml
new file mode 100644
index 000000000000..f7198370a1b9
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml
@@ -0,0 +1,72 @@
+# SPDX-License-Identifier: GPL-2.0-only
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,gcc-sm6125.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Global Clock & Reset Controller Binding for SM6125
+
+maintainers:
+ - Konrad Dybcio <konrad.dybcio@somainline.org>
+
+description: |
+ Qualcomm global clock control module which supports the clocks, resets and
+ power domains on SM6125.
+
+ See also:
+ - dt-bindings/clock/qcom,gcc-sm6125.h
+
+properties:
+ compatible:
+ const: qcom,gcc-sm6125
+
+ clocks:
+ items:
+ - description: Board XO source
+ - description: Sleep clock source
+
+ clock-names:
+ items:
+ - const: bi_tcxo
+ - const: sleep_clk
+
+ '#clock-cells':
+ const: 1
+
+ '#reset-cells':
+ const: 1
+
+ '#power-domain-cells':
+ const: 1
+
+ reg:
+ maxItems: 1
+
+ protected-clocks:
+ description:
+ Protected clock specifier list as per common clock binding.
+
+required:
+ - compatible
+ - clocks
+ - clock-names
+ - reg
+ - '#clock-cells'
+ - '#reset-cells'
+ - '#power-domain-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,rpmh.h>
+ clock-controller@1400000 {
+ compatible = "qcom,gcc-sm6125";
+ reg = <0x01400000 0x1f0000>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ #power-domain-cells = <1>;
+ clock-names = "bi_tcxo", "sleep_clk";
+ clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&sleep_clk>;
+ };
+...
--
2.31.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH V2 1/2] dt-bindings: clk: qcom: gcc-sm6125: Document SM6125 GCC driver
2021-05-23 21:10 [PATCH V2 1/2] dt-bindings: clk: qcom: gcc-sm6125: Document SM6125 GCC driver Martin Botka
@ 2021-05-24 21:39 ` Rob Herring
[not found] ` <20210523211016.726736-2-martin.botka@somainline.org>
1 sibling, 0 replies; 3+ messages in thread
From: Rob Herring @ 2021-05-24 21:39 UTC (permalink / raw)
To: Martin Botka
Cc: konrad.dybcio, linux-arm-msm, Stephen Boyd,
~postmarketos/upstreaming, linux-clk, devicetree,
Bjorn Andersson, Andy Gross, angelogioacchino.delregno,
Michael Turquette, linux-kernel, Rob Herring, marijn.suijten
On Sun, 23 May 2021 23:10:13 +0200, Martin Botka wrote:
> Document the newly added SM6125 GCC driver.
>
> Signed-off-by: Martin Botka <martin.botka@somainline.org>
> ---
> Changes in V2:
> Add commit description.
> .../bindings/clock/qcom,gcc-sm6125.yaml | 72 +++++++++++++++++++
> 1 file changed, 72 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
Error: Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.example.dts:27.28-29 syntax error
FATAL ERROR: Unable to parse input tree
make[1]: *** [scripts/Makefile.lib:380: Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.example.dt.yaml] Error 1
make[1]: *** Waiting for unfinished jobs....
make: *** [Makefile:1416: dt_binding_check] Error 2
See https://patchwork.ozlabs.org/patch/1482526
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH V2 2/2] clk: qcom: Add SM6125 (TRINKET) GCC driver
[not found] ` <20210523211016.726736-2-martin.botka@somainline.org>
@ 2021-05-25 3:12 ` Bjorn Andersson
0 siblings, 0 replies; 3+ messages in thread
From: Bjorn Andersson @ 2021-05-25 3:12 UTC (permalink / raw)
To: Martin Botka
Cc: ~postmarketos/upstreaming, konrad.dybcio,
angelogioacchino.delregno, marijn.suijten, Andy Gross,
Michael Turquette, Stephen Boyd, Rob Herring, linux-arm-msm,
linux-clk, devicetree, linux-kernel
On Sun 23 May 16:10 CDT 2021, Martin Botka wrote:
> From: Konrad Dybcio <konrad.dybcio@somainline.org>
>
> Add the clocks supported in global clock controller, which clock the
> peripherals like BLSPs, SDCC, USB, MDSS etc. Register all the clocks
> to the clock framework for the clients to be able to request for them.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
> Signed-off-by: Martin Botka <martin.botka@somainline.org>
This looks quite good to me, just two small things below.
> diff --git a/drivers/clk/qcom/gcc-sm6125.c b/drivers/clk/qcom/gcc-sm6125.c
[..]
> +static struct clk_alpha_pll gpll0_out_early = {
> + .offset = 0x0,
> + .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT],
> + .clkr = {
> + .enable_reg = 0x79000,
> + .enable_mask = BIT(0),
> + .hw.init = &(struct clk_init_data){
> + .name = "gpll0_out_early",
> + .parent_data = &(const struct clk_parent_data){
> + .fw_name = "bi_tcxo",
> + .name = "bi_tcxo",
For new drivers we don't need to rely on global name lookup, so just
keep fw_name for the external clocks.
> + },
> + .num_parents = 1,
> + .ops = &clk_alpha_pll_ops,
> + },
> + },
> +};
> +
> +static struct clk_fixed_factor gpll0_out_aux2 = {
> + .mult = 1,
> + .div = 2,
> + .hw.init = &(struct clk_init_data){
> + .name = "gpll0_out_aux2",
> + .parent_data = &(const struct clk_parent_data){
> + .hw = &gpll0_out_early.clkr.hw,
> + },
> + .num_parents = 1,
> + .ops = &clk_fixed_factor_ops,
> + },
> +};
> +
> +static struct clk_fixed_factor gpll0_out_main = {
> + .mult = 1,
> + .div = 2,
> + .hw.init = &(struct clk_init_data){
> + .name = "gpll0_out_main",
> + .parent_data = &(const struct clk_parent_data){
Please use parent_hws instead when referencing a single hw in the same
driver.
> + .hw = &gpll0_out_early.clkr.hw,
> + },
> + .num_parents = 1,
> + .ops = &clk_fixed_factor_ops,
> + },
> +};
> +
Regards,
Bjorn
^ permalink raw reply [flat|nested] 3+ messages in thread
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2021-05-23 21:10 [PATCH V2 1/2] dt-bindings: clk: qcom: gcc-sm6125: Document SM6125 GCC driver Martin Botka
2021-05-24 21:39 ` Rob Herring
[not found] ` <20210523211016.726736-2-martin.botka@somainline.org>
2021-05-25 3:12 ` [PATCH V2 2/2] clk: qcom: Add SM6125 (TRINKET) " Bjorn Andersson
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