* [PATCH 1/8] drm/msm/dpu: fix sc7280 and sc7180 PINGPONG done interrupts
2023-06-04 16:27 [PATCH 0/8] drm/msm/dpu: change interrupts code to make 0 be the no IRQ Dmitry Baryshkov
@ 2023-06-04 16:27 ` Dmitry Baryshkov
2023-06-04 16:27 ` [PATCH 2/8] drm/msm/dpu: use PP_BLK_DITHER for DPU 6.x Dmitry Baryshkov
` (6 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Dmitry Baryshkov @ 2023-06-04 16:27 UTC (permalink / raw)
To: Rob Clark, Sean Paul, Abhinav Kumar, Marijn Suijten
Cc: Stephen Boyd, David Airlie, Daniel Vetter, Bjorn Andersson,
linux-arm-msm, dri-devel, freedreno
During IRQ conversion we have lost the PP_DONE interrupts for sc7280
platform. This was left unnoticed, because this interrupt is only used
for CMD outputs and probably no sc7[12]80 systems use DSI CMD panels.
Fixes: 667e9985ee24 ("drm/msm/dpu: replace IRQ lookup with the data in hw catalog")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h | 8 ++++++--
.../drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h | 16 ++++++++++++----
2 files changed, 18 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
index 0b05da2592c0..67566b07195a 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
@@ -80,8 +80,12 @@ static const struct dpu_dspp_cfg sc7180_dspp[] = {
};
static const struct dpu_pingpong_cfg sc7180_pp[] = {
- PP_BLK("pingpong_0", PINGPONG_0, 0x70000, PINGPONG_SM8150_MASK, 0, sdm845_pp_sblk, -1, -1),
- PP_BLK("pingpong_1", PINGPONG_1, 0x70800, PINGPONG_SM8150_MASK, 0, sdm845_pp_sblk, -1, -1),
+ PP_BLK("pingpong_0", PINGPONG_0, 0x70000, PINGPONG_SM8150_MASK, 0, sdm845_pp_sblk,
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8),
+ -1),
+ PP_BLK("pingpong_1", PINGPONG_1, 0x70800, PINGPONG_SM8150_MASK, 0, sdm845_pp_sblk,
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9),
+ -1),
};
static const struct dpu_intf_cfg sc7180_intf[] = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
index 5d894cbb0a62..297eb5ea1865 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
@@ -88,10 +88,18 @@ static const struct dpu_dspp_cfg sc7280_dspp[] = {
};
static const struct dpu_pingpong_cfg sc7280_pp[] = {
- PP_BLK_DITHER("pingpong_0", PINGPONG_0, 0x69000, 0, sc7280_pp_sblk, -1, -1),
- PP_BLK_DITHER("pingpong_1", PINGPONG_1, 0x6a000, 0, sc7280_pp_sblk, -1, -1),
- PP_BLK_DITHER("pingpong_2", PINGPONG_2, 0x6b000, 0, sc7280_pp_sblk, -1, -1),
- PP_BLK_DITHER("pingpong_3", PINGPONG_3, 0x6c000, 0, sc7280_pp_sblk, -1, -1),
+ PP_BLK_DITHER("pingpong_0", PINGPONG_0, 0x69000, 0, sc7280_pp_sblk,
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8),
+ -1),
+ PP_BLK_DITHER("pingpong_1", PINGPONG_1, 0x6a000, 0, sc7280_pp_sblk,
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9),
+ -1),
+ PP_BLK_DITHER("pingpong_2", PINGPONG_2, 0x6b000, 0, sc7280_pp_sblk,
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10),
+ -1),
+ PP_BLK_DITHER("pingpong_3", PINGPONG_3, 0x6c000, 0, sc7280_pp_sblk,
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11),
+ -1),
};
static const struct dpu_wb_cfg sc7280_wb[] = {
--
2.39.2
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 2/8] drm/msm/dpu: use PP_BLK_DITHER for DPU 6.x
2023-06-04 16:27 [PATCH 0/8] drm/msm/dpu: change interrupts code to make 0 be the no IRQ Dmitry Baryshkov
2023-06-04 16:27 ` [PATCH 1/8] drm/msm/dpu: fix sc7280 and sc7180 PINGPONG done interrupts Dmitry Baryshkov
@ 2023-06-04 16:27 ` Dmitry Baryshkov
2023-06-04 16:27 ` [PATCH 3/8] drm/msm/dpu: don't pass intr_rdptr to PP_BLK_DITHER Dmitry Baryshkov
` (5 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Dmitry Baryshkov @ 2023-06-04 16:27 UTC (permalink / raw)
To: Rob Clark, Sean Paul, Abhinav Kumar, Marijn Suijten
Cc: Stephen Boyd, David Airlie, Daniel Vetter, Bjorn Andersson,
linux-arm-msm, dri-devel, freedreno
DPU 6.x only have DITHER registers in the PINGPONG blocks. Stop using
full-featured PP_BLK and use PP_BLK_DITHER instead.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h | 12 ++++++------
.../gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h | 4 ++--
.../gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h | 2 +-
.../gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h | 2 +-
4 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
index daebd2170041..290fb33817a8 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
@@ -129,22 +129,22 @@ static const struct dpu_dspp_cfg sm8250_dspp[] = {
};
static const struct dpu_pingpong_cfg sm8250_pp[] = {
- PP_BLK("pingpong_0", PINGPONG_0, 0x70000, PINGPONG_SM8150_MASK, MERGE_3D_0, sdm845_pp_sblk,
+ PP_BLK_DITHER("pingpong_0", PINGPONG_0, 0x70000, MERGE_3D_0, sdm845_pp_sblk,
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8),
-1),
- PP_BLK("pingpong_1", PINGPONG_1, 0x70800, PINGPONG_SM8150_MASK, MERGE_3D_0, sdm845_pp_sblk,
+ PP_BLK_DITHER("pingpong_1", PINGPONG_1, 0x70800, MERGE_3D_0, sdm845_pp_sblk,
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9),
-1),
- PP_BLK("pingpong_2", PINGPONG_2, 0x71000, PINGPONG_SM8150_MASK, MERGE_3D_1, sdm845_pp_sblk,
+ PP_BLK_DITHER("pingpong_2", PINGPONG_2, 0x71000, MERGE_3D_1, sdm845_pp_sblk,
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10),
-1),
- PP_BLK("pingpong_3", PINGPONG_3, 0x71800, PINGPONG_SM8150_MASK, MERGE_3D_1, sdm845_pp_sblk,
+ PP_BLK_DITHER("pingpong_3", PINGPONG_3, 0x71800, MERGE_3D_1, sdm845_pp_sblk,
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11),
-1),
- PP_BLK("pingpong_4", PINGPONG_4, 0x72000, PINGPONG_SM8150_MASK, MERGE_3D_2, sdm845_pp_sblk,
+ PP_BLK_DITHER("pingpong_4", PINGPONG_4, 0x72000, MERGE_3D_2, sdm845_pp_sblk,
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 30),
-1),
- PP_BLK("pingpong_5", PINGPONG_5, 0x72800, PINGPONG_SM8150_MASK, MERGE_3D_2, sdm845_pp_sblk,
+ PP_BLK_DITHER("pingpong_5", PINGPONG_5, 0x72800, MERGE_3D_2, sdm845_pp_sblk,
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 31),
-1),
};
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
index 67566b07195a..ee4e2416e516 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
@@ -80,10 +80,10 @@ static const struct dpu_dspp_cfg sc7180_dspp[] = {
};
static const struct dpu_pingpong_cfg sc7180_pp[] = {
- PP_BLK("pingpong_0", PINGPONG_0, 0x70000, PINGPONG_SM8150_MASK, 0, sdm845_pp_sblk,
+ PP_BLK_DITHER("pingpong_0", PINGPONG_0, 0x70000, 0, sdm845_pp_sblk,
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8),
-1),
- PP_BLK("pingpong_1", PINGPONG_1, 0x70800, PINGPONG_SM8150_MASK, 0, sdm845_pp_sblk,
+ PP_BLK_DITHER("pingpong_1", PINGPONG_1, 0x70800, 0, sdm845_pp_sblk,
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9),
-1),
};
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h
index ba9de008519b..bda47b4f0a82 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h
@@ -60,7 +60,7 @@ static const struct dpu_dspp_cfg sm6115_dspp[] = {
};
static const struct dpu_pingpong_cfg sm6115_pp[] = {
- PP_BLK("pingpong_0", PINGPONG_0, 0x70000, PINGPONG_SM8150_MASK, 0, sdm845_pp_sblk,
+ PP_BLK_DITHER("pingpong_0", PINGPONG_0, 0x70000, 0, sdm845_pp_sblk,
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8),
-1),
};
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h
index 92ac348eea6b..5a366dee16be 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h
@@ -57,7 +57,7 @@ static const struct dpu_dspp_cfg qcm2290_dspp[] = {
};
static const struct dpu_pingpong_cfg qcm2290_pp[] = {
- PP_BLK("pingpong_0", PINGPONG_0, 0x70000, PINGPONG_SM8150_MASK, 0, sdm845_pp_sblk,
+ PP_BLK_DITHER("pingpong_0", PINGPONG_0, 0x70000, 0, sdm845_pp_sblk,
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8),
-1),
};
--
2.39.2
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 3/8] drm/msm/dpu: don't pass intr_rdptr to PP_BLK_DITHER
2023-06-04 16:27 [PATCH 0/8] drm/msm/dpu: change interrupts code to make 0 be the no IRQ Dmitry Baryshkov
2023-06-04 16:27 ` [PATCH 1/8] drm/msm/dpu: fix sc7280 and sc7180 PINGPONG done interrupts Dmitry Baryshkov
2023-06-04 16:27 ` [PATCH 2/8] drm/msm/dpu: use PP_BLK_DITHER for DPU 6.x Dmitry Baryshkov
@ 2023-06-04 16:27 ` Dmitry Baryshkov
2023-06-04 16:27 ` [PATCH 4/8] drm/msm/dpu: split PP_BLK_NO_TE from PP_BLK Dmitry Baryshkov
` (4 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Dmitry Baryshkov @ 2023-06-04 16:27 UTC (permalink / raw)
To: Rob Clark, Sean Paul, Abhinav Kumar, Marijn Suijten
Cc: Stephen Boyd, David Airlie, Daniel Vetter, Bjorn Andersson,
linux-arm-msm, dri-devel, freedreno
The dither-only PINGPONG blocks do not have the RDPTR interrupts. Stop
passing useless data to the macro and use it as a default.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../msm/disp/dpu1/catalog/dpu_6_0_sm8250.h | 18 ++++++-----------
.../msm/disp/dpu1/catalog/dpu_6_2_sc7180.h | 6 ++----
.../msm/disp/dpu1/catalog/dpu_6_3_sm6115.h | 3 +--
.../msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h | 3 +--
.../msm/disp/dpu1/catalog/dpu_7_0_sm8350.h | 18 ++++++-----------
.../msm/disp/dpu1/catalog/dpu_7_2_sc7280.h | 12 ++++-------
.../msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 12 +++++------
.../msm/disp/dpu1/catalog/dpu_8_1_sm8450.h | 20 ++++++-------------
.../msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 20 ++++++-------------
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 4 ++--
10 files changed, 40 insertions(+), 76 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
index 290fb33817a8..c308e9797dc6 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
@@ -130,23 +130,17 @@ static const struct dpu_dspp_cfg sm8250_dspp[] = {
static const struct dpu_pingpong_cfg sm8250_pp[] = {
PP_BLK_DITHER("pingpong_0", PINGPONG_0, 0x70000, MERGE_3D_0, sdm845_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8)),
PP_BLK_DITHER("pingpong_1", PINGPONG_1, 0x70800, MERGE_3D_0, sdm845_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9)),
PP_BLK_DITHER("pingpong_2", PINGPONG_2, 0x71000, MERGE_3D_1, sdm845_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10)),
PP_BLK_DITHER("pingpong_3", PINGPONG_3, 0x71800, MERGE_3D_1, sdm845_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11)),
PP_BLK_DITHER("pingpong_4", PINGPONG_4, 0x72000, MERGE_3D_2, sdm845_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 30),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 30)),
PP_BLK_DITHER("pingpong_5", PINGPONG_5, 0x72800, MERGE_3D_2, sdm845_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 31),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 31)),
};
static const struct dpu_merge_3d_cfg sm8250_merge_3d[] = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
index ee4e2416e516..d92ce1fc8b9f 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
@@ -81,11 +81,9 @@ static const struct dpu_dspp_cfg sc7180_dspp[] = {
static const struct dpu_pingpong_cfg sc7180_pp[] = {
PP_BLK_DITHER("pingpong_0", PINGPONG_0, 0x70000, 0, sdm845_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8)),
PP_BLK_DITHER("pingpong_1", PINGPONG_1, 0x70800, 0, sdm845_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9)),
};
static const struct dpu_intf_cfg sc7180_intf[] = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h
index bda47b4f0a82..99dfc6d4522d 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h
@@ -61,8 +61,7 @@ static const struct dpu_dspp_cfg sm6115_dspp[] = {
static const struct dpu_pingpong_cfg sm6115_pp[] = {
PP_BLK_DITHER("pingpong_0", PINGPONG_0, 0x70000, 0, sdm845_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8)),
};
static const struct dpu_intf_cfg sm6115_intf[] = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h
index 5a366dee16be..aa0489898552 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h
@@ -58,8 +58,7 @@ static const struct dpu_dspp_cfg qcm2290_dspp[] = {
static const struct dpu_pingpong_cfg qcm2290_pp[] = {
PP_BLK_DITHER("pingpong_0", PINGPONG_0, 0x70000, 0, sdm845_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8)),
};
static const struct dpu_intf_cfg qcm2290_intf[] = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
index 3c1b2c13398d..e1c7d3b77d2f 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
@@ -128,23 +128,17 @@ static const struct dpu_dspp_cfg sm8350_dspp[] = {
static const struct dpu_pingpong_cfg sm8350_pp[] = {
PP_BLK_DITHER("pingpong_0", PINGPONG_0, 0x69000, MERGE_3D_0, sc7280_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8)),
PP_BLK_DITHER("pingpong_1", PINGPONG_1, 0x6a000, MERGE_3D_0, sc7280_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9)),
PP_BLK_DITHER("pingpong_2", PINGPONG_2, 0x6b000, MERGE_3D_1, sc7280_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10)),
PP_BLK_DITHER("pingpong_3", PINGPONG_3, 0x6c000, MERGE_3D_1, sc7280_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11)),
PP_BLK_DITHER("pingpong_4", PINGPONG_4, 0x6d000, MERGE_3D_2, sc7280_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 30),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 30)),
PP_BLK_DITHER("pingpong_5", PINGPONG_5, 0x6e000, MERGE_3D_2, sc7280_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 31),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 31)),
};
static const struct dpu_merge_3d_cfg sm8350_merge_3d[] = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
index 297eb5ea1865..79310d5f158c 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
@@ -89,17 +89,13 @@ static const struct dpu_dspp_cfg sc7280_dspp[] = {
static const struct dpu_pingpong_cfg sc7280_pp[] = {
PP_BLK_DITHER("pingpong_0", PINGPONG_0, 0x69000, 0, sc7280_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8)),
PP_BLK_DITHER("pingpong_1", PINGPONG_1, 0x6a000, 0, sc7280_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9)),
PP_BLK_DITHER("pingpong_2", PINGPONG_2, 0x6b000, 0, sc7280_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10)),
PP_BLK_DITHER("pingpong_3", PINGPONG_3, 0x6c000, 0, sc7280_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11)),
};
static const struct dpu_wb_cfg sc7280_wb[] = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
index c3f1ae000a21..33ce23cf729a 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
@@ -123,17 +123,17 @@ static const struct dpu_dspp_cfg sc8280xp_dspp[] = {
static const struct dpu_pingpong_cfg sc8280xp_pp[] = {
PP_BLK_DITHER("pingpong_0", PINGPONG_0, 0x69000, MERGE_3D_0, sc7280_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8), -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8)),
PP_BLK_DITHER("pingpong_1", PINGPONG_1, 0x6a000, MERGE_3D_0, sc7280_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9), -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9)),
PP_BLK_DITHER("pingpong_2", PINGPONG_2, 0x6b000, MERGE_3D_1, sc7280_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10), -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10)),
PP_BLK_DITHER("pingpong_3", PINGPONG_3, 0x6c000, MERGE_3D_1, sc7280_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11), -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11)),
PP_BLK_DITHER("pingpong_4", PINGPONG_4, 0x6d000, MERGE_3D_2, sc7280_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 30), -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 30)),
PP_BLK_DITHER("pingpong_5", PINGPONG_5, 0x6e000, MERGE_3D_2, sc7280_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 31), -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 31)),
};
static const struct dpu_merge_3d_cfg sc8280xp_merge_3d[] = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
index 86c2e68ebd2c..182e91bb7dda 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
@@ -129,28 +129,20 @@ static const struct dpu_dspp_cfg sm8450_dspp[] = {
static const struct dpu_pingpong_cfg sm8450_pp[] = {
PP_BLK_DITHER("pingpong_0", PINGPONG_0, 0x69000, MERGE_3D_0, sc7280_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8)),
PP_BLK_DITHER("pingpong_1", PINGPONG_1, 0x6a000, MERGE_3D_0, sc7280_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9)),
PP_BLK_DITHER("pingpong_2", PINGPONG_2, 0x6b000, MERGE_3D_1, sc7280_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10)),
PP_BLK_DITHER("pingpong_3", PINGPONG_3, 0x6c000, MERGE_3D_1, sc7280_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11)),
PP_BLK_DITHER("pingpong_4", PINGPONG_4, 0x6d000, MERGE_3D_2, sc7280_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 30),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 30)),
PP_BLK_DITHER("pingpong_5", PINGPONG_5, 0x6e000, MERGE_3D_2, sc7280_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 31),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 31)),
PP_BLK_DITHER("pingpong_6", PINGPONG_6, 0x65800, MERGE_3D_3, sc7280_pp_sblk,
- -1,
-1),
PP_BLK_DITHER("pingpong_7", PINGPONG_7, 0x65c00, MERGE_3D_3, sc7280_pp_sblk,
- -1,
-1),
};
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
index 85dc34458b88..3d48d961977f 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
@@ -133,28 +133,20 @@ static const struct dpu_dspp_cfg sm8550_dspp[] = {
};
static const struct dpu_pingpong_cfg sm8550_pp[] = {
PP_BLK_DITHER("pingpong_0", PINGPONG_0, 0x69000, MERGE_3D_0, sc7280_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8)),
PP_BLK_DITHER("pingpong_1", PINGPONG_1, 0x6a000, MERGE_3D_0, sc7280_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9)),
PP_BLK_DITHER("pingpong_2", PINGPONG_2, 0x6b000, MERGE_3D_1, sc7280_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10)),
PP_BLK_DITHER("pingpong_3", PINGPONG_3, 0x6c000, MERGE_3D_1, sc7280_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11)),
PP_BLK_DITHER("pingpong_4", PINGPONG_4, 0x6d000, MERGE_3D_2, sc7280_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 30),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 30)),
PP_BLK_DITHER("pingpong_5", PINGPONG_5, 0x6e000, MERGE_3D_2, sc7280_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 31),
- -1),
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 31)),
PP_BLK_DITHER("pingpong_6", PINGPONG_6, 0x66000, MERGE_3D_3, sc7280_pp_sblk,
- -1,
-1),
PP_BLK_DITHER("pingpong_7", PINGPONG_7, 0x66400, MERGE_3D_3, sc7280_pp_sblk,
- -1,
-1),
};
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index f07eab738008..9a0a8688848e 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -481,7 +481,7 @@ static const struct dpu_pingpong_sub_blks sc7280_pp_sblk = {
.len = 0x20, .version = 0x20000},
};
-#define PP_BLK_DITHER(_name, _id, _base, _merge_3d, _sblk, _done, _rdptr) \
+#define PP_BLK_DITHER(_name, _id, _base, _merge_3d, _sblk, _done) \
{\
.name = _name, .id = _id, \
.base = _base, .len = 0, \
@@ -489,7 +489,7 @@ static const struct dpu_pingpong_sub_blks sc7280_pp_sblk = {
.merge_3d = _merge_3d, \
.sblk = &_sblk, \
.intr_done = _done, \
- .intr_rdptr = _rdptr, \
+ .intr_rdptr = -1, \
}
#define PP_BLK(_name, _id, _base, _features, _merge_3d, _sblk, _done, _rdptr) \
{\
--
2.39.2
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 4/8] drm/msm/dpu: split PP_BLK_NO_TE from PP_BLK
2023-06-04 16:27 [PATCH 0/8] drm/msm/dpu: change interrupts code to make 0 be the no IRQ Dmitry Baryshkov
` (2 preceding siblings ...)
2023-06-04 16:27 ` [PATCH 3/8] drm/msm/dpu: don't pass intr_rdptr to PP_BLK_DITHER Dmitry Baryshkov
@ 2023-06-04 16:27 ` Dmitry Baryshkov
2023-06-04 16:27 ` [PATCH 5/8] drm/msm/dpu: remove irq_idx argument from IRQ callbacks Dmitry Baryshkov
` (3 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Dmitry Baryshkov @ 2023-06-04 16:27 UTC (permalink / raw)
To: Rob Clark, Sean Paul, Abhinav Kumar, Marijn Suijten
Cc: Stephen Boyd, David Airlie, Daniel Vetter, Bjorn Andersson,
linux-arm-msm, dri-devel, freedreno
Simplify PINGPONG blocks setup: add new PP_BLK_NO_TE, which does not set
RDPTR irq index. Also make sure that DPU_PINGPONG_TE is set for all
TE-enabled PINGPONG blocks by setting it explicitly in PP_BLK.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 30 ++++++++-----------
.../msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h | 30 ++++++++-----------
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 14 +++++++--
3 files changed, 36 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
index b5f751354267..d9a3432d4c13 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
@@ -128,24 +128,18 @@ static const struct dpu_dspp_cfg sm8150_dspp[] = {
};
static const struct dpu_pingpong_cfg sm8150_pp[] = {
- PP_BLK("pingpong_0", PINGPONG_0, 0x70000, PINGPONG_SM8150_MASK, MERGE_3D_0, sdm845_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8),
- -1),
- PP_BLK("pingpong_1", PINGPONG_1, 0x70800, PINGPONG_SM8150_MASK, MERGE_3D_0, sdm845_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9),
- -1),
- PP_BLK("pingpong_2", PINGPONG_2, 0x71000, PINGPONG_SM8150_MASK, MERGE_3D_1, sdm845_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10),
- -1),
- PP_BLK("pingpong_3", PINGPONG_3, 0x71800, PINGPONG_SM8150_MASK, MERGE_3D_1, sdm845_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11),
- -1),
- PP_BLK("pingpong_4", PINGPONG_4, 0x72000, PINGPONG_SM8150_MASK, MERGE_3D_2, sdm845_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 30),
- -1),
- PP_BLK("pingpong_5", PINGPONG_5, 0x72800, PINGPONG_SM8150_MASK, MERGE_3D_2, sdm845_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 31),
- -1),
+ PP_BLK_NO_TE("pingpong_0", PINGPONG_0, 0x70000, PINGPONG_SM8150_MASK, MERGE_3D_0, sdm845_pp_sblk,
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8)),
+ PP_BLK_NO_TE("pingpong_1", PINGPONG_1, 0x70800, PINGPONG_SM8150_MASK, MERGE_3D_0, sdm845_pp_sblk,
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9)),
+ PP_BLK_NO_TE("pingpong_2", PINGPONG_2, 0x71000, PINGPONG_SM8150_MASK, MERGE_3D_1, sdm845_pp_sblk,
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10)),
+ PP_BLK_NO_TE("pingpong_3", PINGPONG_3, 0x71800, PINGPONG_SM8150_MASK, MERGE_3D_1, sdm845_pp_sblk,
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11)),
+ PP_BLK_NO_TE("pingpong_4", PINGPONG_4, 0x72000, PINGPONG_SM8150_MASK, MERGE_3D_2, sdm845_pp_sblk,
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 30)),
+ PP_BLK_NO_TE("pingpong_5", PINGPONG_5, 0x72800, PINGPONG_SM8150_MASK, MERGE_3D_2, sdm845_pp_sblk,
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 31)),
};
static const struct dpu_merge_3d_cfg sm8150_merge_3d[] = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
index 8ed2b263c5ea..60e82356f2f0 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
@@ -127,24 +127,18 @@ static const struct dpu_dspp_cfg sc8180x_dspp[] = {
};
static const struct dpu_pingpong_cfg sc8180x_pp[] = {
- PP_BLK("pingpong_0", PINGPONG_0, 0x70000, PINGPONG_SM8150_MASK, MERGE_3D_0, sdm845_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8),
- -1),
- PP_BLK("pingpong_1", PINGPONG_1, 0x70800, PINGPONG_SM8150_MASK, MERGE_3D_0, sdm845_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9),
- -1),
- PP_BLK("pingpong_2", PINGPONG_2, 0x71000, PINGPONG_SM8150_MASK, MERGE_3D_1, sdm845_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10),
- -1),
- PP_BLK("pingpong_3", PINGPONG_3, 0x71800, PINGPONG_SM8150_MASK, MERGE_3D_1, sdm845_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11),
- -1),
- PP_BLK("pingpong_4", PINGPONG_4, 0x72000, PINGPONG_SM8150_MASK, MERGE_3D_2, sdm845_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 30),
- -1),
- PP_BLK("pingpong_5", PINGPONG_5, 0x72800, PINGPONG_SM8150_MASK, MERGE_3D_2, sdm845_pp_sblk,
- DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 31),
- -1),
+ PP_BLK_NO_TE("pingpong_0", PINGPONG_0, 0x70000, PINGPONG_SM8150_MASK, MERGE_3D_0, sdm845_pp_sblk,
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8)),
+ PP_BLK_NO_TE("pingpong_1", PINGPONG_1, 0x70800, PINGPONG_SM8150_MASK, MERGE_3D_0, sdm845_pp_sblk,
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9)),
+ PP_BLK_NO_TE("pingpong_2", PINGPONG_2, 0x71000, PINGPONG_SM8150_MASK, MERGE_3D_1, sdm845_pp_sblk,
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10)),
+ PP_BLK_NO_TE("pingpong_3", PINGPONG_3, 0x71800, PINGPONG_SM8150_MASK, MERGE_3D_1, sdm845_pp_sblk,
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11)),
+ PP_BLK_NO_TE("pingpong_4", PINGPONG_4, 0x72000, PINGPONG_SM8150_MASK, MERGE_3D_2, sdm845_pp_sblk,
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 30)),
+ PP_BLK_NO_TE("pingpong_5", PINGPONG_5, 0x72800, PINGPONG_SM8150_MASK, MERGE_3D_2, sdm845_pp_sblk,
+ DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 31)),
};
static const struct dpu_merge_3d_cfg sc8180x_merge_3d[] = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index 9a0a8688848e..42f8c12c91a2 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -76,7 +76,7 @@
(BIT(DPU_DIM_LAYER) | BIT(DPU_MIXER_COMBINED_ALPHA))
#define PINGPONG_SDM845_MASK \
- (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_TE) | BIT(DPU_PINGPONG_DSC))
+ (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_DSC))
#define PINGPONG_SDM845_TE2_MASK \
(PINGPONG_SDM845_MASK | BIT(DPU_PINGPONG_TE2))
@@ -491,7 +491,7 @@ static const struct dpu_pingpong_sub_blks sc7280_pp_sblk = {
.intr_done = _done, \
.intr_rdptr = -1, \
}
-#define PP_BLK(_name, _id, _base, _features, _merge_3d, _sblk, _done, _rdptr) \
+#define PP_BLK_NO_TE(_name, _id, _base, _features, _merge_3d, _sblk, _done) \
{\
.name = _name, .id = _id, \
.base = _base, .len = 0xd4, \
@@ -499,6 +499,16 @@ static const struct dpu_pingpong_sub_blks sc7280_pp_sblk = {
.merge_3d = _merge_3d, \
.sblk = &_sblk, \
.intr_done = _done, \
+ .intr_rdptr = -1, \
+ }
+#define PP_BLK(_name, _id, _base, _features, _merge_3d, _sblk, _done, _rdptr) \
+ {\
+ .name = _name, .id = _id, \
+ .base = _base, .len = 0xd4, \
+ .features = _features | BIT(DPU_PINGPONG_TE), \
+ .merge_3d = _merge_3d, \
+ .sblk = &_sblk, \
+ .intr_done = _done, \
.intr_rdptr = _rdptr, \
}
--
2.39.2
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 5/8] drm/msm/dpu: remove irq_idx argument from IRQ callbacks
2023-06-04 16:27 [PATCH 0/8] drm/msm/dpu: change interrupts code to make 0 be the no IRQ Dmitry Baryshkov
` (3 preceding siblings ...)
2023-06-04 16:27 ` [PATCH 4/8] drm/msm/dpu: split PP_BLK_NO_TE from PP_BLK Dmitry Baryshkov
@ 2023-06-04 16:27 ` Dmitry Baryshkov
2023-06-04 16:27 ` [PATCH 6/8] drm/msm/dpu: move several IRQ-related defines Dmitry Baryshkov
` (2 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Dmitry Baryshkov @ 2023-06-04 16:27 UTC (permalink / raw)
To: Rob Clark, Sean Paul, Abhinav Kumar, Marijn Suijten
Cc: Stephen Boyd, David Airlie, Daniel Vetter, Bjorn Andersson,
linux-arm-msm, dri-devel, freedreno
There is no point in passing the IRQ index to IRQ callbacks, no function
uses that. Drop it at last.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 4 ++--
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 2 +-
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 8 ++++----
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 4 ++--
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 16 +++++-----------
.../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 4 ++--
.../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h | 2 +-
8 files changed, 18 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h
index b5b6e7031fb9..ba06312cbb16 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h
@@ -53,7 +53,7 @@ u32 dpu_core_irq_read(
int dpu_core_irq_register_callback(
struct dpu_kms *dpu_kms,
int irq_idx,
- void (*irq_cb)(void *arg, int irq_idx),
+ void (*irq_cb)(void *arg),
void *irq_arg);
/**
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 2e1873d29c4b..701c5265c98d 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -352,7 +352,7 @@ static int dpu_encoder_helper_wait_event_timeout(int32_t drm_id,
int dpu_encoder_helper_wait_for_irq(struct dpu_encoder_phys *phys_enc,
int irq,
- void (*func)(void *arg, int irq_idx),
+ void (*func)(void *arg),
struct dpu_encoder_wait_info *wait_info)
{
u32 irq_status;
@@ -399,7 +399,7 @@ int dpu_encoder_helper_wait_for_irq(struct dpu_encoder_phys *phys_enc,
phys_enc->hw_pp->idx - PINGPONG_0,
atomic_read(wait_info->atomic_cnt));
local_irq_save(flags);
- func(phys_enc, irq);
+ func(phys_enc);
local_irq_restore(flags);
ret = 0;
} else {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
index d48558ede488..f91661a69888 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
@@ -365,7 +365,7 @@ void dpu_encoder_helper_report_irq_timeout(struct dpu_encoder_phys *phys_enc,
*/
int dpu_encoder_helper_wait_for_irq(struct dpu_encoder_phys *phys_enc,
int irq,
- void (*func)(void *arg, int irq_idx),
+ void (*func)(void *arg),
struct dpu_encoder_wait_info *wait_info);
/**
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
index 4f8c9187f76d..33edc9200278 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
@@ -70,7 +70,7 @@ static void _dpu_encoder_phys_cmd_update_intf_cfg(
phys_enc->hw_pp->idx);
}
-static void dpu_encoder_phys_cmd_pp_tx_done_irq(void *arg, int irq_idx)
+static void dpu_encoder_phys_cmd_pp_tx_done_irq(void *arg)
{
struct dpu_encoder_phys *phys_enc = arg;
unsigned long lock_flags;
@@ -97,7 +97,7 @@ static void dpu_encoder_phys_cmd_pp_tx_done_irq(void *arg, int irq_idx)
DPU_ATRACE_END("pp_done_irq");
}
-static void dpu_encoder_phys_cmd_te_rd_ptr_irq(void *arg, int irq_idx)
+static void dpu_encoder_phys_cmd_te_rd_ptr_irq(void *arg)
{
struct dpu_encoder_phys *phys_enc = arg;
struct dpu_encoder_phys_cmd *cmd_enc;
@@ -120,7 +120,7 @@ static void dpu_encoder_phys_cmd_te_rd_ptr_irq(void *arg, int irq_idx)
DPU_ATRACE_END("rd_ptr_irq");
}
-static void dpu_encoder_phys_cmd_ctl_start_irq(void *arg, int irq_idx)
+static void dpu_encoder_phys_cmd_ctl_start_irq(void *arg)
{
struct dpu_encoder_phys *phys_enc = arg;
@@ -133,7 +133,7 @@ static void dpu_encoder_phys_cmd_ctl_start_irq(void *arg, int irq_idx)
DPU_ATRACE_END("ctl_start_irq");
}
-static void dpu_encoder_phys_cmd_underrun_irq(void *arg, int irq_idx)
+static void dpu_encoder_phys_cmd_underrun_irq(void *arg)
{
struct dpu_encoder_phys *phys_enc = arg;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
index e26629e9e303..19ccef5fb4d5 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
@@ -298,7 +298,7 @@ static void dpu_encoder_phys_vid_setup_timing_engine(
programmable_fetch_config(phys_enc, &timing_params);
}
-static void dpu_encoder_phys_vid_vblank_irq(void *arg, int irq_idx)
+static void dpu_encoder_phys_vid_vblank_irq(void *arg)
{
struct dpu_encoder_phys *phys_enc = arg;
struct dpu_hw_ctl *hw_ctl;
@@ -335,7 +335,7 @@ static void dpu_encoder_phys_vid_vblank_irq(void *arg, int irq_idx)
DPU_ATRACE_END("vblank_irq");
}
-static void dpu_encoder_phys_vid_underrun_irq(void *arg, int irq_idx)
+static void dpu_encoder_phys_vid_underrun_irq(void *arg)
{
struct dpu_encoder_phys *phys_enc = arg;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
index e9325cafb1a8..c30a5955725a 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
@@ -345,7 +345,11 @@ static void dpu_encoder_phys_wb_setup(
}
-static void _dpu_encoder_phys_wb_frame_done_helper(void *arg)
+/**
+ * dpu_encoder_phys_wb_done_irq - writeback interrupt handler
+ * @arg: Pointer to writeback encoder
+ */
+static void dpu_encoder_phys_wb_done_irq(void *arg)
{
struct dpu_encoder_phys *phys_enc = arg;
struct dpu_encoder_phys_wb *wb_enc = to_dpu_encoder_phys_wb(phys_enc);
@@ -371,16 +375,6 @@ static void _dpu_encoder_phys_wb_frame_done_helper(void *arg)
wake_up_all(&phys_enc->pending_kickoff_wq);
}
-/**
- * dpu_encoder_phys_wb_done_irq - writeback interrupt handler
- * @arg: Pointer to writeback encoder
- * @irq_idx: interrupt index
- */
-static void dpu_encoder_phys_wb_done_irq(void *arg, int irq_idx)
-{
- _dpu_encoder_phys_wb_frame_done_helper(arg);
-}
-
/**
* dpu_encoder_phys_wb_irq_ctrl - irq control of WB
* @phys: Pointer to physical encoder
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
index 5e2d68ebb113..9eeeb046db15 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
@@ -198,7 +198,7 @@ static void dpu_core_irq_callback_handler(struct dpu_kms *dpu_kms, int irq_idx)
/*
* Perform registered function callback
*/
- dpu_kms->hw_intr->irq_tbl[irq_idx].cb(dpu_kms->hw_intr->irq_tbl[irq_idx].arg, irq_idx);
+ dpu_kms->hw_intr->irq_tbl[irq_idx].cb(dpu_kms->hw_intr->irq_tbl[irq_idx].arg);
}
irqreturn_t dpu_core_irq(struct msm_kms *kms)
@@ -471,7 +471,7 @@ void dpu_hw_intr_destroy(struct dpu_hw_intr *intr)
}
int dpu_core_irq_register_callback(struct dpu_kms *dpu_kms, int irq_idx,
- void (*irq_cb)(void *arg, int irq_idx),
+ void (*irq_cb)(void *arg),
void *irq_arg)
{
unsigned long irq_flags;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
index 1f2dabc54c22..06c7bedd5c0a 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
@@ -62,7 +62,7 @@ struct dpu_hw_intr {
unsigned long irq_mask;
struct {
- void (*cb)(void *arg, int irq_idx);
+ void (*cb)(void *arg);
void *arg;
atomic_t count;
} irq_tbl[];
--
2.39.2
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 6/8] drm/msm/dpu: move several IRQ-related defines
2023-06-04 16:27 [PATCH 0/8] drm/msm/dpu: change interrupts code to make 0 be the no IRQ Dmitry Baryshkov
` (4 preceding siblings ...)
2023-06-04 16:27 ` [PATCH 5/8] drm/msm/dpu: remove irq_idx argument from IRQ callbacks Dmitry Baryshkov
@ 2023-06-04 16:27 ` Dmitry Baryshkov
2023-06-04 16:27 ` [PATCH 7/8] drm/msm/dpu: add helper to get IRQ-related data Dmitry Baryshkov
2023-06-04 16:28 ` [PATCH 8/8] drm/msm/dpu: shift IRQ indices by 1 Dmitry Baryshkov
7 siblings, 0 replies; 9+ messages in thread
From: Dmitry Baryshkov @ 2023-06-04 16:27 UTC (permalink / raw)
To: Rob Clark, Sean Paul, Abhinav Kumar, Marijn Suijten
Cc: Stephen Boyd, David Airlie, Daniel Vetter, Bjorn Andersson,
linux-arm-msm, dri-devel, freedreno
In preparation of slighly changing IRQ numbering, move DPU_IRQ_REG()
macro to the dpu_hw_interrupts.h header. Also split the DPU_IRQ_MASK()
macro into local DPU_IRQ_MASK() and the global DPU_IRQ_OFFSET() macros.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 3 +--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h | 2 ++
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
index 9eeeb046db15..3bc0e6f704a5 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
@@ -178,8 +178,7 @@ static const struct dpu_intr_reg dpu_intr_set[] = {
},
};
-#define DPU_IRQ_REG(irq_idx) (irq_idx / 32)
-#define DPU_IRQ_MASK(irq_idx) (BIT(irq_idx % 32))
+#define DPU_IRQ_MASK(irq_idx) (BIT(DPU_IRQ_OFFSET(irq_idx)))
/**
* dpu_core_irq_callback_handler - dispatch core interrupts
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
index 06c7bedd5c0a..41f2dff7d689 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
@@ -42,6 +42,8 @@ enum dpu_hw_intr_reg {
};
#define DPU_IRQ_IDX(reg_idx, offset) (reg_idx * 32 + offset)
+#define DPU_IRQ_REG(irq_idx) ((irq_idx) / 32)
+#define DPU_IRQ_OFFSET(irq_idx) ((irq_idx) % 32)
/**
* struct dpu_hw_intr: hw interrupts handling data structure
--
2.39.2
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 7/8] drm/msm/dpu: add helper to get IRQ-related data
2023-06-04 16:27 [PATCH 0/8] drm/msm/dpu: change interrupts code to make 0 be the no IRQ Dmitry Baryshkov
` (5 preceding siblings ...)
2023-06-04 16:27 ` [PATCH 6/8] drm/msm/dpu: move several IRQ-related defines Dmitry Baryshkov
@ 2023-06-04 16:27 ` Dmitry Baryshkov
2023-06-04 16:28 ` [PATCH 8/8] drm/msm/dpu: shift IRQ indices by 1 Dmitry Baryshkov
7 siblings, 0 replies; 9+ messages in thread
From: Dmitry Baryshkov @ 2023-06-04 16:27 UTC (permalink / raw)
To: Rob Clark, Sean Paul, Abhinav Kumar, Marijn Suijten
Cc: Stephen Boyd, David Airlie, Daniel Vetter, Bjorn Andersson,
linux-arm-msm, dri-devel, freedreno
In preparation to reworking the IRQ indices, move irq_tbl access to
separate helper.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 48 +++++++++++++------
.../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h | 12 +++--
2 files changed, 41 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
index 3bc0e6f704a5..91d3818956ce 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
@@ -180,6 +180,12 @@ static const struct dpu_intr_reg dpu_intr_set[] = {
#define DPU_IRQ_MASK(irq_idx) (BIT(DPU_IRQ_OFFSET(irq_idx)))
+static inline struct dpu_hw_intr_entry *dpu_core_irq_get_entry(struct dpu_kms *dpu_kms,
+ int irq_idx)
+{
+ return &dpu_kms->hw_intr->irq_tbl[irq_idx];
+}
+
/**
* dpu_core_irq_callback_handler - dispatch core interrupts
* @dpu_kms: Pointer to DPU's KMS structure
@@ -187,17 +193,19 @@ static const struct dpu_intr_reg dpu_intr_set[] = {
*/
static void dpu_core_irq_callback_handler(struct dpu_kms *dpu_kms, int irq_idx)
{
+ struct dpu_hw_intr_entry *irq_entry = dpu_core_irq_get_entry(dpu_kms, irq_idx);
+
VERB("irq_idx=%d\n", irq_idx);
- if (!dpu_kms->hw_intr->irq_tbl[irq_idx].cb)
+ if (!irq_entry->cb)
DRM_ERROR("no registered cb, idx:%d\n", irq_idx);
- atomic_inc(&dpu_kms->hw_intr->irq_tbl[irq_idx].count);
+ atomic_inc(&irq_entry->count);
/*
* Perform registered function callback
*/
- dpu_kms->hw_intr->irq_tbl[irq_idx].cb(dpu_kms->hw_intr->irq_tbl[irq_idx].arg);
+ irq_entry->cb(irq_entry->arg);
}
irqreturn_t dpu_core_irq(struct msm_kms *kms)
@@ -473,6 +481,7 @@ int dpu_core_irq_register_callback(struct dpu_kms *dpu_kms, int irq_idx,
void (*irq_cb)(void *arg),
void *irq_arg)
{
+ struct dpu_hw_intr_entry *irq_entry;
unsigned long irq_flags;
int ret;
@@ -490,15 +499,16 @@ int dpu_core_irq_register_callback(struct dpu_kms *dpu_kms, int irq_idx,
spin_lock_irqsave(&dpu_kms->hw_intr->irq_lock, irq_flags);
- if (unlikely(WARN_ON(dpu_kms->hw_intr->irq_tbl[irq_idx].cb))) {
+ irq_entry = dpu_core_irq_get_entry(dpu_kms, irq_idx);
+ if (unlikely(WARN_ON(irq_entry->cb))) {
spin_unlock_irqrestore(&dpu_kms->hw_intr->irq_lock, irq_flags);
return -EBUSY;
}
trace_dpu_core_irq_register_callback(irq_idx, irq_cb);
- dpu_kms->hw_intr->irq_tbl[irq_idx].arg = irq_arg;
- dpu_kms->hw_intr->irq_tbl[irq_idx].cb = irq_cb;
+ irq_entry->arg = irq_arg;
+ irq_entry->cb = irq_cb;
ret = dpu_hw_intr_enable_irq_locked(
dpu_kms->hw_intr,
@@ -515,6 +525,7 @@ int dpu_core_irq_register_callback(struct dpu_kms *dpu_kms, int irq_idx,
int dpu_core_irq_unregister_callback(struct dpu_kms *dpu_kms, int irq_idx)
{
+ struct dpu_hw_intr_entry *irq_entry;
unsigned long irq_flags;
int ret;
@@ -533,8 +544,9 @@ int dpu_core_irq_unregister_callback(struct dpu_kms *dpu_kms, int irq_idx)
DPU_ERROR("Fail to disable IRQ for irq_idx:%d: %d\n",
irq_idx, ret);
- dpu_kms->hw_intr->irq_tbl[irq_idx].cb = NULL;
- dpu_kms->hw_intr->irq_tbl[irq_idx].arg = NULL;
+ irq_entry = dpu_core_irq_get_entry(dpu_kms, irq_idx);
+ irq_entry->cb = NULL;
+ irq_entry->arg = NULL;
spin_unlock_irqrestore(&dpu_kms->hw_intr->irq_lock, irq_flags);
@@ -547,14 +559,16 @@ int dpu_core_irq_unregister_callback(struct dpu_kms *dpu_kms, int irq_idx)
static int dpu_debugfs_core_irq_show(struct seq_file *s, void *v)
{
struct dpu_kms *dpu_kms = s->private;
+ struct dpu_hw_intr_entry *irq_entry;
unsigned long irq_flags;
int i, irq_count;
void *cb;
for (i = 0; i < dpu_kms->hw_intr->total_irqs; i++) {
spin_lock_irqsave(&dpu_kms->hw_intr->irq_lock, irq_flags);
- irq_count = atomic_read(&dpu_kms->hw_intr->irq_tbl[i].count);
- cb = dpu_kms->hw_intr->irq_tbl[i].cb;
+ irq_entry = dpu_core_irq_get_entry(dpu_kms, i);
+ irq_count = atomic_read(&irq_entry->count);
+ cb = irq_entry->cb;
spin_unlock_irqrestore(&dpu_kms->hw_intr->irq_lock, irq_flags);
if (irq_count || cb)
@@ -577,6 +591,7 @@ void dpu_debugfs_core_irq_init(struct dpu_kms *dpu_kms,
void dpu_core_irq_preinstall(struct msm_kms *kms)
{
struct dpu_kms *dpu_kms = to_dpu_kms(kms);
+ struct dpu_hw_intr_entry *irq_entry;
int i;
pm_runtime_get_sync(&dpu_kms->pdev->dev);
@@ -584,22 +599,27 @@ void dpu_core_irq_preinstall(struct msm_kms *kms)
dpu_disable_all_irqs(dpu_kms);
pm_runtime_put_sync(&dpu_kms->pdev->dev);
- for (i = 0; i < dpu_kms->hw_intr->total_irqs; i++)
- atomic_set(&dpu_kms->hw_intr->irq_tbl[i].count, 0);
+ for (i = 0; i < dpu_kms->hw_intr->total_irqs; i++) {
+ irq_entry = dpu_core_irq_get_entry(dpu_kms, i);
+ atomic_set(&irq_entry->count, 0);
+ }
}
void dpu_core_irq_uninstall(struct msm_kms *kms)
{
struct dpu_kms *dpu_kms = to_dpu_kms(kms);
+ struct dpu_hw_intr_entry *irq_entry;
int i;
if (!dpu_kms->hw_intr)
return;
pm_runtime_get_sync(&dpu_kms->pdev->dev);
- for (i = 0; i < dpu_kms->hw_intr->total_irqs; i++)
- if (dpu_kms->hw_intr->irq_tbl[i].cb)
+ for (i = 0; i < dpu_kms->hw_intr->total_irqs; i++) {
+ irq_entry = dpu_core_irq_get_entry(dpu_kms, i);
+ if (irq_entry->cb)
DPU_ERROR("irq_idx=%d still enabled/registered\n", i);
+ }
dpu_clear_irqs(dpu_kms);
dpu_disable_all_irqs(dpu_kms);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
index 41f2dff7d689..2238e3f724db 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
@@ -45,6 +45,12 @@ enum dpu_hw_intr_reg {
#define DPU_IRQ_REG(irq_idx) ((irq_idx) / 32)
#define DPU_IRQ_OFFSET(irq_idx) ((irq_idx) % 32)
+struct dpu_hw_intr_entry {
+ void (*cb)(void *arg);
+ void *arg;
+ atomic_t count;
+};
+
/**
* struct dpu_hw_intr: hw interrupts handling data structure
* @hw: virtual address mapping
@@ -63,11 +69,7 @@ struct dpu_hw_intr {
spinlock_t irq_lock;
unsigned long irq_mask;
- struct {
- void (*cb)(void *arg);
- void *arg;
- atomic_t count;
- } irq_tbl[];
+ struct dpu_hw_intr_entry irq_tbl[];
};
/**
--
2.39.2
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 8/8] drm/msm/dpu: shift IRQ indices by 1
2023-06-04 16:27 [PATCH 0/8] drm/msm/dpu: change interrupts code to make 0 be the no IRQ Dmitry Baryshkov
` (6 preceding siblings ...)
2023-06-04 16:27 ` [PATCH 7/8] drm/msm/dpu: add helper to get IRQ-related data Dmitry Baryshkov
@ 2023-06-04 16:28 ` Dmitry Baryshkov
7 siblings, 0 replies; 9+ messages in thread
From: Dmitry Baryshkov @ 2023-06-04 16:28 UTC (permalink / raw)
To: Rob Clark, Sean Paul, Abhinav Kumar, Marijn Suijten
Cc: Stephen Boyd, David Airlie, Daniel Vetter, Bjorn Andersson,
linux-arm-msm, dri-devel, freedreno
In order to simplify IRQ declarations, shift IRQ indices by 1. This
makes 0 the 'no IRQ' value. Thanks to this change, we do no longer have
to explicitly set the 'no interrupt' fields in catalog structures.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../msm/disp/dpu1/catalog/dpu_8_1_sm8450.h | 4 +-
.../msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 4 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h | 6 +--
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 +-
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 2 +-
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 3 --
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 14 +++---
.../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 47 +++++++++----------
.../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h | 8 ++--
9 files changed, 44 insertions(+), 46 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
index 182e91bb7dda..47a719449798 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
@@ -141,9 +141,9 @@ static const struct dpu_pingpong_cfg sm8450_pp[] = {
PP_BLK_DITHER("pingpong_5", PINGPONG_5, 0x6e000, MERGE_3D_2, sc7280_pp_sblk,
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 31)),
PP_BLK_DITHER("pingpong_6", PINGPONG_6, 0x65800, MERGE_3D_3, sc7280_pp_sblk,
- -1),
+ DPU_NO_IRQ),
PP_BLK_DITHER("pingpong_7", PINGPONG_7, 0x65c00, MERGE_3D_3, sc7280_pp_sblk,
- -1),
+ DPU_NO_IRQ),
};
static const struct dpu_merge_3d_cfg sm8450_merge_3d[] = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
index 3d48d961977f..8c08c856d38c 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
@@ -145,9 +145,9 @@ static const struct dpu_pingpong_cfg sm8550_pp[] = {
PP_BLK_DITHER("pingpong_5", PINGPONG_5, 0x6e000, MERGE_3D_2, sc7280_pp_sblk,
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 31)),
PP_BLK_DITHER("pingpong_6", PINGPONG_6, 0x66000, MERGE_3D_3, sc7280_pp_sblk,
- -1),
+ DPU_NO_IRQ),
PP_BLK_DITHER("pingpong_7", PINGPONG_7, 0x66400, MERGE_3D_3, sc7280_pp_sblk,
- -1),
+ DPU_NO_IRQ),
};
static const struct dpu_merge_3d_cfg sm8550_merge_3d[] = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h
index ba06312cbb16..7c286bafb948 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h
@@ -37,7 +37,7 @@ irqreturn_t dpu_core_irq(struct msm_kms *kms);
*/
u32 dpu_core_irq_read(
struct dpu_kms *dpu_kms,
- int irq_idx);
+ unsigned int irq_idx);
/**
* dpu_core_irq_register_callback - For registering callback function on IRQ
@@ -52,7 +52,7 @@ u32 dpu_core_irq_read(
*/
int dpu_core_irq_register_callback(
struct dpu_kms *dpu_kms,
- int irq_idx,
+ unsigned int irq_idx,
void (*irq_cb)(void *arg),
void *irq_arg);
@@ -67,7 +67,7 @@ int dpu_core_irq_register_callback(
*/
int dpu_core_irq_unregister_callback(
struct dpu_kms *dpu_kms,
- int irq_idx);
+ unsigned int irq_idx);
/**
* dpu_debugfs_core_irq_init - register core irq debugfs
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 701c5265c98d..d96eb1a8fd72 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -2540,7 +2540,7 @@ void dpu_encoder_phys_init(struct dpu_encoder_phys *phys_enc,
phys_enc->enable_state = DPU_ENC_DISABLED;
for (i = 0; i < ARRAY_SIZE(phys_enc->irq); i++)
- phys_enc->irq[i] = -EINVAL;
+ phys_enc->irq[i] = DPU_NO_IRQ;
atomic_set(&phys_enc->vblank_refcount, 0);
atomic_set(&phys_enc->pending_kickoff_cnt, 0);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
index f91661a69888..e203f3775ed3 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
@@ -193,7 +193,7 @@ struct dpu_encoder_phys {
atomic_t pending_ctlstart_cnt;
atomic_t pending_kickoff_cnt;
wait_queue_head_t pending_kickoff_wq;
- int irq[INTR_IDX_MAX];
+ unsigned int irq[INTR_IDX_MAX];
bool has_intf_te;
};
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index 42f8c12c91a2..356280aefa3b 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -489,7 +489,6 @@ static const struct dpu_pingpong_sub_blks sc7280_pp_sblk = {
.merge_3d = _merge_3d, \
.sblk = &_sblk, \
.intr_done = _done, \
- .intr_rdptr = -1, \
}
#define PP_BLK_NO_TE(_name, _id, _base, _features, _merge_3d, _sblk, _done) \
{\
@@ -499,7 +498,6 @@ static const struct dpu_pingpong_sub_blks sc7280_pp_sblk = {
.merge_3d = _merge_3d, \
.sblk = &_sblk, \
.intr_done = _done, \
- .intr_rdptr = -1, \
}
#define PP_BLK(_name, _id, _base, _features, _merge_3d, _sblk, _done, _rdptr) \
{\
@@ -546,7 +544,6 @@ static const struct dpu_pingpong_sub_blks sc7280_pp_sblk = {
.prog_fetch_lines_worst_case = _progfetch, \
.intr_underrun = _underrun, \
.intr_vsync = _vsync, \
- .intr_tear_rd_ptr = -1, \
}
/* DSI Interface sub-block with TEAR registers (since DPU 5.0.0) */
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
index d59a9027c4b6..d6365144af8a 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
@@ -500,7 +500,7 @@ struct dpu_ubwc_cfg {
*/
struct dpu_ctl_cfg {
DPU_HW_BLK_INFO;
- s32 intr_start;
+ unsigned int intr_start;
};
/**
@@ -563,8 +563,8 @@ struct dpu_dspp_cfg {
struct dpu_pingpong_cfg {
DPU_HW_BLK_INFO;
u32 merge_3d;
- s32 intr_done;
- s32 intr_rdptr;
+ unsigned int intr_done;
+ unsigned int intr_rdptr;
const struct dpu_pingpong_sub_blks *sblk;
};
@@ -608,9 +608,9 @@ struct dpu_intf_cfg {
u32 type; /* interface type*/
u32 controller_id;
u32 prog_fetch_lines_worst_case;
- s32 intr_underrun;
- s32 intr_vsync;
- s32 intr_tear_rd_ptr;
+ unsigned int intr_underrun;
+ unsigned int intr_vsync;
+ unsigned int intr_tear_rd_ptr;
};
/**
@@ -629,7 +629,7 @@ struct dpu_wb_cfg {
u8 vbif_idx;
u32 maxlinewidth;
u32 xin_id;
- s32 intr_wb_done;
+ unsigned int intr_wb_done;
const u32 *format_list;
u32 num_formats;
enum dpu_clk_ctrl_type clk_ctrl;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
index 91d3818956ce..633d22152113 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
@@ -181,7 +181,7 @@ static const struct dpu_intr_reg dpu_intr_set[] = {
#define DPU_IRQ_MASK(irq_idx) (BIT(DPU_IRQ_OFFSET(irq_idx)))
static inline struct dpu_hw_intr_entry *dpu_core_irq_get_entry(struct dpu_kms *dpu_kms,
- int irq_idx)
+ unsigned int irq_idx)
{
return &dpu_kms->hw_intr->irq_tbl[irq_idx];
}
@@ -191,7 +191,7 @@ static inline struct dpu_hw_intr_entry *dpu_core_irq_get_entry(struct dpu_kms *d
* @dpu_kms: Pointer to DPU's KMS structure
* @irq_idx: interrupt index
*/
-static void dpu_core_irq_callback_handler(struct dpu_kms *dpu_kms, int irq_idx)
+static void dpu_core_irq_callback_handler(struct dpu_kms *dpu_kms, unsigned int irq_idx)
{
struct dpu_hw_intr_entry *irq_entry = dpu_core_irq_get_entry(dpu_kms, irq_idx);
@@ -213,7 +213,7 @@ irqreturn_t dpu_core_irq(struct msm_kms *kms)
struct dpu_kms *dpu_kms = to_dpu_kms(kms);
struct dpu_hw_intr *intr = dpu_kms->hw_intr;
int reg_idx;
- int irq_idx;
+ unsigned int irq_idx;
u32 irq_status;
u32 enable_mask;
int bit;
@@ -269,7 +269,8 @@ irqreturn_t dpu_core_irq(struct msm_kms *kms)
return IRQ_HANDLED;
}
-static int dpu_hw_intr_enable_irq_locked(struct dpu_hw_intr *intr, int irq_idx)
+static int dpu_hw_intr_enable_irq_locked(struct dpu_hw_intr *intr,
+ unsigned int irq_idx)
{
int reg_idx;
const struct dpu_intr_reg *reg;
@@ -279,7 +280,7 @@ static int dpu_hw_intr_enable_irq_locked(struct dpu_hw_intr *intr, int irq_idx)
if (!intr)
return -EINVAL;
- if (irq_idx < 0 || irq_idx >= intr->total_irqs) {
+ if (irq_idx == DPU_NO_IRQ || irq_idx > intr->total_irqs) {
pr_err("invalid IRQ index: [%d]\n", irq_idx);
return -EINVAL;
}
@@ -318,7 +319,8 @@ static int dpu_hw_intr_enable_irq_locked(struct dpu_hw_intr *intr, int irq_idx)
return 0;
}
-static int dpu_hw_intr_disable_irq_locked(struct dpu_hw_intr *intr, int irq_idx)
+static int dpu_hw_intr_disable_irq_locked(struct dpu_hw_intr *intr,
+ unsigned int irq_idx)
{
int reg_idx;
const struct dpu_intr_reg *reg;
@@ -328,7 +330,7 @@ static int dpu_hw_intr_disable_irq_locked(struct dpu_hw_intr *intr, int irq_idx)
if (!intr)
return -EINVAL;
- if (irq_idx < 0 || irq_idx >= intr->total_irqs) {
+ if (irq_idx == DPU_NO_IRQ || irq_idx > intr->total_irqs) {
pr_err("invalid IRQ index: [%d]\n", irq_idx);
return -EINVAL;
}
@@ -403,7 +405,8 @@ static void dpu_disable_all_irqs(struct dpu_kms *dpu_kms)
wmb();
}
-u32 dpu_core_irq_read(struct dpu_kms *dpu_kms, int irq_idx)
+u32 dpu_core_irq_read(struct dpu_kms *dpu_kms,
+ unsigned int irq_idx)
{
struct dpu_hw_intr *intr = dpu_kms->hw_intr;
int reg_idx;
@@ -413,13 +416,7 @@ u32 dpu_core_irq_read(struct dpu_kms *dpu_kms, int irq_idx)
if (!intr)
return 0;
- if (irq_idx < 0) {
- DPU_ERROR("[%pS] invalid irq_idx=%d\n",
- __builtin_return_address(0), irq_idx);
- return 0;
- }
-
- if (irq_idx < 0 || irq_idx >= intr->total_irqs) {
+ if (irq_idx == DPU_NO_IRQ || irq_idx > intr->total_irqs) {
pr_err("invalid IRQ index: [%d]\n", irq_idx);
return 0;
}
@@ -477,9 +474,10 @@ void dpu_hw_intr_destroy(struct dpu_hw_intr *intr)
kfree(intr);
}
-int dpu_core_irq_register_callback(struct dpu_kms *dpu_kms, int irq_idx,
- void (*irq_cb)(void *arg),
- void *irq_arg)
+int dpu_core_irq_register_callback(struct dpu_kms *dpu_kms,
+ unsigned int irq_idx,
+ void (*irq_cb)(void *arg),
+ void *irq_arg)
{
struct dpu_hw_intr_entry *irq_entry;
unsigned long irq_flags;
@@ -490,7 +488,7 @@ int dpu_core_irq_register_callback(struct dpu_kms *dpu_kms, int irq_idx,
return -EINVAL;
}
- if (irq_idx < 0 || irq_idx >= dpu_kms->hw_intr->total_irqs) {
+ if (irq_idx == DPU_NO_IRQ || irq_idx > dpu_kms->hw_intr->total_irqs) {
DPU_ERROR("invalid IRQ index: [%d]\n", irq_idx);
return -EINVAL;
}
@@ -523,13 +521,14 @@ int dpu_core_irq_register_callback(struct dpu_kms *dpu_kms, int irq_idx,
return 0;
}
-int dpu_core_irq_unregister_callback(struct dpu_kms *dpu_kms, int irq_idx)
+int dpu_core_irq_unregister_callback(struct dpu_kms *dpu_kms,
+ unsigned int irq_idx)
{
struct dpu_hw_intr_entry *irq_entry;
unsigned long irq_flags;
int ret;
- if (irq_idx < 0 || irq_idx >= dpu_kms->hw_intr->total_irqs) {
+ if (irq_idx == DPU_NO_IRQ || irq_idx > dpu_kms->hw_intr->total_irqs) {
DPU_ERROR("invalid IRQ index: [%d]\n", irq_idx);
return -EINVAL;
}
@@ -564,7 +563,7 @@ static int dpu_debugfs_core_irq_show(struct seq_file *s, void *v)
int i, irq_count;
void *cb;
- for (i = 0; i < dpu_kms->hw_intr->total_irqs; i++) {
+ for (i = 1; i <= dpu_kms->hw_intr->total_irqs; i++) {
spin_lock_irqsave(&dpu_kms->hw_intr->irq_lock, irq_flags);
irq_entry = dpu_core_irq_get_entry(dpu_kms, i);
irq_count = atomic_read(&irq_entry->count);
@@ -599,7 +598,7 @@ void dpu_core_irq_preinstall(struct msm_kms *kms)
dpu_disable_all_irqs(dpu_kms);
pm_runtime_put_sync(&dpu_kms->pdev->dev);
- for (i = 0; i < dpu_kms->hw_intr->total_irqs; i++) {
+ for (i = 1; i <= dpu_kms->hw_intr->total_irqs; i++) {
irq_entry = dpu_core_irq_get_entry(dpu_kms, i);
atomic_set(&irq_entry->count, 0);
}
@@ -615,7 +614,7 @@ void dpu_core_irq_uninstall(struct msm_kms *kms)
return;
pm_runtime_get_sync(&dpu_kms->pdev->dev);
- for (i = 0; i < dpu_kms->hw_intr->total_irqs; i++) {
+ for (i = 1; i <= dpu_kms->hw_intr->total_irqs; i++) {
irq_entry = dpu_core_irq_get_entry(dpu_kms, i);
if (irq_entry->cb)
DPU_ERROR("irq_idx=%d still enabled/registered\n", i);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
index 2238e3f724db..173022df5ce2 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
@@ -41,9 +41,11 @@ enum dpu_hw_intr_reg {
MDP_INTR_MAX,
};
-#define DPU_IRQ_IDX(reg_idx, offset) (reg_idx * 32 + offset)
-#define DPU_IRQ_REG(irq_idx) ((irq_idx) / 32)
-#define DPU_IRQ_OFFSET(irq_idx) ((irq_idx) % 32)
+#define DPU_IRQ_IDX(reg_idx, offset) (reg_idx * 32 + offset + 1)
+#define DPU_IRQ_REG(irq_idx) ((irq_idx - 1) / 32)
+#define DPU_IRQ_OFFSET(irq_idx) ((irq_idx - 1) % 32)
+
+#define DPU_NO_IRQ 0
struct dpu_hw_intr_entry {
void (*cb)(void *arg);
--
2.39.2
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