From: Thara Gopinath <thara.gopinath@linaro.org>
To: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: agross@kernel.org, rui.zhang@intel.com,
daniel.lezcano@linaro.org, viresh.kumar@linaro.org,
rjw@rjwysocki.net, robh+dt@kernel.org,
linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 3/5] cpufreq: qcom-cpufreq-hw: Add dcvs interrupt support
Date: Fri, 18 Jun 2021 17:55:18 -0400 [thread overview]
Message-ID: <4e6f96c0-5f9c-bd35-7b6a-95ac6e907dab@linaro.org> (raw)
In-Reply-To: <YMzjBvkbITbSIzwf@builder.lan>
On 6/18/21 2:16 PM, Bjorn Andersson wrote:
> On Tue 08 Jun 17:29 CDT 2021, Thara Gopinath wrote:
>> diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c
> [..]
>> @@ -305,6 +383,8 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy)
>>
>> index = args.args[0];
>>
>> + lmh_mitigation_enabled = of_property_read_bool(pdev->dev.of_node, "qcom,support-lmh");
>
> Rather than adding a new interrupt _and_ a flag to tell the driver that
> this new interrupt should be used, wouldn't it be sufficient to just see
> if the interrupt is specified?
Yes. you are right. It should be. Though when I wrote it there was some
reason which I forget now. I will remove it.
--
Warm Regards
Thara (She/Her/Hers)
>
>> +
>> res = platform_get_resource(pdev, IORESOURCE_MEM, index);
>> if (!res) {
>> dev_err(dev, "failed to get mem resource %d\n", index);
>> @@ -329,6 +409,11 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy)
>> goto unmap_base;
>> }
>>
>> + if (!alloc_cpumask_var(&data->cpus, GFP_KERNEL)) {
>> + ret = -ENOMEM;
>> + goto unmap_base;
>> + }
>> +
>> data->soc_data = of_device_get_match_data(&pdev->dev);
>> data->base = base;
>> data->res = res;
>> @@ -347,6 +432,7 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy)
>> goto error;
>> }
>>
>> + cpumask_copy(data->cpus, policy->cpus);
>> policy->driver_data = data;
>>
>> ret = qcom_cpufreq_hw_read_lut(cpu_dev, policy);
>> @@ -370,6 +456,20 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy)
>> dev_warn(cpu_dev, "failed to enable boost: %d\n", ret);
>> }
>>
>> + if (lmh_mitigation_enabled) {
>> + data->lmh_dcvs_irq = platform_get_irq(pdev, index);
>> + if (data->lmh_dcvs_irq < 0) {
>
> This will be -ENXIO if the interrupt isn't specified and <0 for other
> errors, so you should be able to distinguish the two failure cases.
>
> Regards,
> Bjorn
>
>> + ret = data->lmh_dcvs_irq;
>> + goto error;
>> + }
>> + ret = devm_request_irq(dev, data->lmh_dcvs_irq, qcom_lmh_dcvs_handle_irq,
>> + 0, "dcvsh-irq", data);
>> + if (ret) {
>> + dev_err(dev, "Error %d registering irq %x\n", ret, data->lmh_dcvs_irq);
>> + goto error;
>> + }
>> + INIT_DEFERRABLE_WORK(&data->lmh_dcvs_poll_work, qcom_lmh_dcvs_poll);
>> + }
>> return 0;
>> error:
>> kfree(data);
>> --
>> 2.25.1
>>
next prev parent reply other threads:[~2021-06-18 21:55 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-08 22:29 [PATCH 0/5] Introduce LMh driver for Qualcomm SoCs Thara Gopinath
2021-06-08 22:29 ` [PATCH 1/5] firmware: qcom_scm: Introduce SCM calls to access LMh Thara Gopinath
2021-06-09 3:10 ` kernel test robot
2021-06-08 22:29 ` [PATCH 2/5] thermal: qcom: Add support for LMh driver Thara Gopinath
2021-06-09 2:25 ` Randy Dunlap
2021-06-15 1:37 ` Thara Gopinath
2021-06-14 20:53 ` Bjorn Andersson
2021-06-15 1:38 ` Thara Gopinath
2021-06-18 17:54 ` Bjorn Andersson
2021-06-18 21:53 ` Thara Gopinath
2021-06-08 22:29 ` [PATCH 3/5] cpufreq: qcom-cpufreq-hw: Add dcvs interrupt support Thara Gopinath
2021-06-14 10:31 ` Viresh Kumar
2021-06-15 1:58 ` Thara Gopinath
2021-06-15 5:16 ` Viresh Kumar
2021-06-18 18:16 ` Bjorn Andersson
2021-06-18 21:55 ` Thara Gopinath [this message]
2021-06-08 22:29 ` [PATCH 4/5] arm64: boot: dts: sdm45: Add support for LMh node Thara Gopinath
2021-06-08 22:29 ` [PATCH 5/5] arm64: boot: dts: qcom: sdm845: Remove passive trip points for thermal zones 0-7 Thara Gopinath
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