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* [PATCH] nvmem: core: Fix msb clearing bits
@ 2020-01-31 12:43 Shadab Naseem
  2020-02-14  7:16 ` Mukesh Ojha
  0 siblings, 1 reply; 3+ messages in thread
From: Shadab Naseem @ 2020-01-31 12:43 UTC (permalink / raw)
  To: srinivas.kandagatla; +Cc: linux-arm-msm, linux-kernel, neeraju, Shadab Naseem

When clearing the msb bits of the resultant buffer, it is
masked with the modulo of the number of bits needed with
respect to the BITS_PER_BYTE. To mask out the buffer,
it is passed though GENMASK of the remainder of the bits
starting from zeroth bit. This case is valid if nbits is not
a multiple of BITS_PER_BYTE and you are actually creating
a GENMASK. If the nbits coming is a multiple of BITS_PER_BYTE,
it would pass a negative value to the high bit number of
GENMASK with zero as the lower bit number.

As per the definition of the GENMASK, the higher bit number (h)
is right operand for bitwise right shift. If the value of the
right operand is negative or is greater or equal to the number
of bits in the promoted left operand, the behavior is undefined.
So passing a negative value to GENMASK could behave differently
across architecture, specifically between 64 and 32 bit.
Also, on passing the hard-coded negative value as GENMASK(-1, 0)
is giving compiler warning for shift-count-overflow.
Hence making a check for clearing the MSB if the nbits are not
a multiple of BITS_PER_BYTE.

Signed-off-by: Shadab Naseem <snaseem@codeaurora.org>
---
 drivers/nvmem/core.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c
index 1e4a798..23c1547 100644
--- a/drivers/nvmem/core.c
+++ b/drivers/nvmem/core.c
@@ -926,7 +926,8 @@ static void nvmem_shift_read_buffer_in_place(struct nvmem_cell *cell, void *buf)
 		*p-- = 0;
 
 	/* clear msb bits if any leftover in the last byte */
-	*p &= GENMASK((cell->nbits%BITS_PER_BYTE) - 1, 0);
+	if (cell->nbits%BITS_PER_BYTE)
+		*p &= GENMASK((cell->nbits%BITS_PER_BYTE) - 1, 0);
 }
 
 static int __nvmem_cell_read(struct nvmem_device *nvmem,
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a
member of the Code Aurora Forum, hosted by The Linux Foundation

^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH] nvmem: core: Fix msb clearing bits
  2020-01-31 12:43 [PATCH] nvmem: core: Fix msb clearing bits Shadab Naseem
@ 2020-02-14  7:16 ` Mukesh Ojha
  2020-02-25 10:50   ` Shadab Naseem
  0 siblings, 1 reply; 3+ messages in thread
From: Mukesh Ojha @ 2020-02-14  7:16 UTC (permalink / raw)
  To: Shadab Naseem, srinivas.kandagatla; +Cc: linux-arm-msm, linux-kernel, neeraju


On 1/31/2020 6:13 PM, Shadab Naseem wrote:
> When clearing the msb bits of the resultant buffer, it is
> masked with the modulo of the number of bits needed with
> respect to the BITS_PER_BYTE. To mask out the buffer,
> it is passed though GENMASK of the remainder of the bits
> starting from zeroth bit. This case is valid if nbits is not
> a multiple of BITS_PER_BYTE and you are actually creating
> a GENMASK. If the nbits coming is a multiple of BITS_PER_BYTE,
> it would pass a negative value to the high bit number of
> GENMASK with zero as the lower bit number.
>
> As per the definition of the GENMASK, the higher bit number (h)
> is right operand for bitwise right shift. If the value of the
> right operand is negative or is greater or equal to the number
> of bits in the promoted left operand, the behavior is undefined.
> So passing a negative value to GENMASK could behave differently
> across architecture, specifically between 64 and 32 bit.
> Also, on passing the hard-coded negative value as GENMASK(-1, 0)
> is giving compiler warning for shift-count-overflow.
> Hence making a check for clearing the MSB if the nbits are not
> a multiple of BITS_PER_BYTE.
>
> Signed-off-by: Shadab Naseem <snaseem@codeaurora.org>
> ---
>   drivers/nvmem/core.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c
> index 1e4a798..23c1547 100644
> --- a/drivers/nvmem/core.c
> +++ b/drivers/nvmem/core.c
> @@ -926,7 +926,8 @@ static void nvmem_shift_read_buffer_in_place(struct nvmem_cell *cell, void *buf)
>   		*p-- = 0;
>   
>   	/* clear msb bits if any leftover in the last byte */
> -	*p &= GENMASK((cell->nbits%BITS_PER_BYTE) - 1, 0);
> +	if (cell->nbits%BITS_PER_BYTE)
> +		*p &= GENMASK((cell->nbits%BITS_PER_BYTE) - 1, 0);


LGTM..

Reviewed-by: mojha@codeaurora.org


Thanks
Mukesh

>   }
>   
>   static int __nvmem_cell_read(struct nvmem_device *nvmem,

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] nvmem: core: Fix msb clearing bits
  2020-02-14  7:16 ` Mukesh Ojha
@ 2020-02-25 10:50   ` Shadab Naseem
  0 siblings, 0 replies; 3+ messages in thread
From: Shadab Naseem @ 2020-02-25 10:50 UTC (permalink / raw)
  To: Mukesh Ojha, srinivas.kandagatla; +Cc: linux-arm-msm, linux-kernel, neeraju

Gentle reminder as it is easily reproducible in 32 bit targets.

Regards

-Shadab

On 2/14/2020 12:46 PM, Mukesh Ojha wrote:
>
> On 1/31/2020 6:13 PM, Shadab Naseem wrote:
>> When clearing the msb bits of the resultant buffer, it is
>> masked with the modulo of the number of bits needed with
>> respect to the BITS_PER_BYTE. To mask out the buffer,
>> it is passed though GENMASK of the remainder of the bits
>> starting from zeroth bit. This case is valid if nbits is not
>> a multiple of BITS_PER_BYTE and you are actually creating
>> a GENMASK. If the nbits coming is a multiple of BITS_PER_BYTE,
>> it would pass a negative value to the high bit number of
>> GENMASK with zero as the lower bit number.
>>
>> As per the definition of the GENMASK, the higher bit number (h)
>> is right operand for bitwise right shift. If the value of the
>> right operand is negative or is greater or equal to the number
>> of bits in the promoted left operand, the behavior is undefined.
>> So passing a negative value to GENMASK could behave differently
>> across architecture, specifically between 64 and 32 bit.
>> Also, on passing the hard-coded negative value as GENMASK(-1, 0)
>> is giving compiler warning for shift-count-overflow.
>> Hence making a check for clearing the MSB if the nbits are not
>> a multiple of BITS_PER_BYTE.
>>
>> Signed-off-by: Shadab Naseem <snaseem@codeaurora.org>
>> ---
>>   drivers/nvmem/core.c | 3 ++-
>>   1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c
>> index 1e4a798..23c1547 100644
>> --- a/drivers/nvmem/core.c
>> +++ b/drivers/nvmem/core.c
>> @@ -926,7 +926,8 @@ static void 
>> nvmem_shift_read_buffer_in_place(struct nvmem_cell *cell, void *buf)
>>           *p-- = 0;
>>         /* clear msb bits if any leftover in the last byte */
>> -    *p &= GENMASK((cell->nbits%BITS_PER_BYTE) - 1, 0);
>> +    if (cell->nbits%BITS_PER_BYTE)
>> +        *p &= GENMASK((cell->nbits%BITS_PER_BYTE) - 1, 0);
>
>
> LGTM..
>
> Reviewed-by: mojha@codeaurora.org
>
>
> Thanks
> Mukesh
>
>>   }
>>     static int __nvmem_cell_read(struct nvmem_device *nvmem,

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2020-02-25 10:50 UTC | newest]

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2020-01-31 12:43 [PATCH] nvmem: core: Fix msb clearing bits Shadab Naseem
2020-02-14  7:16 ` Mukesh Ojha
2020-02-25 10:50   ` Shadab Naseem

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