From: Stephen Boyd <sboyd@kernel.org>
To: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com>,
agross@kernel.org, andersson@kernel.org, arnd@arndb.de,
catalin.marinas@arm.com, devicetree@vger.kernel.org,
dmitry.baryshkov@linaro.org, konrad.dybcio@linaro.org,
krzysztof.kozlowski+dt@linaro.org, linus.walleij@linaro.org,
linux-arm-kernel@lists.infradead.org,
linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org,
marcel.ziswiler@toradex.com, mturquette@baylibre.com,
nfraprado@collabora.com, quic_gurus@quicinc.com,
robh+dt@kernel.org, robimarko@gmail.com, shawnguo@kernel.org,
will@kernel.org
Cc: Kathiravan T <quic_kathirav@quicinc.com>
Subject: Re: [PATCH V2 5/9] clk: qcom: add Global Clock controller (GCC) driver for IPQ5332 SoC
Date: Tue, 31 Jan 2023 13:09:46 -0800 [thread overview]
Message-ID: <84f68577f5629e6ef6d6b14357a79f84.sboyd@kernel.org> (raw)
In-Reply-To: <20230130114702.20606-6-quic_kathirav@quicinc.com>
Quoting Kathiravan Thirumoorthy (2023-01-30 03:46:58)
> diff --git a/drivers/clk/qcom/gcc-ipq5332.c b/drivers/clk/qcom/gcc-ipq5332.c
> new file mode 100644
> index 000000000000..a8ce618bb81b
> --- /dev/null
> +++ b/drivers/clk/qcom/gcc-ipq5332.c
> @@ -0,0 +1,3954 @@
[...]
> +
> +static const struct clk_parent_data gcc_parent_data_xo = { .index = DT_XO };
> +
> +static struct clk_alpha_pll gpll0_main = {
[...]
> +};
> +
> +static const struct parent_map gcc_parent_map_3[] = {
> + { P_XO, 0 },
> +};
> +
> +static const struct clk_parent_data gcc_parent_data_3[] = {
Isn't this the same as gcc_parent_data_xo?
> + { .index = DT_XO },
> +};
> +
> +static const struct parent_map gcc_parent_map_4[] = {
> + { P_XO, 0 },
> + { P_GPLL0_OUT_MAIN, 1 },
> + { P_GCC_GPLL0_OUT_MAIN_DIV_CLK_SRC, 4 },
> + { P_SLEEP_CLK, 6 },
> +};
> +
> +static const struct clk_parent_data gcc_parent_data_4[] = {
> + { .index = DT_XO },
> + { .hw = &gpll0.clkr.hw },
> + { .hw = &gpll0_div2.hw },
[..]
> +
> +static int gcc_ipq5332_probe(struct platform_device *pdev)
> +{
> + struct regmap *regmap;
> +
> + regmap = qcom_cc_map(pdev, &gcc_ipq5332_desc);
> + if (IS_ERR(regmap))
> + return PTR_ERR(regmap);
> +
> + return qcom_cc_really_probe(pdev, &gcc_ipq5332_desc, regmap);
If you don't need to write anything in probe you can simply use
qcom_cc_probe().
next prev parent reply other threads:[~2023-01-31 21:09 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-30 11:46 [PATCH V2 0/9] Add minimal boot support for IPQ5332 Kathiravan Thirumoorthy
2023-01-30 11:46 ` [PATCH V2 1/9] dt-bindings: pinctrl: qcom: add IPQ5332 pinctrl Kathiravan Thirumoorthy
2023-01-31 19:31 ` Krzysztof Kozlowski
2023-01-30 11:46 ` [PATCH V2 2/9] pinctrl: qcom: Introduce IPQ5332 TLMM driver Kathiravan Thirumoorthy
2023-01-30 11:46 ` [PATCH V2 3/9] clk: qcom: Add STROMER PLUS PLL type for IPQ5332 Kathiravan Thirumoorthy
2023-01-30 11:46 ` [PATCH V2 4/9] dt-bindings: clock: Add Qualcomm IPQ5332 GCC Kathiravan Thirumoorthy
2023-01-31 19:28 ` Krzysztof Kozlowski
2023-01-31 21:06 ` Stephen Boyd
2023-01-30 11:46 ` [PATCH V2 6/9] dt-bindings: qcom: add ipq5332 boards Kathiravan Thirumoorthy
2023-01-31 19:29 ` Krzysztof Kozlowski
2023-01-30 11:47 ` [PATCH V2 7/9] dt-bindings: firmware: qcom,scm: document IPQ5332 SCM Kathiravan Thirumoorthy
2023-01-30 11:47 ` [PATCH V2 8/9] arm64: dts: qcom: add IPQ5332 SoC and MI01.2 board support Kathiravan Thirumoorthy
2023-01-30 12:25 ` Konrad Dybcio
2023-02-01 5:37 ` Kathiravan T
2023-01-31 19:26 ` Krzysztof Kozlowski
2023-02-01 5:40 ` Kathiravan T
2023-01-30 11:47 ` [PATCH V2 9/9] arm64: defconfig: Enable IPQ5332 SoC base configs Kathiravan Thirumoorthy
2023-01-31 19:27 ` [PATCH V2 0/9] Add minimal boot support for IPQ5332 Krzysztof Kozlowski
2023-02-01 5:43 ` Kathiravan T
[not found] ` <20230130114702.20606-6-quic_kathirav@quicinc.com>
2023-01-31 21:09 ` Stephen Boyd [this message]
2023-02-01 5:45 ` [PATCH V2 5/9] clk: qcom: add Global Clock controller (GCC) driver for IPQ5332 SoC Kathiravan T
2023-02-01 5:46 ` Kathiravan T
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