* [PATCH] pinctrl: qcom: sc7180: Add missing tile info in SDC_QDSD_PINGROUP/UFS_RESET
@ 2019-10-21 14:15 Rajendra Nayak
2019-10-21 17:02 ` Bjorn Andersson
2019-11-04 15:04 ` Linus Walleij
0 siblings, 2 replies; 3+ messages in thread
From: Rajendra Nayak @ 2019-10-21 14:15 UTC (permalink / raw)
To: linus.walleij, bjorn.andersson
Cc: linux-arm-msm, linux-gpio, linux-kernel, Rajendra Nayak,
Veerabhadrarao Badiganti
The SDC_QDSD_PINGROUP/UFS_RESET macros are missing the .tile info needed to
calculate the right register offsets. Adding them here and also
adjusting the offsets accordingly.
Fixes: f2ae04c45b1a ("pinctrl: qcom: Add SC7180 pinctrl driver")
Reported-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
---
drivers/pinctrl/qcom/pinctrl-sc7180.c | 18 ++++++++++--------
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/pinctrl/qcom/pinctrl-sc7180.c b/drivers/pinctrl/qcom/pinctrl-sc7180.c
index 6399c8a2bc22..d6cfad7417b1 100644
--- a/drivers/pinctrl/qcom/pinctrl-sc7180.c
+++ b/drivers/pinctrl/qcom/pinctrl-sc7180.c
@@ -77,6 +77,7 @@ enum {
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
.intr_target_reg = 0, \
+ .tile = SOUTH, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
@@ -102,6 +103,7 @@ enum {
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
.intr_target_reg = 0, \
+ .tile = SOUTH, \
.mux_bit = -1, \
.pull_bit = 3, \
.drv_bit = 0, \
@@ -1087,14 +1089,14 @@ static const struct msm_pingroup sc7180_groups[] = {
[116] = PINGROUP(116, WEST, qup04, qup04, _, _, _, _, _, _, _),
[117] = PINGROUP(117, WEST, dp_hot, _, _, _, _, _, _, _, _),
[118] = PINGROUP(118, WEST, _, _, _, _, _, _, _, _, _),
- [119] = UFS_RESET(ufs_reset, 0x97f000),
- [120] = SDC_QDSD_PINGROUP(sdc1_rclk, 0x97a000, 15, 0),
- [121] = SDC_QDSD_PINGROUP(sdc1_clk, 0x97a000, 13, 6),
- [122] = SDC_QDSD_PINGROUP(sdc1_cmd, 0x97a000, 11, 3),
- [123] = SDC_QDSD_PINGROUP(sdc1_data, 0x97a000, 9, 0),
- [124] = SDC_QDSD_PINGROUP(sdc2_clk, 0x97b000, 14, 6),
- [125] = SDC_QDSD_PINGROUP(sdc2_cmd, 0x97b000, 11, 3),
- [126] = SDC_QDSD_PINGROUP(sdc2_data, 0x97b000, 9, 0),
+ [119] = UFS_RESET(ufs_reset, 0x7f000),
+ [120] = SDC_QDSD_PINGROUP(sdc1_rclk, 0x7a000, 15, 0),
+ [121] = SDC_QDSD_PINGROUP(sdc1_clk, 0x7a000, 13, 6),
+ [122] = SDC_QDSD_PINGROUP(sdc1_cmd, 0x7a000, 11, 3),
+ [123] = SDC_QDSD_PINGROUP(sdc1_data, 0x7a000, 9, 0),
+ [124] = SDC_QDSD_PINGROUP(sdc2_clk, 0x7b000, 14, 6),
+ [125] = SDC_QDSD_PINGROUP(sdc2_cmd, 0x7b000, 11, 3),
+ [126] = SDC_QDSD_PINGROUP(sdc2_data, 0x7b000, 9, 0),
};
static const struct msm_pinctrl_soc_data sc7180_pinctrl = {
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] pinctrl: qcom: sc7180: Add missing tile info in SDC_QDSD_PINGROUP/UFS_RESET
2019-10-21 14:15 [PATCH] pinctrl: qcom: sc7180: Add missing tile info in SDC_QDSD_PINGROUP/UFS_RESET Rajendra Nayak
@ 2019-10-21 17:02 ` Bjorn Andersson
2019-11-04 15:04 ` Linus Walleij
1 sibling, 0 replies; 3+ messages in thread
From: Bjorn Andersson @ 2019-10-21 17:02 UTC (permalink / raw)
To: Rajendra Nayak
Cc: linus.walleij, linux-arm-msm, linux-gpio, linux-kernel,
Veerabhadrarao Badiganti
On Mon 21 Oct 07:15 PDT 2019, Rajendra Nayak wrote:
> The SDC_QDSD_PINGROUP/UFS_RESET macros are missing the .tile info needed to
> calculate the right register offsets. Adding them here and also
> adjusting the offsets accordingly.
>
> Fixes: f2ae04c45b1a ("pinctrl: qcom: Add SC7180 pinctrl driver")
>
> Reported-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> ---
> drivers/pinctrl/qcom/pinctrl-sc7180.c | 18 ++++++++++--------
> 1 file changed, 10 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/pinctrl/qcom/pinctrl-sc7180.c b/drivers/pinctrl/qcom/pinctrl-sc7180.c
> index 6399c8a2bc22..d6cfad7417b1 100644
> --- a/drivers/pinctrl/qcom/pinctrl-sc7180.c
> +++ b/drivers/pinctrl/qcom/pinctrl-sc7180.c
> @@ -77,6 +77,7 @@ enum {
> .intr_cfg_reg = 0, \
> .intr_status_reg = 0, \
> .intr_target_reg = 0, \
> + .tile = SOUTH, \
> .mux_bit = -1, \
> .pull_bit = pull, \
> .drv_bit = drv, \
> @@ -102,6 +103,7 @@ enum {
> .intr_cfg_reg = 0, \
> .intr_status_reg = 0, \
> .intr_target_reg = 0, \
> + .tile = SOUTH, \
> .mux_bit = -1, \
> .pull_bit = 3, \
> .drv_bit = 0, \
> @@ -1087,14 +1089,14 @@ static const struct msm_pingroup sc7180_groups[] = {
> [116] = PINGROUP(116, WEST, qup04, qup04, _, _, _, _, _, _, _),
> [117] = PINGROUP(117, WEST, dp_hot, _, _, _, _, _, _, _, _),
> [118] = PINGROUP(118, WEST, _, _, _, _, _, _, _, _, _),
> - [119] = UFS_RESET(ufs_reset, 0x97f000),
> - [120] = SDC_QDSD_PINGROUP(sdc1_rclk, 0x97a000, 15, 0),
> - [121] = SDC_QDSD_PINGROUP(sdc1_clk, 0x97a000, 13, 6),
> - [122] = SDC_QDSD_PINGROUP(sdc1_cmd, 0x97a000, 11, 3),
> - [123] = SDC_QDSD_PINGROUP(sdc1_data, 0x97a000, 9, 0),
> - [124] = SDC_QDSD_PINGROUP(sdc2_clk, 0x97b000, 14, 6),
> - [125] = SDC_QDSD_PINGROUP(sdc2_cmd, 0x97b000, 11, 3),
> - [126] = SDC_QDSD_PINGROUP(sdc2_data, 0x97b000, 9, 0),
> + [119] = UFS_RESET(ufs_reset, 0x7f000),
> + [120] = SDC_QDSD_PINGROUP(sdc1_rclk, 0x7a000, 15, 0),
PS. There's no drive-strength control of the rclk and I presume that's
why this is just specified as 0. It would be good if pinctrl-msm was
improved to be able to handle pins with bias, but no drive-strength
control and then this updated.
But we should merge this patch as is.
Regards,
Bjorn
> + [121] = SDC_QDSD_PINGROUP(sdc1_clk, 0x7a000, 13, 6),
> + [122] = SDC_QDSD_PINGROUP(sdc1_cmd, 0x7a000, 11, 3),
> + [123] = SDC_QDSD_PINGROUP(sdc1_data, 0x7a000, 9, 0),
> + [124] = SDC_QDSD_PINGROUP(sdc2_clk, 0x7b000, 14, 6),
> + [125] = SDC_QDSD_PINGROUP(sdc2_cmd, 0x7b000, 11, 3),
> + [126] = SDC_QDSD_PINGROUP(sdc2_data, 0x7b000, 9, 0),
> };
>
> static const struct msm_pinctrl_soc_data sc7180_pinctrl = {
> --
> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
> of Code Aurora Forum, hosted by The Linux Foundation
>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] pinctrl: qcom: sc7180: Add missing tile info in SDC_QDSD_PINGROUP/UFS_RESET
2019-10-21 14:15 [PATCH] pinctrl: qcom: sc7180: Add missing tile info in SDC_QDSD_PINGROUP/UFS_RESET Rajendra Nayak
2019-10-21 17:02 ` Bjorn Andersson
@ 2019-11-04 15:04 ` Linus Walleij
1 sibling, 0 replies; 3+ messages in thread
From: Linus Walleij @ 2019-11-04 15:04 UTC (permalink / raw)
To: Rajendra Nayak
Cc: Bjorn Andersson, MSM, open list:GPIO SUBSYSTEM, linux-kernel,
Veerabhadrarao Badiganti
On Mon, Oct 21, 2019 at 4:15 PM Rajendra Nayak <rnayak@codeaurora.org> wrote:
> The SDC_QDSD_PINGROUP/UFS_RESET macros are missing the .tile info needed to
> calculate the right register offsets. Adding them here and also
> adjusting the offsets accordingly.
>
> Fixes: f2ae04c45b1a ("pinctrl: qcom: Add SC7180 pinctrl driver")
>
> Reported-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Patch applied with Bjorn's review tag!
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 3+ messages in thread
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2019-10-21 14:15 [PATCH] pinctrl: qcom: sc7180: Add missing tile info in SDC_QDSD_PINGROUP/UFS_RESET Rajendra Nayak
2019-10-21 17:02 ` Bjorn Andersson
2019-11-04 15:04 ` Linus Walleij
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