* Re: [PATCH v2] arm64: dts: qcom: sc7180: Add LPASS clock controller nodes
2020-08-01 18:13 ` [PATCH v2] arm64: dts: qcom: sc7180: Add LPASS clock controller nodes Taniya Das
@ 2020-08-03 18:09 ` Doug Anderson
2020-08-03 19:38 ` Stephen Boyd
1 sibling, 0 replies; 4+ messages in thread
From: Doug Anderson @ 2020-08-03 18:09 UTC (permalink / raw)
To: Taniya Das
Cc: Stephen Boyd, Michael Turquette, David Brown, Rajendra Nayak,
linux-arm-msm, open list:ARM/QUALCOMM SUPPORT, linux-clk, LKML,
Andy Gross,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Rob Herring, Rob Herring, Bjorn Andersson
Hi,
On Sat, Aug 1, 2020 at 11:14 AM Taniya Das <tdas@codeaurora.org> wrote:
>
> Update the clock controller nodes for Low power audio subsystem
> functionality.
>
> Signed-off-by: Taniya Das <tdas@codeaurora.org>
> ---
> arch/arm64/boot/dts/qcom/sc7180.dtsi | 25 +++++++++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> index d46b383..7cf8bfe 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -8,6 +8,7 @@
> #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
> #include <dt-bindings/clock/qcom,gcc-sc7180.h>
> #include <dt-bindings/clock/qcom,gpucc-sc7180.h>
> +#include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
> #include <dt-bindings/clock/qcom,rpmh.h>
> #include <dt-bindings/clock/qcom,videocc-sc7180.h>
> #include <dt-bindings/interconnect/qcom,osm-l3.h>
> @@ -3312,6 +3313,30 @@
> qcom,msa-fixed-perm;
> status = "disabled";
> };
> +
> + lpasscc: clock-controller@62d00000 {
> + compatible = "qcom,sc7180-lpasscorecc";
> + reg = <0 0x62d00000 0 0x50000>,
> + <0 0x62780000 0 0x30000>;
> + reg-names = "lpass_core_cc", "lpass_audio_cc";
> + clocks = <&gcc GCC_LPASS_CFG_NOC_SWAY_CLK>,
> + <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "iface", "bi_tcxo";
> + power-domains = <&lpass_hm LPASS_CORE_HM_GDSCR>;
> + #clock-cells = <1>;
> + #power-domain-cells = <1>;
> + };
> +
> + lpass_hm: clock-controller@63000000 {
> + compatible = "qcom,sc7180-lpasshm";
> + reg = <0 0x63000000 0 0x28>;
> + clocks = <&gcc GCC_LPASS_CFG_NOC_SWAY_CLK>,
> + <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "iface", "bi_tcxo";
> + #clock-cells = <1>;
> + #power-domain-cells = <1>;
> + };
> +
> };
You end up adding a blank line at the end that Bjron can probably fix
when applying, but other than that this looks good to me.
Reviewed-by: Douglas Anderson <dianders@chromium.org>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v2] arm64: dts: qcom: sc7180: Add LPASS clock controller nodes
2020-08-01 18:13 ` [PATCH v2] arm64: dts: qcom: sc7180: Add LPASS clock controller nodes Taniya Das
2020-08-03 18:09 ` Doug Anderson
@ 2020-08-03 19:38 ` Stephen Boyd
1 sibling, 0 replies; 4+ messages in thread
From: Stephen Boyd @ 2020-08-03 19:38 UTC (permalink / raw)
To: Michael Turquette, Taniya Das
Cc: David Brown, Rajendra Nayak, linux-arm-msm, linux-soc, linux-clk,
linux-kernel, Andy Gross, devicetree, robh, robh+dt,
Bjorn Andersson, Doug Anderson, Taniya Das
Quoting Taniya Das (2020-08-01 11:13:35)
> Update the clock controller nodes for Low power audio subsystem
> functionality.
>
> Signed-off-by: Taniya Das <tdas@codeaurora.org>
> ---
> arch/arm64/boot/dts/qcom/sc7180.dtsi | 25 +++++++++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> index d46b383..7cf8bfe 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -8,6 +8,7 @@
> #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
> #include <dt-bindings/clock/qcom,gcc-sc7180.h>
> #include <dt-bindings/clock/qcom,gpucc-sc7180.h>
> +#include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
> #include <dt-bindings/clock/qcom,rpmh.h>
> #include <dt-bindings/clock/qcom,videocc-sc7180.h>
> #include <dt-bindings/interconnect/qcom,osm-l3.h>
> @@ -3312,6 +3313,30 @@
> qcom,msa-fixed-perm;
> status = "disabled";
> };
> +
> + lpasscc: clock-controller@62d00000 {
> + compatible = "qcom,sc7180-lpasscorecc";
> + reg = <0 0x62d00000 0 0x50000>,
> + <0 0x62780000 0 0x30000>;
Doesn't look aligned in my MUA, but who knows!
> + reg-names = "lpass_core_cc", "lpass_audio_cc";
> + clocks = <&gcc GCC_LPASS_CFG_NOC_SWAY_CLK>,
> + <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "iface", "bi_tcxo";
> + power-domains = <&lpass_hm LPASS_CORE_HM_GDSCR>;
> + #clock-cells = <1>;
> + #power-domain-cells = <1>;
> + };
> +
^ permalink raw reply [flat|nested] 4+ messages in thread