[PATCH 0/3] Add lpass pin control support for audio on sc7280 based targets

[PATCH 0/3] Add lpass pin control support for audio on sc7280 based targets

[Srinivasa Rao Mandadapu]

This patch set is to add lpass pin control support for Audio over I2S,
wcd codec and digital mics.

This patch set depends on:
	-- https://patchwork.kernel.org/project/alsa-devel/patch/1638891339-21806-3-git-send-email-quic_srivasam@quicinc.com/

Srinivasa Rao Mandadapu (3):
  arm64: dts: qcom: sc7280: Add pinmux for I2S speaker and Headset
  arm64: dts: qcom: sc7280: add lpass lpi pin controller node
  arm64: dts: qcom: sc7280: Add wcd9380 pinmux

 arch/arm64/boot/dts/qcom/sc7280-idp.dtsi |  38 ++++++
 arch/arm64/boot/dts/qcom/sc7280.dtsi     | 204 +++++++++++++++++++++++++++++++
 2 files changed, 242 insertions(+)

-- 
2.7.4

[PATCH 1/3] arm64: dts: qcom: sc7280: Add pinmux for I2S speaker and Headset

[Srinivasa Rao Mandadapu]

Add AMP enable node and pinmux for primary and secondary I2S
for SC7280 based platforms.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
---
 arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 11 +++++++
 arch/arm64/boot/dts/qcom/sc7280.dtsi     | 55 ++++++++++++++++++++++++++++++++
 2 files changed, 66 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index d623d71..86f182c 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -491,6 +491,17 @@
 };
 
 &tlmm {
+	amp_en: amp-en {
+		pinmux {
+			pins = "gpio63";
+			function = "gpio";
+		};
+		pinconf {
+			pins = "gpio63";
+			bias-pull-down;
+		};
+	};
+
 	nvme_pwren: nvme-pwren {
 		function = "gpio";
 	};
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 937c2e0..b5ebc9ec 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -3461,6 +3461,61 @@
 				};
 			};
 
+			pri_mi2s_active: primary_mi2s_active {
+				sclk {
+					pins = "gpio97";
+					function = "mi2s0_sck";
+					drive-strength = <16>;
+				};
+				ws {
+					pins = "gpio100";
+					function = "mi2s0_ws";
+					drive-strength = <16>;
+				};
+				data0 {
+					pins = "gpio98";
+					function = "mi2s0_data0";
+					drive-strength = <16>;
+				};
+				data1 {
+					pins = "gpio99";
+					function = "mi2s0_data1";
+					drive-strength = <16>;
+				};
+			};
+
+			pri_mi2s_mclk_active: pri-mi2s-mclk-active {
+				pinmux {
+					pins = "gpio96";
+					function = "pri_mi2s";
+				};
+			};
+
+			sec_mi2s_active: sec-mi2s-active {
+				sclk {
+					pins = "gpio106";
+					function = "mi2s1_sck";
+					drive-strength = <16>;
+					bias-disable;
+					output-high;
+				};
+
+				ws {
+					pins = "gpio108";
+					function = "mi2s1_ws";
+					drive-strength = <16>;
+					output-high;
+				};
+
+				data0 {
+					pins = "gpio107";
+					function = "mi2s1_data0";
+					drive-strength = <16>;
+					bias-disable;
+					output-high;
+				};
+			};
+
 			qup_uart8_cts: qup-uart8-cts {
 				pins = "gpio32";
 				function = "qup10";
-- 
2.7.4

[PATCH 2/3] arm64: dts: qcom: sc7280: add lpass lpi pin controller node

[Srinivasa Rao Mandadapu]

Add LPASS LPI pinctrl node required for Audio functionality on sc7280
based platforms.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
---
 arch/arm64/boot/dts/qcom/sc7280.dtsi | 149 +++++++++++++++++++++++++++++++++++
 1 file changed, 149 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index b5ebc9ec..6233f2c 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -1744,6 +1744,155 @@
 			#clock-cells = <1>;
 		};
 
+		lpass_tlmm: pinctrl@33c0000 {
+			compatible = "qcom,sc7280-lpass-lpi-pinctrl";
+			reg = <0 0x33c0000 0x0 0x20000>,
+				<0 0x3550000 0x0 0x10000>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			gpio-ranges = <&lpass_tlmm 0 0 15>;
+
+			#clock-cells = <1>;
+
+			dmic01_active: dmic01-active-pins {
+				clk {
+					pins = "gpio6";
+					function = "dmic1_clk";
+					drive-strength = <8>;
+					output-high;
+				};
+				data {
+					pins = "gpio7";
+					function = "dmic1_data";
+					drive-strength = <8>;
+					input-enable;
+				};
+			};
+
+			dmic01_sleep: dmic01-sleep-pins {
+				clk {
+					pins = "gpio6";
+					function = "dmic1_clk";
+					drive-strength = <2>;
+					bias-disable;
+					output-low;
+				};
+
+				data {
+					pins = "gpio7";
+					function = "dmic1_data";
+					drive-strength = <2>;
+					pull-down;
+					input-enable;
+				};
+			};
+
+			dmic02_active: dmic02-active-pins {
+				clk {
+					pins = "gpio8";
+					function = "dmic2_clk";
+					drive-strength = <8>;
+					output-high;
+				};
+				data {
+					pins = "gpio9";
+					function = "dmic2_data";
+					drive-strength = <8>;
+					input-enable;
+				};
+			};
+
+			dmic02_sleep: dmic02-sleep-pins {
+				clk {
+					pins = "gpio8";
+					function = "dmic2_clk";
+					drive-strength = <2>;
+					bias-disable;
+					output-low;
+				};
+
+				data {
+					pins = "gpio9";
+					function = "dmic2_data";
+					drive-strength = <2>;
+					pull-down;
+					input-enable;
+				};
+			};
+
+			rx_swr_active: rx_swr-active-pins {
+				clk {
+					pins = "gpio3";
+					function = "swr_rx_clk";
+					drive-strength = <2>;
+					slew-rate = <1>;
+					bias-disable;
+				};
+
+				data {
+					pins = "gpio4", "gpio5";
+					function = "swr_rx_data";
+					drive-strength = <2>;
+					slew-rate = <1>;
+					bias-bus-hold;
+				};
+			};
+
+			rx_swr_sleep: rx_swr-sleep-pins {
+				clk {
+					pins = "gpio3";
+					function = "swr_rx_clk";
+					drive-strength = <2>;
+					input-enable;
+					bias-pull-down;
+				};
+
+				data {
+					pins = "gpio4", "gpio5";
+					function = "swr_rx_data";
+					drive-strength = <2>;
+					input-enable;
+					bias-pull-down;
+				};
+			};
+
+			tx_swr_active: tx_swr-active-pins {
+				clk {
+					pins = "gpio0";
+					function = "swr_tx_clk";
+					drive-strength = <2>;
+					slew-rate = <1>;
+					bias-disable;
+				};
+
+				data {
+					pins = "gpio1", "gpio2", "gpio14";
+					function = "swr_tx_data";
+					drive-strength = <2>;
+					slew-rate = <1>;
+					bias-bus-hold;
+				};
+			};
+
+			tx_swr_sleep: tx_swr-sleep-pins {
+				clk {
+					pins = "gpio0";
+					function = "swr_tx_clk";
+					drive-strength = <2>;
+					input-enable;
+					bias-pull-down;
+				};
+
+				data {
+					pins = "gpio1", "gpio2", "gpio14";
+					function = "swr_tx_data";
+					drive-strength = <2>;
+					input-enable;
+					bias-bus-hold;
+				};
+			};
+		};
+
 		lpass_ag_noc: interconnect@3c40000 {
 			reg = <0 0x03c40000 0 0xf080>;
 			compatible = "qcom,sc7280-lpass-ag-noc";
-- 
2.7.4

[PATCH 3/3] arm64: dts: qcom: sc7280: Add wcd9380 pinmux

[Srinivasa Rao Mandadapu]

Add pinmux to reset wcd codec, conneceted on SC7280 based platforms.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
---
 arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index 86f182c..ddeb508 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -565,6 +565,33 @@
 		 */
 		bias-pull-up;
 	};
+
+	wcd938x_reset_active: wcd938x_reset_active {
+		mux {
+			pins = "gpio83";
+			function = "gpio";
+		};
+
+		config {
+			pins = "gpio83";
+			drive-strength = <16>;
+			output-high;
+		};
+	};
+
+	wcd938x_reset_sleep: wcd938x_reset_sleep {
+		mux {
+			pins = "gpio83";
+			function = "gpio";
+		};
+
+		config {
+			pins = "gpio83";
+			drive-strength = <16>;
+			bias-disable;
+			output-low;
+		};
+	};
 };
 
 &sdc1_on {
-- 
2.7.4

Re: [PATCH 1/3] arm64: dts: qcom: sc7280: Add pinmux for I2S speaker and Headset

[Doug Anderson]

Hi,

On Thu, Dec 23, 2021 at 7:43 AM Srinivasa Rao Mandadapu
<quic_srivasam@quicinc.com> wrote:
>
> Add AMP enable node and pinmux for primary and secondary I2S
> for SC7280 based platforms.
>
> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 11 +++++++
>  arch/arm64/boot/dts/qcom/sc7280.dtsi     | 55 ++++++++++++++++++++++++++++++++
>  2 files changed, 66 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> index d623d71..86f182c 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> @@ -491,6 +491,17 @@
>  };
>
>  &tlmm {
> +       amp_en: amp-en {
> +               pinmux {
> +                       pins = "gpio63";
> +                       function = "gpio";
> +               };
> +               pinconf {
> +                       pins = "gpio63";
> +                       bias-pull-down;
> +               };

Please don't split up "pinmux" and "pinconf" into two nodes anymore.
This was done in old SoCs but it's not the new style. Also:
* Having a pull-down for outputs doesn't make sense, does it?
* Should be specifying a drive strength, right?

So it should be:

amp_en: amp-en {
  pins = "gpio63";
  function = "gpio";
  bias-disable;
  drive-strength = <2>;
};


> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 937c2e0..b5ebc9ec 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -3461,6 +3461,61 @@
>                                 };
>                         };
>
> +                       pri_mi2s_active: primary_mi2s_active {
> +                               sclk {
> +                                       pins = "gpio97";
> +                                       function = "mi2s0_sck";
> +                                       drive-strength = <16>;

A few problems:

1. drive-strength shouldn't be in the sc7280.dtsi file. That's a board
property and should be specified in the board.

2. drive-strength=16 is likely way too strong. On one sc7280 board,
our EE measured the signal and said "The AP is driving I2S lines to
[...] codec way too hard (the overshoot will damage the codec long
term).". Are you sure you need 16?

3. Node names should have dashes, not underscores.

4. I guess it's up to Bjorn, but I don't see the huge benefit of
grouping in an overarching node like this.

5. I don't know that we need the "active" there.

6. Not sure why "mclk" is down by its lonesome.

7. In general, pins should be sorted alphabetically.

So overall, I'd prefer this in the SoC dtsi file:

  pri_mi2s_data0: pri-mi2s-data0 {
    pins = "gpio98";
    function = "mi2s0_data0";
  }

  pri_mi2s_data1: pri-mi2s-data1 {
    pins = "gpio99";
    function = "mi2s0_data1";
  }

  pri_mi2s_mclk: pri-mi2s-mclk {
    pins = "gpio96";
    function = "pri_mi2s";
  };

  pri_mi2s_sclk: pri-mi2s-sclk {
    pins = "gpio97";
    function = "mi2s0_sck";
  }

  pri_mi2s_ws: pri-mi2s-ws {
    pins = "gpio100";
    function = "mi2s0_ws";
  }

Then the board file would have:

&pri_mi2s_data0 {
  drive-strength = <some_number_probably_not_16>;
  bias-something;
};

&pri_mi2s_data1 {
  drive-strength = <some_number_probably_not_16>;
  bias-something;
};

&pri_mi2s_mclk {
  drive-strength = <some_number_probably_not_16>;
  bias-something;
};

&pri_mi2s_sclk {
  drive-strength = <some_number_probably_not_16>;
  bias-something;
};

&pri_mi2s_ws {
  drive-strength = <some_number_probably_not_16>;
  bias-something;
};


> +                       sec_mi2s_active: sec-mi2s-active {
> +                               sclk {
> +                                       pins = "gpio106";
> +                                       function = "mi2s1_sck";
> +                                       drive-strength = <16>;
> +                                       bias-disable;
> +                                       output-high;
> +                               };

Similar issues for the "sec" i2s bus, but you've also got this
"output-high". Are you sure you need that?