From: Ulf Hansson <ulf.hansson@linaro.org>
To: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Cc: Adrian Hunter <adrian.hunter@intel.com>,
Asutosh Das <asutoshd@codeaurora.org>,
Sahitya Tummala <stummala@codeaurora.org>,
Sayali Lokhande <sayalil@codeaurora.org>,
cang@codeaurora.org, Ram Prakash Gupta <rampraka@codeaurora.org>,
"linux-mmc@vger.kernel.org" <linux-mmc@vger.kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
linux-arm-msm <linux-arm-msm@vger.kernel.org>
Subject: Re: [PATCH] mmc: sdhci-msm: Correct the offset and value for DDR_CONFIG register
Date: Mon, 16 Dec 2019 13:09:03 +0100 [thread overview]
Message-ID: <CAPDyKFqk75n9GE9JELgg=bnwjRHhTNkOMFLL01Y0X1NwgFgOYw@mail.gmail.com> (raw)
In-Reply-To: <0101016ef47b4d25-49791932-586b-456e-b9a7-6f9a6f95babf-000000@us-west-2.amazonses.com>
On Wed, 11 Dec 2019 at 11:22, Veerabhadrarao Badiganti
<vbadigan@codeaurora.org> wrote:
>
>
> On 12/10/2019 3:21 PM, Ulf Hansson wrote:
> > On Tue, 26 Nov 2019 at 11:19, Veerabhadrarao Badiganti
> > <vbadigan@codeaurora.org> wrote:
> >> The DDR_CONFIG register offset got updated after a specific
> >> minor version of sdcc V4. This offset change has not been properly
> >> taken care of while updating register changes for sdcc V5.
> >>
> >> Correcting proper offset for this register.
> >> Also updating this register value to reflect the recommended RCLK
> >> delay.
> >>
> >> Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
> > I have applied this for fixes, however it seems like this should also
> > be tagged for stable, right?
>
> Thank you. Yes, I agree.
>
> >
> > Is there a specific commit this fixes or should we just find the
> > version it applies to?
>
> It fixes the bug introduced by commit:
>
> f153588 (mmc: sdhci-msm: Define new Register address map)
Great, thanks added a fixes/stable tag.
[...]
Kind regards
Uffe
next prev parent reply other threads:[~2019-12-16 12:09 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <0101016ea738eb52-8c362755-205a-4383-9181-1a867e82eeed-000000@us-west-2.amazonses.com>
2019-12-10 9:51 ` [PATCH] mmc: sdhci-msm: Correct the offset and value for DDR_CONFIG register Ulf Hansson
2019-12-11 10:22 ` Veerabhadrarao Badiganti
2019-12-16 12:09 ` Ulf Hansson [this message]
2019-11-26 10:19 Veerabhadrarao Badiganti
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