From: Asutosh Das <quic_asutoshd@quicinc.com>
To: <quic_cang@quicinc.com>, <quic_nitirawa@quicinc.com>,
<quic_rampraka@quicinc.com>, <quic_bhaskarv@quicinc.com>,
<quic_richardp@quicinc.com>, <linux-scsi@vger.kernel.org>
Cc: Asutosh Das <quic_asutoshd@quicinc.com>,
<linux-arm-msm@vger.kernel.org>, <quic_nguyenb@quicinc.com>,
<quic_xiaosenh@quicinc.com>, <bvanassche@acm.org>,
<avri.altman@wdc.com>, <mani@kernel.org>, <beanhuo@micron.com>
Subject: [PATCH v2 15/17] ufs: core: mcq: Add completion support in poll
Date: Wed, 5 Oct 2022 18:06:14 -0700 [thread overview]
Message-ID: <fc711671f83372d067c6107abd969c904e87f52f.1665017636.git.quic_asutoshd@quicinc.com> (raw)
In-Reply-To: <cover.1665017636.git.quic_asutoshd@quicinc.com>
Complete cqe requests in poll. Assumption is that
several poll completion may happen in different CPUs
for the same Completion Queue. Hence a spin lock
protection is added.
Co-developed-by: Can Guo <quic_cang@quicinc.com>
Signed-off-by: Can Guo <quic_cang@quicinc.com>
Signed-off-by: Asutosh Das <quic_asutoshd@quicinc.com>
---
drivers/ufs/core/ufs-mcq.c | 13 +++++++++++++
drivers/ufs/core/ufshcd-priv.h | 2 ++
drivers/ufs/core/ufshcd.c | 7 +++++++
include/ufs/ufshcd.h | 2 ++
4 files changed, 24 insertions(+)
diff --git a/drivers/ufs/core/ufs-mcq.c b/drivers/ufs/core/ufs-mcq.c
index 1ae398e..0fb8e7e 100644
--- a/drivers/ufs/core/ufs-mcq.c
+++ b/drivers/ufs/core/ufs-mcq.c
@@ -376,6 +376,18 @@ unsigned long ufshcd_mcq_poll_cqe_nolock(struct ufs_hba *hba,
return completed_reqs;
}
+unsigned long ufshcd_mcq_poll_cqe_lock(struct ufs_hba *hba,
+ struct ufs_hw_queue *hwq)
+{
+ unsigned long completed_reqs;
+
+ spin_lock(&hwq->cq_lock);
+ completed_reqs = ufshcd_mcq_poll_cqe_nolock(hba, hwq);
+ spin_unlock(&hwq->cq_lock);
+
+ return completed_reqs;
+}
+
void ufshcd_mcq_make_queues_operational(struct ufs_hba *hba)
{
struct ufs_hw_queue *hwq;
@@ -469,6 +481,7 @@ int ufshcd_mcq_init(struct ufs_hba *hba)
hwq = &hba->uhq[i];
hwq->max_entries = hba->nutrs;
spin_lock_init(&hwq->sq_lock);
+ spin_lock_init(&hwq->cq_lock);
}
/* The very first HW queue is to serve device command */
diff --git a/drivers/ufs/core/ufshcd-priv.h b/drivers/ufs/core/ufshcd-priv.h
index 417e2ca..6e9bec6 100644
--- a/drivers/ufs/core/ufshcd-priv.h
+++ b/drivers/ufs/core/ufshcd-priv.h
@@ -64,6 +64,8 @@ unsigned long ufshcd_mcq_poll_cqe_nolock(struct ufs_hba *hba,
struct ufs_hw_queue *hwq);
struct ufs_hw_queue *ufshcd_mcq_req_to_hwq(struct ufs_hba *hba,
struct request *req);
+unsigned long ufshcd_mcq_poll_cqe_lock(struct ufs_hba *hba,
+ struct ufs_hw_queue *hwq);
#define UFSHCD_MCQ_IO_QUEUE_OFFSET 1
#define SD_ASCII_STD true
diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c
index 908692d..f1a9b26 100644
--- a/drivers/ufs/core/ufshcd.c
+++ b/drivers/ufs/core/ufshcd.c
@@ -5439,6 +5439,13 @@ static int ufshcd_poll(struct Scsi_Host *shost, unsigned int queue_num)
struct ufs_hba *hba = shost_priv(shost);
unsigned long completed_reqs, flags;
u32 tr_doorbell;
+ struct ufs_hw_queue *hwq;
+
+ if (is_mcq_enabled(hba)) {
+ hwq = &hba->uhq[queue_num + UFSHCD_MCQ_IO_QUEUE_OFFSET];
+
+ return ufshcd_mcq_poll_cqe_lock(hba, hwq);
+ }
spin_lock_irqsave(&hba->outstanding_lock, flags);
tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
index 28b2d12..9bf2c5e 100644
--- a/include/ufs/ufshcd.h
+++ b/include/ufs/ufshcd.h
@@ -1062,6 +1062,7 @@ struct ufs_hba {
* @sq_lock: serialize submission queue access
* @cq_tail_slot: current slot to which CQ tail pointer is pointing
* @cq_head_slot: current slot to which CQ head pointer is pointing
+ * @cq_lock: Synchronize between multiple polling instances
*/
struct ufs_hw_queue {
void __iomem *mcq_sq_head;
@@ -1079,6 +1080,7 @@ struct ufs_hw_queue {
spinlock_t sq_lock;
u32 cq_tail_slot;
u32 cq_head_slot;
+ spinlock_t cq_lock;
};
static inline bool is_mcq_enabled(struct ufs_hba *hba)
--
2.7.4
next prev parent reply other threads:[~2022-10-06 1:07 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-06 1:05 [PATCH v2 00/17] Add Multi Circular Queue Support Asutosh Das
2022-10-06 1:06 ` [PATCH v2 01/17] ufs: core: Probe for ext_iid support Asutosh Das
2022-10-06 1:06 ` [PATCH v2 02/17] ufs: core: Optimize duplicate code to read extended feature Asutosh Das
2022-10-06 1:06 ` [PATCH v2 03/17] ufs: core: Introduce Multi-circular queue capability Asutosh Das
2022-10-06 1:06 ` [PATCH v2 04/17] ufs: core: Defer adding host to scsi if mcq is supported Asutosh Das
2022-10-06 1:06 ` [PATCH v2 05/17] ufs: core: mcq: Introduce Multi Circular Queue Asutosh Das
2022-10-18 5:29 ` Eddie Huang
2022-10-18 16:00 ` Asutosh Das
2022-10-19 10:28 ` Eddie Huang
2022-10-06 1:06 ` [PATCH v2 06/17] ufs: core: mcq: Configure resource regions Asutosh Das
[not found] ` <5bd645ba24e1dc17343dd8d7b52fe6ea1eb6333d.camel@medaitek.com>
2022-10-14 9:31 ` Can Guo
[not found] ` <6592c7fe-0828-6bb3-17a8-9db53aac1873@quicinc.com>
2022-10-17 9:27 ` Fwd: " Eddie Huang
2022-10-18 1:47 ` Asutosh Das
2022-10-18 2:56 ` Eddie Huang
2022-10-19 19:50 ` Asutosh Das
2022-10-19 21:06 ` Bart Van Assche
2022-10-19 22:11 ` Asutosh Das
2022-10-20 1:13 ` Eddie Huang
2022-10-06 1:06 ` [PATCH v2 07/17] ufs: core: mcq: Calculate queue depth Asutosh Das
2022-10-06 1:06 ` [PATCH v2 08/17] ufs: core: mcq: Allocate memory for mcq mode Asutosh Das
[not found] ` <813a86729b42693d2ac0b6e29ab7867feef69e23.camel@medaitek.com>
2022-10-17 21:17 ` Asutosh Das
2022-10-06 1:06 ` [PATCH v2 09/17] ufs: core: mcq: Configure operation and runtime interface Asutosh Das
2022-10-06 1:06 ` [PATCH v2 10/17] ufs: core: mcq: Use shared tags for MCQ mode Asutosh Das
2022-10-06 1:06 ` [PATCH v2 11/17] ufs: core: Prepare ufshcd_send_command for mcq Asutosh Das
2022-10-06 1:06 ` [PATCH v2 12/17] ufs: core: mcq: Find hardware queue to queue request Asutosh Das
2022-10-06 1:06 ` [PATCH v2 13/17] ufs: core: Prepare for completion in mcq Asutosh Das
2022-10-06 1:06 ` [PATCH v2 14/17] ufs: mcq: Add completion support of a cqe Asutosh Das
2022-10-06 1:06 ` Asutosh Das [this message]
2022-10-06 1:06 ` [PATCH v2 16/17] ufs: core: mcq: Enable Multi Circular Queue Asutosh Das
2022-10-06 1:06 ` [PATCH v2 17/17] ufs: qcom-host: Enable multi circular queue capability Asutosh Das
[not found] ` <CGME20221006010736epcas2p20777225a537d4f2124e9a7264b2fffcf@epcms2p3>
2022-10-06 3:50 ` [PATCH v2 01/17] ufs: core: Probe for ext_iid support Daejun Park
2022-10-17 21:03 ` Asutosh Das
[not found] ` <CGME20221006010745epcas2p38b37890b7e1fefb45b8fbb0e14ab0a82@epcms2p7>
2022-10-07 2:41 ` [PATCH v2 06/17] ufs: core: mcq: Configure resource regions Daejun Park
2022-10-17 20:54 ` Asutosh Das
[not found] ` <CGME20221006010745epcas2p38b37890b7e1fefb45b8fbb0e14ab0a82@epcms2p8>
2022-10-07 3:44 ` Daejun Park
2022-10-17 21:03 ` (2) " Asutosh Das
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=fc711671f83372d067c6107abd969c904e87f52f.1665017636.git.quic_asutoshd@quicinc.com \
--to=quic_asutoshd@quicinc.com \
--cc=avri.altman@wdc.com \
--cc=beanhuo@micron.com \
--cc=bvanassche@acm.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-scsi@vger.kernel.org \
--cc=mani@kernel.org \
--cc=quic_bhaskarv@quicinc.com \
--cc=quic_cang@quicinc.com \
--cc=quic_nguyenb@quicinc.com \
--cc=quic_nitirawa@quicinc.com \
--cc=quic_rampraka@quicinc.com \
--cc=quic_richardp@quicinc.com \
--cc=quic_xiaosenh@quicinc.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).