* [PATCH] drm/msm/a6xx: Fix misleading comment
@ 2023-06-30 16:20 Rob Clark
2023-07-11 0:02 ` [Freedreno] " Dmitry Baryshkov
2023-07-13 19:40 ` Akhil P Oommen
0 siblings, 2 replies; 3+ messages in thread
From: Rob Clark @ 2023-06-30 16:20 UTC (permalink / raw)
To: dri-devel; +Cc: freedreno, linux-arm-msm, Rob Clark
From: Rob Clark <robdclark@chromium.org>
The range is actually len+1.
Signed-off-by: Rob Clark <robdclark@chromium.org>
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h
index eea2e60ce3b7..edf76a4b16bd 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h
@@ -39,8 +39,8 @@ struct a6xx_gpu {
/*
* Given a register and a count, return a value to program into
- * REG_CP_PROTECT_REG(n) - this will block both reads and writes for _len
- * registers starting at _reg.
+ * REG_CP_PROTECT_REG(n) - this will block both reads and writes for
+ * _len + 1 registers starting at _reg.
*/
#define A6XX_PROTECT_NORDWR(_reg, _len) \
((1 << 31) | \
--
2.41.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [Freedreno] [PATCH] drm/msm/a6xx: Fix misleading comment
2023-06-30 16:20 [PATCH] drm/msm/a6xx: Fix misleading comment Rob Clark
@ 2023-07-11 0:02 ` Dmitry Baryshkov
2023-07-13 19:40 ` Akhil P Oommen
1 sibling, 0 replies; 3+ messages in thread
From: Dmitry Baryshkov @ 2023-07-11 0:02 UTC (permalink / raw)
To: Rob Clark, dri-devel; +Cc: Rob Clark, linux-arm-msm, freedreno
On 30/06/2023 19:20, Rob Clark wrote:
> From: Rob Clark <robdclark@chromium.org>
>
> The range is actually len+1.
>
> Signed-off-by: Rob Clark <robdclark@chromium.org>
> ---
> drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [Freedreno] [PATCH] drm/msm/a6xx: Fix misleading comment
2023-06-30 16:20 [PATCH] drm/msm/a6xx: Fix misleading comment Rob Clark
2023-07-11 0:02 ` [Freedreno] " Dmitry Baryshkov
@ 2023-07-13 19:40 ` Akhil P Oommen
1 sibling, 0 replies; 3+ messages in thread
From: Akhil P Oommen @ 2023-07-13 19:40 UTC (permalink / raw)
To: Rob Clark; +Cc: dri-devel, Rob Clark, linux-arm-msm, freedreno
On Fri, Jun 30, 2023 at 09:20:43AM -0700, Rob Clark wrote:
>
> From: Rob Clark <robdclark@chromium.org>
>
> The range is actually len+1.
>
> Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
-Akhil
> ---
> drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h
> index eea2e60ce3b7..edf76a4b16bd 100644
> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h
> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h
> @@ -39,8 +39,8 @@ struct a6xx_gpu {
>
> /*
> * Given a register and a count, return a value to program into
> - * REG_CP_PROTECT_REG(n) - this will block both reads and writes for _len
> - * registers starting at _reg.
> + * REG_CP_PROTECT_REG(n) - this will block both reads and writes for
> + * _len + 1 registers starting at _reg.
> */
> #define A6XX_PROTECT_NORDWR(_reg, _len) \
> ((1 << 31) | \
> --
> 2.41.0
>
^ permalink raw reply [flat|nested] 3+ messages in thread
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2023-06-30 16:20 [PATCH] drm/msm/a6xx: Fix misleading comment Rob Clark
2023-07-11 0:02 ` [Freedreno] " Dmitry Baryshkov
2023-07-13 19:40 ` Akhil P Oommen
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