From: Marc Kleine-Budde <mkl@pengutronix.de>
To: Torin Cooper-Bennun <torin@maxiluxsystems.com>
Cc: linux-can@vger.kernel.org, Pankaj Sharma <pankj.sharma@samsung.com>
Subject: Re: [PATCH 1/3] can: m_can: add infrastructure for internal timestamps
Date: Fri, 5 Mar 2021 22:28:33 +0100 [thread overview]
Message-ID: <20210305212833.vzo3zobpwdoyvroa@pengutronix.de> (raw)
In-Reply-To: <20210305172015.1506525-2-torin@maxiluxsystems.com>
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On 05.03.2021 17:20:13, Torin Cooper-Bennun wrote:
> Add infrastucture to allow internal timestamps from the M_CAN to be
> configured and retrieved.
>
> Signed-off-by: Torin Cooper-Bennun <torin@maxiluxsystems.com>
> ---
> drivers/net/can/m_can/m_can.c | 31 +++++++++++++++++++++++++++++++
> 1 file changed, 31 insertions(+)
>
> diff --git a/drivers/net/can/m_can/m_can.c b/drivers/net/can/m_can/m_can.c
> index 0c8d36bc668c..ea79cf0640a8 100644
> --- a/drivers/net/can/m_can/m_can.c
> +++ b/drivers/net/can/m_can/m_can.c
> @@ -148,6 +148,19 @@ enum m_can_reg {
> #define NBTP_NTSEG2_SHIFT 0
> #define NBTP_NTSEG2_MASK (0x7f << NBTP_NTSEG2_SHIFT)
>
> +/* Timestamp Counter Configuration Register (TSCC) */
> +#define TSCC_TCP_SHIFT 16
> +#define TSCC_TCP_MASK (0xf << TSCC_TCP_SHIFT)
> +#define TSCC_TSS_SHIFT 0
> +#define TSCC_TSS_MASK (0x3 << TSCC_TSS_SHIFT)
> +#define TSCC_TSS_DISABLE (0x0 << TSCC_TSS_SHIFT)
> +#define TSCC_TSS_INTERNAL (0x1 << TSCC_TSS_SHIFT)
> +#define TSCC_TSS_EXTERNAL (0x2 << TSCC_TSS_SHIFT)
Even if the driver doesn't make use of GENMASK(), please add new masks
with GENMASK(), there's no need to define the _SHIFT values.
> +
> +/* Timestamp Counter Value Register (TSCV) */
> +#define TSCV_TSC_SHIFT 0
> +#define TSCV_TSC_MASK (0xffff << TSCV_TSC_SHIFT)
> +
> /* Error Counter Register(ECR) */
> #define ECR_RP BIT(15)
> #define ECR_REC_SHIFT 8
> @@ -302,6 +315,8 @@ enum m_can_reg {
> #define RX_BUF_ANMF BIT(31)
> #define RX_BUF_FDF BIT(21)
> #define RX_BUF_BRS BIT(20)
> +#define RX_BUF_RXTS_SHIFT 0
> +#define RX_BUF_RXTS_MASK (0xffff << RX_BUF_RXTS_SHIFT)
>
> /* Tx Buffer Element */
> /* T0 */
> @@ -319,6 +334,8 @@ enum m_can_reg {
> /* E1 */
> #define TX_EVENT_MM_SHIFT TX_BUF_MM_SHIFT
> #define TX_EVENT_MM_MASK (0xff << TX_EVENT_MM_SHIFT)
> +#define TX_EVENT_TXTS_SHIFT 0
> +#define TX_EVENT_TXTS_MASK (0xffff << TX_EVENT_TXTS_SHIFT)
>
> static inline u32 m_can_read(struct m_can_classdev *cdev, enum m_can_reg reg)
> {
> @@ -413,6 +430,20 @@ static inline void m_can_disable_all_interrupts(struct m_can_classdev *cdev)
> m_can_write(cdev, M_CAN_ILE, 0x0);
> }
>
> +/* Retrieve internal timestamp counter from TSCV.TSC, and shift it to 32-bit
> + * width.
> + */
> +static u32 m_can_get_timestamp(struct m_can_classdev *cdev)
> +{
> + u32 tscv;
> + u32 tsc;
> +
> + tscv = m_can_read(cdev, M_CAN_TSCV);
> + tsc = (tscv & TSCV_TSC_MASK) >> TSCV_TSC_SHIFT;
Make use of FIELD_GET here:
tsc = FIELD_GET(TSCV_TSC_MASK, tcsv);
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Embedded Linux | https://www.pengutronix.de |
Vertretung West/Dortmund | Phone: +49-231-2826-924 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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next prev parent reply other threads:[~2021-03-05 21:29 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-05 17:20 [PATCH 0/3] can: m_can: stabilise peripheral m_can RX and TX Torin Cooper-Bennun
2021-03-05 17:20 ` [PATCH 1/3] can: m_can: add infrastructure for internal timestamps Torin Cooper-Bennun
2021-03-05 21:28 ` Marc Kleine-Budde [this message]
2021-03-05 17:20 ` [PATCH 2/3] can: m_can: m_can_chip_config(): enable and configure " Torin Cooper-Bennun
2021-03-05 21:34 ` Marc Kleine-Budde
2021-03-08 9:09 ` Torin Cooper-Bennun
2021-03-05 17:20 ` [PATCH 3/3] can: m_can: fix RX path: use rx-offload to ensure skbs are sent from softirq context Torin Cooper-Bennun
2021-03-05 22:29 ` Marc Kleine-Budde
2021-03-08 9:11 ` Torin Cooper-Bennun
2021-03-08 9:16 ` Marc Kleine-Budde
2021-03-08 10:31 ` Torin Cooper-Bennun
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