From: Claudiu Beznea <claudiu.beznea@microchip.com>
To: <nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>,
<ludovic.desroches@microchip.com>, <linux@armlinux.org.uk>,
<mturquette@baylibre.com>, <sboyd@kernel.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org>,
Claudiu Beznea <claudiu.beznea@microchip.com>
Subject: [PATCH 4/8] ARM: at91: pm: add pmc_version member to at91_pm_data
Date: Mon, 20 Jan 2020 14:10:04 +0200 [thread overview]
Message-ID: <1579522208-19523-5-git-send-email-claudiu.beznea@microchip.com> (raw)
In-Reply-To: <1579522208-19523-1-git-send-email-claudiu.beznea@microchip.com>
This will be used to differentiate b/w different PLLs settings to be
applied in the final/first steps of the suspend/resume process by doing
PLL specific configurations.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
---
arch/arm/mach-at91/pm.c | 7 +++++++
arch/arm/mach-at91/pm.h | 1 +
arch/arm/mach-at91/pm_data-offsets.c | 2 ++
arch/arm/mach-at91/pm_suspend.S | 4 ++++
include/linux/clk/at91_pmc.h | 3 +++
5 files changed, 17 insertions(+)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index ae7b148febd9..074bde64064e 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -737,28 +737,34 @@ static void __init at91_pm_modes_init(void)
struct pmc_info {
unsigned long uhp_udp_mask;
unsigned long mckr;
+ unsigned long version;
};
static const struct pmc_info pmc_infos[] __initconst = {
{
.uhp_udp_mask = AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP,
.mckr = 0x30,
+ .version = AT91_PMC_V1,
},
{
.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP,
.mckr = 0x30,
+ .version = AT91_PMC_V1,
},
{
.uhp_udp_mask = AT91SAM926x_PMC_UHP,
.mckr = 0x30,
+ .version = AT91_PMC_V1,
},
{ .uhp_udp_mask = 0,
.mckr = 0x30,
+ .version = AT91_PMC_V1,
},
{
.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP,
.mckr = 0x28,
+ .version = AT91_PMC_V2,
},
};
@@ -797,6 +803,7 @@ static void __init at91_pm_init(void (*pm_idle)(void))
pmc = of_id->data;
soc_pm.data.uhp_udp_mask = pmc->uhp_udp_mask;
soc_pm.data.pmc_mckr_offset = pmc->mckr;
+ soc_pm.data.pmc_version = pmc->version;
if (pm_idle)
arm_pm_idle = pm_idle;
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
index 6f7f4236865a..218e8d1a30fb 100644
--- a/arch/arm/mach-at91/pm.h
+++ b/arch/arm/mach-at91/pm.h
@@ -34,6 +34,7 @@ struct at91_pm_data {
unsigned int standby_mode;
unsigned int suspend_mode;
unsigned int pmc_mckr_offset;
+ unsigned int pmc_version;
};
#endif
diff --git a/arch/arm/mach-at91/pm_data-offsets.c b/arch/arm/mach-at91/pm_data-offsets.c
index dfcbe626865c..82089ff258c0 100644
--- a/arch/arm/mach-at91/pm_data-offsets.c
+++ b/arch/arm/mach-at91/pm_data-offsets.c
@@ -14,6 +14,8 @@ int main(void)
DEFINE(PM_DATA_SFRBU, offsetof(struct at91_pm_data, sfrbu));
DEFINE(PM_DATA_PMC_MCKR_OFFSET, offsetof(struct at91_pm_data,
pmc_mckr_offset));
+ DEFINE(PM_DATA_PMC_VERSION, offsetof(struct at91_pm_data,
+ pmc_version));
return 0;
}
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
index 64460b4e0fc1..5fa0c2aa10f7 100644
--- a/arch/arm/mach-at91/pm_suspend.S
+++ b/arch/arm/mach-at91/pm_suspend.S
@@ -95,6 +95,8 @@ ENTRY(at91_pm_suspend_in_sram)
str tmp1, .pm_mode
ldr tmp1, [r0, #PM_DATA_PMC_MCKR_OFFSET]
str tmp1, .mckr_offset
+ ldr tmp1, [r0, #PM_DATA_PMC_VERSION]
+ str tmp1, .pmc_version
/* Both ldrne below are here to preload their address in the TLB */
ldr tmp1, [r0, #PM_DATA_SHDWC]
str tmp1, .shdwc
@@ -542,6 +544,8 @@ ENDPROC(at91_sramc_self_refresh)
.word 0
.mckr_offset:
.word 0
+.pmc_version:
+ .word 0
.saved_mckr:
.word 0
.saved_pllar:
diff --git a/include/linux/clk/at91_pmc.h b/include/linux/clk/at91_pmc.h
index 390437887b46..f3d691fc5f29 100644
--- a/include/linux/clk/at91_pmc.h
+++ b/include/linux/clk/at91_pmc.h
@@ -12,6 +12,9 @@
#ifndef AT91_PMC_H
#define AT91_PMC_H
+#define AT91_PMC_V1 (1) /* PMC version 1 */
+#define AT91_PMC_V2 (2) /* PMC version 2 [SAM9X60] */
+
#define AT91_PMC_SCER 0x00 /* System Clock Enable Register */
#define AT91_PMC_SCDR 0x04 /* System Clock Disable Register */
--
2.7.4
next prev parent reply other threads:[~2020-01-20 12:10 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-20 12:10 [PATCH 0/8] PM fixes and improvements for SAM9X60 Claudiu Beznea
2020-01-20 12:10 ` [PATCH 1/8] ARM: at91: pm: use proper master clock register offset Claudiu Beznea
2020-01-20 12:10 ` [PATCH 2/8] Revert "ARM: at91: pm: do not disable/enable PLLA for ULP modes" Claudiu Beznea
2020-01-20 12:10 ` [PATCH 3/8] ARM: at91: pm: add macros for plla disable/enable Claudiu Beznea
2020-01-20 12:10 ` Claudiu Beznea [this message]
2020-02-12 23:30 ` [PATCH 4/8] ARM: at91: pm: add pmc_version member to at91_pm_data Stephen Boyd
2020-01-20 12:10 ` [PATCH 5/8] ARM: at91: pm: s/sfr/sfrbu in pm_suspend.S Claudiu Beznea
2020-01-20 12:10 ` [PATCH 6/8] clk: at91: move sam9x60's PLL register offsets to PMC header Claudiu Beznea
2020-02-12 23:31 ` Stephen Boyd
2020-01-20 12:10 ` [PATCH 7/8] ARM: at91: pm: add plla disable/enable support for sam9x60 Claudiu Beznea
2020-01-20 12:10 ` [PATCH 8/8] ARM: at91: pm: add quirk for sam9x60's ulp1 Claudiu Beznea
2020-02-14 11:04 ` [PATCH 0/8] PM fixes and improvements for SAM9X60 Alexandre Belloni
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