* [PATCH] clk: imx8mp: Set the correct parent for audio_root_clk
@ 2020-04-27 15:11 Abel Vesa
2020-04-28 8:15 ` Aisheng Dong
0 siblings, 1 reply; 5+ messages in thread
From: Abel Vesa @ 2020-04-27 15:11 UTC (permalink / raw)
To: Mike Turquette, Stephen Boyd, Sascha Hauer, Shawn Guo
Cc: linux-clk, linux-arm-kernel, Linux Kernel Mailing List,
NXP Linux Team, Abel Vesa
Instead of ipg_root, the parent needs to be ipg_audio_root.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
drivers/clk/imx/clk-imx8mp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index 41469e2..dcdfc9d 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -727,7 +727,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
hws[IMX8MP_CLK_HDMI_ROOT] = imx_clk_hw_gate4("hdmi_root_clk", "hdmi_axi", ccm_base + 0x45f0, 0);
hws[IMX8MP_CLK_TSENSOR_ROOT] = imx_clk_hw_gate4("tsensor_root_clk", "ipg_root", ccm_base + 0x4620, 0);
hws[IMX8MP_CLK_VPU_ROOT] = imx_clk_hw_gate4("vpu_root_clk", "vpu_bus", ccm_base + 0x4630, 0);
- hws[IMX8MP_CLK_AUDIO_ROOT] = imx_clk_hw_gate4("audio_root_clk", "ipg_root", ccm_base + 0x4650, 0);
+ hws[IMX8MP_CLK_AUDIO_ROOT] = imx_clk_hw_gate4("audio_root_clk", "ipg_audio_root", ccm_base + 0x4650, 0);
hws[IMX8MP_CLK_ARM] = imx_clk_hw_cpu("arm", "arm_a53_core",
hws[IMX8MP_CLK_A53_CORE]->clk,
--
2.7.4
^ permalink raw reply related [flat|nested] 5+ messages in thread* RE: [PATCH] clk: imx8mp: Set the correct parent for audio_root_clk
2020-04-27 15:11 [PATCH] clk: imx8mp: Set the correct parent for audio_root_clk Abel Vesa
@ 2020-04-28 8:15 ` Aisheng Dong
2020-04-30 10:11 ` Abel Vesa
0 siblings, 1 reply; 5+ messages in thread
From: Aisheng Dong @ 2020-04-28 8:15 UTC (permalink / raw)
To: Abel Vesa, Mike Turquette, Stephen Boyd, Sascha Hauer, Shawn Guo
Cc: linux-clk, linux-arm-kernel, Linux Kernel Mailing List,
dl-linux-imx, Abel Vesa
> From: Abel Vesa <abel.vesa@nxp.com>
> Sent: Monday, April 27, 2020 11:11 PM
>
> Instead of ipg_root, the parent needs to be ipg_audio_root.
>
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
I have a few doubts about this patch:
1. From latest RM, it seems CCGR101 (0x4650) is a shared gate for many audio instances.
2. If this patch is about AUDIO_AHB_CLK_ROOT, then it's parent is AHB[POST_PODF] from the clock tree in RM.
Not quite understand why this patch changes to IPG[POST_PODF]. Is this RM incorrect issue?
BTW, if this patch is taken from someone else, we usually better keep the original author if not fundamental changes.
Regards
Aisheng
> ---
> drivers/clk/imx/clk-imx8mp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c index
> 41469e2..dcdfc9d 100644
> --- a/drivers/clk/imx/clk-imx8mp.c
> +++ b/drivers/clk/imx/clk-imx8mp.c
> @@ -727,7 +727,7 @@ static int imx8mp_clocks_probe(struct platform_device
> *pdev)
> hws[IMX8MP_CLK_HDMI_ROOT] = imx_clk_hw_gate4("hdmi_root_clk",
> "hdmi_axi", ccm_base + 0x45f0, 0);
> hws[IMX8MP_CLK_TSENSOR_ROOT] =
> imx_clk_hw_gate4("tsensor_root_clk", "ipg_root", ccm_base + 0x4620, 0);
> hws[IMX8MP_CLK_VPU_ROOT] = imx_clk_hw_gate4("vpu_root_clk",
> "vpu_bus", ccm_base + 0x4630, 0);
> - hws[IMX8MP_CLK_AUDIO_ROOT] = imx_clk_hw_gate4("audio_root_clk",
> "ipg_root", ccm_base + 0x4650, 0);
> + hws[IMX8MP_CLK_AUDIO_ROOT] = imx_clk_hw_gate4("audio_root_clk",
> +"ipg_audio_root", ccm_base + 0x4650, 0);
>
> hws[IMX8MP_CLK_ARM] = imx_clk_hw_cpu("arm", "arm_a53_core",
> hws[IMX8MP_CLK_A53_CORE]->clk,
> --
> 2.7.4
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH] clk: imx8mp: Set the correct parent for audio_root_clk
2020-04-28 8:15 ` Aisheng Dong
@ 2020-04-30 10:11 ` Abel Vesa
2020-04-30 10:18 ` Aisheng Dong
0 siblings, 1 reply; 5+ messages in thread
From: Abel Vesa @ 2020-04-30 10:11 UTC (permalink / raw)
To: Aisheng Dong
Cc: Mike Turquette, Stephen Boyd, Sascha Hauer, Shawn Guo, linux-clk,
linux-arm-kernel, Linux Kernel Mailing List, dl-linux-imx
On 20-04-28 08:15:51, Aisheng Dong wrote:
> > From: Abel Vesa <abel.vesa@nxp.com>
> > Sent: Monday, April 27, 2020 11:11 PM
> >
> > Instead of ipg_root, the parent needs to be ipg_audio_root.
> >
> > Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
>
> I have a few doubts about this patch:
> 1. From latest RM, it seems CCGR101 (0x4650) is a shared gate for many audio instances.
> 2. If this patch is about AUDIO_AHB_CLK_ROOT, then it's parent is AHB[POST_PODF] from the clock tree in RM.
> Not quite understand why this patch changes to IPG[POST_PODF]. Is this RM incorrect issue?
>
> BTW, if this patch is taken from someone else, we usually better keep the original author if not fundamental changes.
>
I made this change at the suggestion from S.j. Wang.
I'm the original author in linux-nxp (internal tree).
> Regards
> Aisheng
>
> > ---
> > drivers/clk/imx/clk-imx8mp.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c index
> > 41469e2..dcdfc9d 100644
> > --- a/drivers/clk/imx/clk-imx8mp.c
> > +++ b/drivers/clk/imx/clk-imx8mp.c
> > @@ -727,7 +727,7 @@ static int imx8mp_clocks_probe(struct platform_device
> > *pdev)
> > hws[IMX8MP_CLK_HDMI_ROOT] = imx_clk_hw_gate4("hdmi_root_clk",
> > "hdmi_axi", ccm_base + 0x45f0, 0);
> > hws[IMX8MP_CLK_TSENSOR_ROOT] =
> > imx_clk_hw_gate4("tsensor_root_clk", "ipg_root", ccm_base + 0x4620, 0);
> > hws[IMX8MP_CLK_VPU_ROOT] = imx_clk_hw_gate4("vpu_root_clk",
> > "vpu_bus", ccm_base + 0x4630, 0);
> > - hws[IMX8MP_CLK_AUDIO_ROOT] = imx_clk_hw_gate4("audio_root_clk",
> > "ipg_root", ccm_base + 0x4650, 0);
> > + hws[IMX8MP_CLK_AUDIO_ROOT] = imx_clk_hw_gate4("audio_root_clk",
> > +"ipg_audio_root", ccm_base + 0x4650, 0);
> >
> > hws[IMX8MP_CLK_ARM] = imx_clk_hw_cpu("arm", "arm_a53_core",
> > hws[IMX8MP_CLK_A53_CORE]->clk,
> > --
> > 2.7.4
>
^ permalink raw reply [flat|nested] 5+ messages in thread* RE: [PATCH] clk: imx8mp: Set the correct parent for audio_root_clk
2020-04-30 10:11 ` Abel Vesa
@ 2020-04-30 10:18 ` Aisheng Dong
2020-05-22 9:12 ` Abel Vesa
0 siblings, 1 reply; 5+ messages in thread
From: Aisheng Dong @ 2020-04-30 10:18 UTC (permalink / raw)
To: Abel Vesa
Cc: Mike Turquette, Stephen Boyd, Sascha Hauer, Shawn Guo, linux-clk,
linux-arm-kernel, Linux Kernel Mailing List, dl-linux-imx
> From: Abel Vesa <abel.vesa@nxp.com>
> Sent: Thursday, April 30, 2020 6:11 PM
>
> On 20-04-28 08:15:51, Aisheng Dong wrote:
> > > From: Abel Vesa <abel.vesa@nxp.com>
> > > Sent: Monday, April 27, 2020 11:11 PM
> > >
> > > Instead of ipg_root, the parent needs to be ipg_audio_root.
> > >
> > > Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> >
> > I have a few doubts about this patch:
> > 1. From latest RM, it seems CCGR101 (0x4650) is a shared gate for many audio
> instances.
> > 2. If this patch is about AUDIO_AHB_CLK_ROOT, then it's parent is
> AHB[POST_PODF] from the clock tree in RM.
> > Not quite understand why this patch changes to IPG[POST_PODF]. Is this RM
> incorrect issue?
> >
> > BTW, if this patch is taken from someone else, we usually better keep the
> original author if not fundamental changes.
> >
>
> I made this change at the suggestion from S.j. Wang.
> I'm the original author in linux-nxp (internal tree).
>
That's fine. Then please ignore my "stupid" reminder. 😊
BTW, how about other questions?
Regards
Aisheng
> > Regards
> > Aisheng
> >
> > > ---
> > > drivers/clk/imx/clk-imx8mp.c | 2 +-
> > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/clk/imx/clk-imx8mp.c
> > > b/drivers/clk/imx/clk-imx8mp.c index 41469e2..dcdfc9d 100644
> > > --- a/drivers/clk/imx/clk-imx8mp.c
> > > +++ b/drivers/clk/imx/clk-imx8mp.c
> > > @@ -727,7 +727,7 @@ static int imx8mp_clocks_probe(struct
> > > platform_device
> > > *pdev)
> > > hws[IMX8MP_CLK_HDMI_ROOT] =
> imx_clk_hw_gate4("hdmi_root_clk",
> > > "hdmi_axi", ccm_base + 0x45f0, 0);
> > > hws[IMX8MP_CLK_TSENSOR_ROOT] =
> > > imx_clk_hw_gate4("tsensor_root_clk", "ipg_root", ccm_base + 0x4620, 0);
> > > hws[IMX8MP_CLK_VPU_ROOT] = imx_clk_hw_gate4("vpu_root_clk",
> > > "vpu_bus", ccm_base + 0x4630, 0);
> > > - hws[IMX8MP_CLK_AUDIO_ROOT] = imx_clk_hw_gate4("audio_root_clk",
> > > "ipg_root", ccm_base + 0x4650, 0);
> > > + hws[IMX8MP_CLK_AUDIO_ROOT] = imx_clk_hw_gate4("audio_root_clk",
> > > +"ipg_audio_root", ccm_base + 0x4650, 0);
> > >
> > > hws[IMX8MP_CLK_ARM] = imx_clk_hw_cpu("arm", "arm_a53_core",
> > > hws[IMX8MP_CLK_A53_CORE]->clk,
> > > --
> > > 2.7.4
> >
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH] clk: imx8mp: Set the correct parent for audio_root_clk
2020-04-30 10:18 ` Aisheng Dong
@ 2020-05-22 9:12 ` Abel Vesa
0 siblings, 0 replies; 5+ messages in thread
From: Abel Vesa @ 2020-05-22 9:12 UTC (permalink / raw)
To: Aisheng Dong
Cc: Mike Turquette, Stephen Boyd, Sascha Hauer, Shawn Guo, linux-clk,
linux-arm-kernel, Linux Kernel Mailing List, dl-linux-imx
On 20-04-30 10:18:24, Aisheng Dong wrote:
> > From: Abel Vesa <abel.vesa@nxp.com>
> > Sent: Thursday, April 30, 2020 6:11 PM
> >
Sorry I didn't answer the other ones earlier. See below.
> > On 20-04-28 08:15:51, Aisheng Dong wrote:
> > > > From: Abel Vesa <abel.vesa@nxp.com>
> > > > Sent: Monday, April 27, 2020 11:11 PM
> > > >
> > > > Instead of ipg_root, the parent needs to be ipg_audio_root.
> > > >
> > > > Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> > >
> > > I have a few doubts about this patch:
> > > 1. From latest RM, it seems CCGR101 (0x4650) is a shared gate for many audio
> > instances.
Yes. This is true. I'm working on adding the shared gate now.
> > > 2. If this patch is about AUDIO_AHB_CLK_ROOT, then it's parent is
> > AHB[POST_PODF] from the clock tree in RM.
> > > Not quite understand why this patch changes to IPG[POST_PODF]. Is this RM
> > incorrect issue?
Yes. Right again. It needs to be the IMX8MP_CLK_AUDIO_AHB. Will change that now.
> > >
> > > BTW, if this patch is taken from someone else, we usually better keep the
> > original author if not fundamental changes.
> > >
> >
> > I made this change at the suggestion from S.j. Wang.
> > I'm the original author in linux-nxp (internal tree).
> >
>
> That's fine. Then please ignore my "stupid" reminder. 😊
> BTW, how about other questions?
>
> Regards
> Aisheng
>
> > > Regards
> > > Aisheng
> > >
> > > > ---
> > > > drivers/clk/imx/clk-imx8mp.c | 2 +-
> > > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > > >
> > > > diff --git a/drivers/clk/imx/clk-imx8mp.c
> > > > b/drivers/clk/imx/clk-imx8mp.c index 41469e2..dcdfc9d 100644
> > > > --- a/drivers/clk/imx/clk-imx8mp.c
> > > > +++ b/drivers/clk/imx/clk-imx8mp.c
> > > > @@ -727,7 +727,7 @@ static int imx8mp_clocks_probe(struct
> > > > platform_device
> > > > *pdev)
> > > > hws[IMX8MP_CLK_HDMI_ROOT] =
> > imx_clk_hw_gate4("hdmi_root_clk",
> > > > "hdmi_axi", ccm_base + 0x45f0, 0);
> > > > hws[IMX8MP_CLK_TSENSOR_ROOT] =
> > > > imx_clk_hw_gate4("tsensor_root_clk", "ipg_root", ccm_base + 0x4620, 0);
> > > > hws[IMX8MP_CLK_VPU_ROOT] = imx_clk_hw_gate4("vpu_root_clk",
> > > > "vpu_bus", ccm_base + 0x4630, 0);
> > > > - hws[IMX8MP_CLK_AUDIO_ROOT] = imx_clk_hw_gate4("audio_root_clk",
> > > > "ipg_root", ccm_base + 0x4650, 0);
> > > > + hws[IMX8MP_CLK_AUDIO_ROOT] = imx_clk_hw_gate4("audio_root_clk",
> > > > +"ipg_audio_root", ccm_base + 0x4650, 0);
> > > >
> > > > hws[IMX8MP_CLK_ARM] = imx_clk_hw_cpu("arm", "arm_a53_core",
> > > > hws[IMX8MP_CLK_A53_CORE]->clk,
> > > > --
> > > > 2.7.4
> > >
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2020-05-22 9:12 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
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2020-04-27 15:11 [PATCH] clk: imx8mp: Set the correct parent for audio_root_clk Abel Vesa
2020-04-28 8:15 ` Aisheng Dong
2020-04-30 10:11 ` Abel Vesa
2020-04-30 10:18 ` Aisheng Dong
2020-05-22 9:12 ` Abel Vesa
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