From: wangyan wang <wangyan.wang@mediatek.com>
To: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, CK Hu <ck.hu@mediatek.com>
Cc: wangyan wang <wangyan.wang@mediatek.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
chunhui dai <chunhui.dai@mediatek.com>,
Colin Ian King <colin.king@canonical.com>,
Sean Wang <sean.wang@mediatek.com>,
Ryder Lee <ryder.lee@mediatek.com>, <linux-clk@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<dri-devel@lists.freedesktop.org>, <srv_heupstream@mediatek.com>
Subject: [PATCH V5 7/8] drm/mediatek: using new factor for tvdpll in MT2701
Date: Wed, 20 Feb 2019 10:53:56 +0800 [thread overview]
Message-ID: <20190220025357.7354-8-wangyan.wang@mediatek.com> (raw)
In-Reply-To: <20190220025357.7354-1-wangyan.wang@mediatek.com>
From: chunhui dai <chunhui.dai@mediatek.com>
The factor depends on the divider of DPI in MT2701, therefore,
we should fix this factor to the right and new one.
Signed-off-by: chunhui dai <chunhui.dai@mediatek.com>
Signed-off-by: wangyan wang <wangyan.wang@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_dpi.c | 8 +++-----
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
index 69c6e42dad6b..4a2f4a650494 100644
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
@@ -662,13 +662,11 @@ static unsigned int mt8173_calculate_factor(int clock)
static unsigned int mt2701_calculate_factor(int clock)
{
if (clock <= 64000)
- return 16;
- else if (clock <= 128000)
- return 8;
- else if (clock <= 256000)
return 4;
- else
+ else if (clock <= 128000)
return 2;
+ else
+ return 1;
}
static const struct mtk_dpi_conf mt8173_conf = {
--
2.14.1
next prev parent reply other threads:[~2019-02-20 2:54 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-20 2:53 [PATCH V5 0/8] make mt7623 clock of hdmi stable wangyan wang
2019-02-20 2:53 ` [PATCH v5 1/8] drm/mediatek: recalculate hdmi phy clock of MT2701 by querying hardware wangyan wang
2019-02-20 2:53 ` [PATCH V5 2/8] drm/mediatek: move the setting of fixed divider wangyan wang
2019-02-20 2:53 ` [PATCH V5 3/8] drm/mediatek: using different flags of clk for HDMI phy wangyan wang
2019-02-20 2:53 ` [PATCH V5 4/8] drm/mediatek: fix the rate and divder of hdmi phy for MT2701 wangyan wang
2019-02-20 2:53 ` [PATCH V5 5/8] clk: mediatek: add MUX_GATE_FLAGS_2 wangyan wang
2019-02-20 19:37 ` Stephen Boyd
2019-02-21 2:34 ` mtk14994
2019-02-22 7:55 ` Stephen Boyd
2019-02-20 2:53 ` [PATCH V5 6/8] clk: mediatek: using CLK_MUX_ROUND_CLOSEST for the clock of dpi1_sel wangyan wang
2019-02-20 2:53 ` wangyan wang [this message]
2019-02-20 2:53 ` [PATCH V5 8/8] drm/mediatek: fix the rate of parent for hdmi phy in MT2701 wangyan wang
2019-02-20 3:07 ` [PATCH V5 0/8] make mt7623 clock of hdmi stable Ryder Lee
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