* [clk:clk-parent-rewrite 32/32] drivers/clk/microchip/clk-core.c:293:3: warning: this 'if' clause does not guard...
@ 2019-03-21 2:05 kbuild test robot
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From: kbuild test robot @ 2019-03-21 2:05 UTC (permalink / raw)
To: Stephen Boyd; +Cc: kbuild-all, linux-clk, linux-arm-kernel
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tree: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-parent-rewrite
head: 6a6d2ba76f95f9e4f7afea765841f40eb33d55d4
commit: 6a6d2ba76f95f9e4f7afea765841f40eb33d55d4 [32/32] stash megadiff!
config: mips-pic32mzda_defconfig (attached as .config)
compiler: mipsel-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout 6a6d2ba76f95f9e4f7afea765841f40eb33d55d4
# save the attached .config to linux build tree
GCC_VERSION=7.2.0 make.cross ARCH=mips
All warnings (new ones prefixed by >>):
drivers/clk/microchip/clk-core.c: In function 'roclk_get_parent':
>> drivers/clk/microchip/clk-core.c:293:3: warning: this 'if' clause does not guard... [-Wmisleading-indentation]
if (refo->parent_map[i] == v)
^~
drivers/clk/microchip/clk-core.c:294:45: note: ...this statement, but the latter is misleadingly indented as if it were guarded by the 'if'
return clk_hw_get_parent_by_index(hw, i);return clk_hw_get_parent_by_index(hw,
^~~~~~
drivers/clk/microchip/clk-core.c: In function 'roclk_set_rate':
>> drivers/clk/microchip/clk-core.c:544:13: warning: initialization makes integer from pointer without a cast [-Wint-conversion]
u8 index = roclk_get_parent(hw);
^~~~~~~~~~~~~~~~
drivers/clk/microchip/clk-core.c: In function 'sclk_get_parent':
drivers/clk/microchip/clk-core.c:834:3: warning: this 'if' clause does not guard... [-Wmisleading-indentation]
if (sclk->parent_map[i] == v)
^~
drivers/clk/microchip/clk-core.c:835:45: note: ...this statement, but the latter is misleadingly indented as if it were guarded by the 'if'
return clk_hw_get_parent_by_index(hw, i);return clk_hw_get_parent_by_index(hw,
^~~~~~
vim +/if +293 drivers/clk/microchip/clk-core.c
ce6e1188 Purna Chandra Mandal 2016-05-13 281
6a6d2ba7 Stephen Boyd 2019-02-28 282 static struct clk_hw *roclk_get_parent(struct clk_hw *hw)
ce6e1188 Purna Chandra Mandal 2016-05-13 283 {
ce6e1188 Purna Chandra Mandal 2016-05-13 284 struct pic32_ref_osc *refo = clkhw_to_refosc(hw);
ce6e1188 Purna Chandra Mandal 2016-05-13 285 u32 v, i;
ce6e1188 Purna Chandra Mandal 2016-05-13 286
ce6e1188 Purna Chandra Mandal 2016-05-13 287 v = (readl(refo->ctrl_reg) >> REFO_SEL_SHIFT) & REFO_SEL_MASK;
ce6e1188 Purna Chandra Mandal 2016-05-13 288
ce6e1188 Purna Chandra Mandal 2016-05-13 289 if (!refo->parent_map)
6a6d2ba7 Stephen Boyd 2019-02-28 290 return clk_hw_get_parent_by_index(hw, v);
ce6e1188 Purna Chandra Mandal 2016-05-13 291
ce6e1188 Purna Chandra Mandal 2016-05-13 292 for (i = 0; i < clk_hw_get_num_parents(hw); i++)
ce6e1188 Purna Chandra Mandal 2016-05-13 @293 if (refo->parent_map[i] == v)
6a6d2ba7 Stephen Boyd 2019-02-28 294 return clk_hw_get_parent_by_index(hw, i);return clk_hw_get_parent_by_index(hw,
6a6d2ba7 Stephen Boyd 2019-02-28 295 -EINVAL);
ce6e1188 Purna Chandra Mandal 2016-05-13 296 }
ce6e1188 Purna Chandra Mandal 2016-05-13 297
:::::: The code at line 293 was first introduced by commit
:::::: ce6e1188465998820e7182455261b1f5d508ca17 CLK: microchip: Add Microchip PIC32 clock driver.
:::::: TO: Purna Chandra Mandal <purna.mandal@microchip.com>
:::::: CC: Ralf Baechle <ralf@linux-mips.org>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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