From: Stephen Boyd <sboyd@kernel.org>
To: Alexander Dahl <ada@thorsis.com>,
Michael Turquette <mturquette@baylibre.com>,
Rob Herring <robh+dt@kernel.org>
Cc: <u.kleine-koenig@pengutronix.de>,
kernel@pengutronix.de, linux-clk@vger.kernel.org,
<devicetree@vger.kernel.org>
Subject: Re: [PATCH v2] dt-bindings: clk: Make example a bit clearer
Date: Wed, 11 Sep 2019 09:06:47 -0700 [thread overview]
Message-ID: <20190911160648.6F88D2075C@mail.kernel.org> (raw)
In-Reply-To: <20190823100315.2148-1-ada@thorsis.com>
Quoting Alexander Dahl (2019-08-23 03:03:15)
> Signed-off-by: Alexander Dahl <ada@thorsis.com>
> ---
You need to Cc Rob and devicetree list on binding changes.
>
> Notes:
> v2:
> Add additional explaining text to following paragraph and strip mail
> headers from commit message.
>
> .../devicetree/bindings/clock/clock-bindings.txt | 12 +++++++-----
> 1 file changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/clock/clock-bindings.txt b/Documentation/devicetree/bindings/clock/clock-bindings.txt
> index b646bbcf7f92..1d4942380918 100644
> --- a/Documentation/devicetree/bindings/clock/clock-bindings.txt
> +++ b/Documentation/devicetree/bindings/clock/clock-bindings.txt
> @@ -150,16 +150,18 @@ set to 0, or can be omitted if it is not followed by any non-zero entry.
> compatible = "fsl,imx-uart";
> reg = <0xa000 0x1000>;
> ...
> - clocks = <&osc 0>, <&pll 1>;
> - clock-names = "baud", "register";
> + clocks = ...
> + clock-names = ...
I don't see the need for this change.
>
> assigned-clocks = <&clkcon 0>, <&pll 2>;
> - assigned-clock-parents = <&pll 2>;
> + assigned-clock-parents = <&pll 1>;
> assigned-clock-rates = <0>, <460800>;
> };
>
> -In this example the <&pll 2> clock is set as parent of clock <&clkcon 0> and
> -the <&pll 2> clock is assigned a frequency value of 460800 Hz.
> +In this example the <&pll 1> clock is set as parent of clock <&clkcon 0> and
> +the <&pll 2> clock is assigned a frequency value of 460800 Hz. A parent
> +setting for <&pll 2> is omitted (end of list) and rate setting for <&clkcon 0>
> +is skipped because set to <0>.
Maybe you can comment that the "clocks" and "clock-names" properties
don't matter for assigned clk rates and parents.
next prev parent reply other threads:[~2019-09-11 16:06 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-23 10:03 [PATCH v2] dt-bindings: clk: Make example a bit clearer Alexander Dahl
2019-09-11 16:06 ` Stephen Boyd [this message]
2019-09-11 17:49 ` Uwe Kleine-König
2019-09-16 20:13 ` Stephen Boyd
2019-10-10 14:16 ` Alexander Dahl
2019-11-08 22:18 ` Stephen Boyd
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