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* [PATCH v2 0/5] Clock changes to support cpufreq on QCS404 
@ 2019-09-12 14:15 Jorge Ramirez-Ortiz
  2019-09-12 14:15 ` [PATCH v2 1/5] clk: qcom: gcc: limit GPLL0_AO_OUT operating frequency Jorge Ramirez-Ortiz
                   ` (4 more replies)
  0 siblings, 5 replies; 7+ messages in thread
From: Jorge Ramirez-Ortiz @ 2019-09-12 14:15 UTC (permalink / raw)
  To: jorge.ramirez-ortiz, sboyd, agross, mturquette, bjorn.andersson
  Cc: niklas.cassel, linux-arm-msm, linux-clk, linux-kernel

The following clock changes are required to enable cpufreq support on
the QCS404

v2: sboyd review of v1
    -------------------
    missing cover letter
    reorder the patchset
    use clk_parent data to speficy the parent clock
    dong ignore the clock position abi

Jorge Ramirez-Ortiz (5):
  clk: qcom: gcc: limit GPLL0_AO_OUT operating frequency
  clk: qcom: hfpll: register as clock provider
  clk: qcom: hfpll: CLK_IGNORE_UNUSED
  clk: qcom: hfpll: use clk_parent_data to specify the parent
  clk: qcom: apcs-msm8916: get parent clock names from DT

 drivers/clk/qcom/apcs-msm8916.c  | 15 ++++++++++++---
 drivers/clk/qcom/clk-alpha-pll.c |  8 ++++++++
 drivers/clk/qcom/clk-alpha-pll.h |  1 +
 drivers/clk/qcom/gcc-qcs404.c    |  2 +-
 drivers/clk/qcom/hfpll.c         | 21 +++++++++++++++++++--
 5 files changed, 41 insertions(+), 6 deletions(-)

-- 
2.23.0


^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH v2 1/5] clk: qcom: gcc: limit GPLL0_AO_OUT operating frequency
  2019-09-12 14:15 [PATCH v2 0/5] Clock changes to support cpufreq on QCS404 Jorge Ramirez-Ortiz
@ 2019-09-12 14:15 ` Jorge Ramirez-Ortiz
  2019-09-12 14:15 ` [PATCH v2 2/5] clk: qcom: hfpll: register as clock provider Jorge Ramirez-Ortiz
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 7+ messages in thread
From: Jorge Ramirez-Ortiz @ 2019-09-12 14:15 UTC (permalink / raw)
  To: jorge.ramirez-ortiz, sboyd, agross, mturquette, bjorn.andersson
  Cc: niklas.cassel, linux-arm-msm, linux-clk, linux-kernel

Limit the GPLL0_AO_OUT_MAIN operating frequency as per its hardware
specifications.

Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
---
 drivers/clk/qcom/clk-alpha-pll.c | 8 ++++++++
 drivers/clk/qcom/clk-alpha-pll.h | 1 +
 drivers/clk/qcom/gcc-qcs404.c    | 2 +-
 3 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
index 0ced4a5a9a17..ef51f302bdf0 100644
--- a/drivers/clk/qcom/clk-alpha-pll.c
+++ b/drivers/clk/qcom/clk-alpha-pll.c
@@ -730,6 +730,14 @@ static long alpha_pll_huayra_round_rate(struct clk_hw *hw, unsigned long rate,
 	return alpha_huayra_pll_round_rate(rate, *prate, &l, &a);
 }
 
+const struct clk_ops clk_alpha_pll_fixed_ops = {
+	.enable = clk_alpha_pll_enable,
+	.disable = clk_alpha_pll_disable,
+	.is_enabled = clk_alpha_pll_is_enabled,
+	.recalc_rate = clk_alpha_pll_recalc_rate,
+};
+EXPORT_SYMBOL_GPL(clk_alpha_pll_fixed_ops);
+
 const struct clk_ops clk_alpha_pll_ops = {
 	.enable = clk_alpha_pll_enable,
 	.disable = clk_alpha_pll_disable,
diff --git a/drivers/clk/qcom/clk-alpha-pll.h b/drivers/clk/qcom/clk-alpha-pll.h
index 66755f0f84fc..6b4eb74706b4 100644
--- a/drivers/clk/qcom/clk-alpha-pll.h
+++ b/drivers/clk/qcom/clk-alpha-pll.h
@@ -104,6 +104,7 @@ struct alpha_pll_config {
 };
 
 extern const struct clk_ops clk_alpha_pll_ops;
+extern const struct clk_ops clk_alpha_pll_fixed_ops;
 extern const struct clk_ops clk_alpha_pll_hwfsm_ops;
 extern const struct clk_ops clk_alpha_pll_postdiv_ops;
 extern const struct clk_ops clk_alpha_pll_huayra_ops;
diff --git a/drivers/clk/qcom/gcc-qcs404.c b/drivers/clk/qcom/gcc-qcs404.c
index 29cf464dd2c8..18c6563889f3 100644
--- a/drivers/clk/qcom/gcc-qcs404.c
+++ b/drivers/clk/qcom/gcc-qcs404.c
@@ -330,7 +330,7 @@ static struct clk_alpha_pll gpll0_ao_out_main = {
 			.parent_names = (const char *[]){ "cxo" },
 			.num_parents = 1,
 			.flags = CLK_IS_CRITICAL,
-			.ops = &clk_alpha_pll_ops,
+			.ops = &clk_alpha_pll_fixed_ops,
 		},
 	},
 };
-- 
2.23.0


^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH v2 2/5] clk: qcom: hfpll: register as clock provider
  2019-09-12 14:15 [PATCH v2 0/5] Clock changes to support cpufreq on QCS404 Jorge Ramirez-Ortiz
  2019-09-12 14:15 ` [PATCH v2 1/5] clk: qcom: gcc: limit GPLL0_AO_OUT operating frequency Jorge Ramirez-Ortiz
@ 2019-09-12 14:15 ` Jorge Ramirez-Ortiz
  2019-09-12 14:15 ` [PATCH v2 3/5] clk: qcom: hfpll: CLK_IGNORE_UNUSED Jorge Ramirez-Ortiz
                   ` (2 subsequent siblings)
  4 siblings, 0 replies; 7+ messages in thread
From: Jorge Ramirez-Ortiz @ 2019-09-12 14:15 UTC (permalink / raw)
  To: jorge.ramirez-ortiz, sboyd, agross, mturquette, bjorn.andersson
  Cc: niklas.cassel, linux-arm-msm, linux-clk, linux-kernel

Make the output of the high frequency pll a clock provider.
On the QCS404 this PLL controls cpu frequency scaling.

Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
---
 drivers/clk/qcom/hfpll.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/qcom/hfpll.c b/drivers/clk/qcom/hfpll.c
index a6de7101430c..e64c0fd82fe4 100644
--- a/drivers/clk/qcom/hfpll.c
+++ b/drivers/clk/qcom/hfpll.c
@@ -57,6 +57,7 @@ static int qcom_hfpll_probe(struct platform_device *pdev)
 		.num_parents = 1,
 		.ops = &clk_ops_hfpll,
 	};
+	int ret;
 
 	h = devm_kzalloc(dev, sizeof(*h), GFP_KERNEL);
 	if (!h)
@@ -79,7 +80,14 @@ static int qcom_hfpll_probe(struct platform_device *pdev)
 	h->clkr.hw.init = &init;
 	spin_lock_init(&h->lock);
 
-	return devm_clk_register_regmap(&pdev->dev, &h->clkr);
+	ret = devm_clk_register_regmap(dev, &h->clkr);
+	if (ret) {
+		dev_err(dev, "failed to register regmap clock: %d\n", ret);
+		return ret;
+	}
+
+	return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
+					   &h->clkr.hw);
 }
 
 static struct platform_driver qcom_hfpll_driver = {
-- 
2.23.0


^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH v2 3/5] clk: qcom: hfpll: CLK_IGNORE_UNUSED
  2019-09-12 14:15 [PATCH v2 0/5] Clock changes to support cpufreq on QCS404 Jorge Ramirez-Ortiz
  2019-09-12 14:15 ` [PATCH v2 1/5] clk: qcom: gcc: limit GPLL0_AO_OUT operating frequency Jorge Ramirez-Ortiz
  2019-09-12 14:15 ` [PATCH v2 2/5] clk: qcom: hfpll: register as clock provider Jorge Ramirez-Ortiz
@ 2019-09-12 14:15 ` Jorge Ramirez-Ortiz
  2019-09-12 14:15 ` [PATCH v2 4/5] clk: qcom: hfpll: use clk_parent_data to specify the parent Jorge Ramirez-Ortiz
  2019-09-12 14:15 ` [PATCH v2 5/5] clk: qcom: apcs-msm8916: get parent clock names from DT Jorge Ramirez-Ortiz
  4 siblings, 0 replies; 7+ messages in thread
From: Jorge Ramirez-Ortiz @ 2019-09-12 14:15 UTC (permalink / raw)
  To: jorge.ramirez-ortiz, sboyd, agross, mturquette, bjorn.andersson
  Cc: niklas.cassel, linux-arm-msm, linux-clk, linux-kernel

When COMMON_CLK_DISABLED_UNUSED is set, in an effort to save power and
to keep the software model of the clock in line with reality, the
framework transverses the clock tree and disables those clocks that
were enabled by the firmware but have not been enabled by any device
driver.

If CPUFREQ is enabled, early during the system boot, it might attempt
to change the CPU frequency ("set_rate"). If the HFPLL is selected as
a provider, it will then change the rate for this clock.

As boot continues, clk_disable_unused_subtree will run. Since it wont
find a valid counter (enable_count) for a clock that is actually
enabled it will attempt to disable it which will cause the CPU to
stop. Notice that in this driver, calls to check whether the clock is
enabled are routed via the is_enabled callback which queries the
hardware.

The following commit, rather than marking the clock critical and
forcing the clock to be always enabled, addresses the above scenario
making sure the clock is not disabled but it continues to rely on the
firmware to enable the clock.

Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
 drivers/clk/qcom/hfpll.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/clk/qcom/hfpll.c b/drivers/clk/qcom/hfpll.c
index e64c0fd82fe4..225c675f6779 100644
--- a/drivers/clk/qcom/hfpll.c
+++ b/drivers/clk/qcom/hfpll.c
@@ -56,6 +56,13 @@ static int qcom_hfpll_probe(struct platform_device *pdev)
 		.parent_names = (const char *[]){ "xo" },
 		.num_parents = 1,
 		.ops = &clk_ops_hfpll,
+		/*
+		 * rather than marking the clock critical and forcing the clock
+		 * to be always enabled, we make sure that the clock is not
+		 * disabled: the firmware remains responsible of enabling this
+		 * clock (for more info check the commit log)
+		 */
+		.flags = CLK_IGNORE_UNUSED,
 	};
 	int ret;
 
-- 
2.23.0


^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH v2 4/5] clk: qcom: hfpll: use clk_parent_data to specify the parent
  2019-09-12 14:15 [PATCH v2 0/5] Clock changes to support cpufreq on QCS404 Jorge Ramirez-Ortiz
                   ` (2 preceding siblings ...)
  2019-09-12 14:15 ` [PATCH v2 3/5] clk: qcom: hfpll: CLK_IGNORE_UNUSED Jorge Ramirez-Ortiz
@ 2019-09-12 14:15 ` Jorge Ramirez-Ortiz
  2019-09-12 14:15 ` [PATCH v2 5/5] clk: qcom: apcs-msm8916: get parent clock names from DT Jorge Ramirez-Ortiz
  4 siblings, 0 replies; 7+ messages in thread
From: Jorge Ramirez-Ortiz @ 2019-09-12 14:15 UTC (permalink / raw)
  To: jorge.ramirez-ortiz, sboyd, agross, mturquette, bjorn.andersson
  Cc: niklas.cassel, linux-arm-msm, linux-clk, linux-kernel

Extend support to platorms using different parents.

Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
---
 drivers/clk/qcom/hfpll.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/qcom/hfpll.c b/drivers/clk/qcom/hfpll.c
index 225c675f6779..5ff7f5a60620 100644
--- a/drivers/clk/qcom/hfpll.c
+++ b/drivers/clk/qcom/hfpll.c
@@ -53,7 +53,6 @@ static int qcom_hfpll_probe(struct platform_device *pdev)
 	struct regmap *regmap;
 	struct clk_hfpll *h;
 	struct clk_init_data init = {
-		.parent_names = (const char *[]){ "xo" },
 		.num_parents = 1,
 		.ops = &clk_ops_hfpll,
 		/*
@@ -65,6 +64,7 @@ static int qcom_hfpll_probe(struct platform_device *pdev)
 		.flags = CLK_IGNORE_UNUSED,
 	};
 	int ret;
+	struct clk_parent_data pdata = { .index = 0 };
 
 	h = devm_kzalloc(dev, sizeof(*h), GFP_KERNEL);
 	if (!h)
@@ -83,6 +83,8 @@ static int qcom_hfpll_probe(struct platform_device *pdev)
 					  0, &init.name))
 		return -ENODEV;
 
+	init.parent_data = &pdata;
+
 	h->d = &hdata;
 	h->clkr.hw.init = &init;
 	spin_lock_init(&h->lock);
-- 
2.23.0


^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH v2 5/5] clk: qcom: apcs-msm8916: get parent clock names from DT
  2019-09-12 14:15 [PATCH v2 0/5] Clock changes to support cpufreq on QCS404 Jorge Ramirez-Ortiz
                   ` (3 preceding siblings ...)
  2019-09-12 14:15 ` [PATCH v2 4/5] clk: qcom: hfpll: use clk_parent_data to specify the parent Jorge Ramirez-Ortiz
@ 2019-09-12 14:15 ` Jorge Ramirez-Ortiz
  2019-11-07 22:19   ` Stephen Boyd
  4 siblings, 1 reply; 7+ messages in thread
From: Jorge Ramirez-Ortiz @ 2019-09-12 14:15 UTC (permalink / raw)
  To: jorge.ramirez-ortiz, sboyd, agross, mturquette, bjorn.andersson
  Cc: niklas.cassel, linux-arm-msm, linux-clk, linux-kernel

Allow accessing the parent clock names required for the driver
operation by using the device tree node.

This permits extending the driver to other platforms without having to
modify its source code.

For backwards compatibility leave previous values as default.

Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
 drivers/clk/qcom/apcs-msm8916.c | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/qcom/apcs-msm8916.c b/drivers/clk/qcom/apcs-msm8916.c
index a6c89a310b18..099b028dbc20 100644
--- a/drivers/clk/qcom/apcs-msm8916.c
+++ b/drivers/clk/qcom/apcs-msm8916.c
@@ -19,7 +19,7 @@
 
 static const u32 gpll0_a53cc_map[] = { 4, 5 };
 
-static const char * const gpll0_a53cc[] = {
+static const char *gpll0_a53cc[] = {
 	"gpll0_vote",
 	"a53pll",
 };
@@ -50,6 +50,7 @@ static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev)
 	struct regmap *regmap;
 	struct clk_init_data init = { };
 	int ret = -ENODEV;
+	const char *parents[2];
 
 	regmap = dev_get_regmap(parent, NULL);
 	if (!regmap) {
@@ -61,6 +62,9 @@ static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev)
 	if (!a53cc)
 		return -ENOMEM;
 
+	if (of_clk_parent_fill(parent->of_node, parents, 2) == 2)
+		memcpy(gpll0_a53cc, parents, sizeof(parents));
+
 	init.name = "a53mux";
 	init.parent_names = gpll0_a53cc;
 	init.num_parents = ARRAY_SIZE(gpll0_a53cc);
@@ -76,10 +80,11 @@ static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev)
 	a53cc->src_shift = 8;
 	a53cc->parent_map = gpll0_a53cc_map;
 
-	a53cc->pclk = devm_clk_get(parent, NULL);
+	a53cc->pclk = of_clk_get(parent->of_node, 0);
 	if (IS_ERR(a53cc->pclk)) {
 		ret = PTR_ERR(a53cc->pclk);
-		dev_err(dev, "failed to get clk: %d\n", ret);
+		if (ret != -EPROBE_DEFER)
+			dev_err(dev, "failed to get clk: %d\n", ret);
 		return ret;
 	}
 
@@ -87,6 +92,7 @@ static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev)
 	ret = clk_notifier_register(a53cc->pclk, &a53cc->clk_nb);
 	if (ret) {
 		dev_err(dev, "failed to register clock notifier: %d\n", ret);
+		clk_put(a53cc->pclk);
 		return ret;
 	}
 
@@ -109,6 +115,8 @@ static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev)
 
 err:
 	clk_notifier_unregister(a53cc->pclk, &a53cc->clk_nb);
+	clk_put(a53cc->pclk);
+
 	return ret;
 }
 
@@ -117,6 +125,7 @@ static int qcom_apcs_msm8916_clk_remove(struct platform_device *pdev)
 	struct clk_regmap_mux_div *a53cc = platform_get_drvdata(pdev);
 
 	clk_notifier_unregister(a53cc->pclk, &a53cc->clk_nb);
+	clk_put(a53cc->pclk);
 
 	return 0;
 }
-- 
2.23.0


^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH v2 5/5] clk: qcom: apcs-msm8916: get parent clock names from DT
  2019-09-12 14:15 ` [PATCH v2 5/5] clk: qcom: apcs-msm8916: get parent clock names from DT Jorge Ramirez-Ortiz
@ 2019-11-07 22:19   ` Stephen Boyd
  0 siblings, 0 replies; 7+ messages in thread
From: Stephen Boyd @ 2019-11-07 22:19 UTC (permalink / raw)
  To: agross, bjorn.andersson, jorge.ramirez-ortiz, mturquette
  Cc: niklas.cassel, linux-arm-msm, linux-clk, linux-kernel

Quoting Jorge Ramirez-Ortiz (2019-09-12 07:15:34)
> @@ -61,6 +62,9 @@ static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev)
>         if (!a53cc)
>                 return -ENOMEM;
>  
> +       if (of_clk_parent_fill(parent->of_node, parents, 2) == 2)
> +               memcpy(gpll0_a53cc, parents, sizeof(parents));
> +
>         init.name = "a53mux";
>         init.parent_names = gpll0_a53cc;
>         init.num_parents = ARRAY_SIZE(gpll0_a53cc);

Why can't we use new way of specifying parents in this driver too?

> @@ -76,10 +80,11 @@ static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev)
>         a53cc->src_shift = 8;
>         a53cc->parent_map = gpll0_a53cc_map;
>  
> -       a53cc->pclk = devm_clk_get(parent, NULL);
> +       a53cc->pclk = of_clk_get(parent->of_node, 0);

And then leave this one alone? clk_get() with a NULL id should use a DT
index of 0 from what I can tell.

>         if (IS_ERR(a53cc->pclk)) {
>                 ret = PTR_ERR(a53cc->pclk);
> -               dev_err(dev, "failed to get clk: %d\n", ret);
> +               if (ret != -EPROBE_DEFER)
> +                       dev_err(dev, "failed to get clk: %d\n", ret);
>                 return ret;
>         }
>  

^ permalink raw reply	[flat|nested] 7+ messages in thread

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Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-09-12 14:15 [PATCH v2 0/5] Clock changes to support cpufreq on QCS404 Jorge Ramirez-Ortiz
2019-09-12 14:15 ` [PATCH v2 1/5] clk: qcom: gcc: limit GPLL0_AO_OUT operating frequency Jorge Ramirez-Ortiz
2019-09-12 14:15 ` [PATCH v2 2/5] clk: qcom: hfpll: register as clock provider Jorge Ramirez-Ortiz
2019-09-12 14:15 ` [PATCH v2 3/5] clk: qcom: hfpll: CLK_IGNORE_UNUSED Jorge Ramirez-Ortiz
2019-09-12 14:15 ` [PATCH v2 4/5] clk: qcom: hfpll: use clk_parent_data to specify the parent Jorge Ramirez-Ortiz
2019-09-12 14:15 ` [PATCH v2 5/5] clk: qcom: apcs-msm8916: get parent clock names from DT Jorge Ramirez-Ortiz
2019-11-07 22:19   ` Stephen Boyd

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