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* [PATCH] clk: sunxi-ng: r40: Allow setting parent rate for external clock outputs
@ 2019-12-18  3:04 Chen-Yu Tsai
  2019-12-18 22:07 ` Maxime Ripard
  0 siblings, 1 reply; 2+ messages in thread
From: Chen-Yu Tsai @ 2019-12-18  3:04 UTC (permalink / raw)
  To: Maxime Ripard, Michael Turquette, Stephen Boyd
  Cc: Chen-Yu Tsai, linux-arm-kernel, linux-clk, linux-kernel, stable

From: Chen-Yu Tsai <wens@csie.org>

One of the uses of the external clock outputs is to provide a stable
32768 Hz clock signal to WiFi and Bluetooth chips. On the R40, the RTC
has an internal RC oscillator that is muxed with the external crystal.

Allow setting the parent rate for the external clock outputs so that
requests for 32768 Hz get passed to the RTC's clock driver to mux in
the external crystal if it isn't already muxed correctly.

Fixes: cd030a78f7aa ("clk: sunxi-ng: support R40 SoC")
Fixes: 01a7ea763fc4 ("clk: sunxi-ng: r40: Force LOSC parent to RTC LOSC output")
Cc: <stable@kernel.org>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 drivers/clk/sunxi-ng/ccu-sun8i-r40.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-r40.c b/drivers/clk/sunxi-ng/ccu-sun8i-r40.c
index 897490800102..23bfe1d12f21 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-r40.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-r40.c
@@ -761,7 +761,8 @@ static struct ccu_mp outa_clk = {
 		.reg		= 0x1f0,
 		.features	= CCU_FEATURE_FIXED_PREDIV,
 		.hw.init	= CLK_HW_INIT_PARENTS("outa", out_parents,
-						      &ccu_mp_ops, 0),
+						      &ccu_mp_ops,
+						      CLK_SET_RATE_PARENT),
 	}
 };
 
@@ -779,7 +780,8 @@ static struct ccu_mp outb_clk = {
 		.reg		= 0x1f4,
 		.features	= CCU_FEATURE_FIXED_PREDIV,
 		.hw.init	= CLK_HW_INIT_PARENTS("outb", out_parents,
-						      &ccu_mp_ops, 0),
+						      &ccu_mp_ops,
+						      CLK_SET_RATE_PARENT),
 	}
 };
 
-- 
2.24.0


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH] clk: sunxi-ng: r40: Allow setting parent rate for external clock outputs
  2019-12-18  3:04 [PATCH] clk: sunxi-ng: r40: Allow setting parent rate for external clock outputs Chen-Yu Tsai
@ 2019-12-18 22:07 ` Maxime Ripard
  0 siblings, 0 replies; 2+ messages in thread
From: Maxime Ripard @ 2019-12-18 22:07 UTC (permalink / raw)
  To: Chen-Yu Tsai
  Cc: Michael Turquette, Stephen Boyd, Chen-Yu Tsai, linux-arm-kernel,
	linux-clk, linux-kernel, stable

[-- Attachment #1: Type: text/plain, Size: 761 bytes --]

On Wed, Dec 18, 2019 at 11:04:31AM +0800, Chen-Yu Tsai wrote:
> From: Chen-Yu Tsai <wens@csie.org>
>
> One of the uses of the external clock outputs is to provide a stable
> 32768 Hz clock signal to WiFi and Bluetooth chips. On the R40, the RTC
> has an internal RC oscillator that is muxed with the external crystal.
>
> Allow setting the parent rate for the external clock outputs so that
> requests for 32768 Hz get passed to the RTC's clock driver to mux in
> the external crystal if it isn't already muxed correctly.
>
> Fixes: cd030a78f7aa ("clk: sunxi-ng: support R40 SoC")
> Fixes: 01a7ea763fc4 ("clk: sunxi-ng: r40: Force LOSC parent to RTC LOSC output")
> Cc: <stable@kernel.org>
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>

Applied, thanks!
Maxime

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^ permalink raw reply	[flat|nested] 2+ messages in thread

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