Re: Informing common clock framework driver of externally-derived base clock frequency

[Sylwester Nawrocki <s.nawrocki@samsung.com>]

On 1/4/19 22:29, Jonny Hall wrote:
> On Fri, Jan 4, 2019 at 4:30 AM Sylwester Nawrocki
> <s.nawrocki@samsung.com> wrote:
[...]
>> On 1/4/19 03:35, Jonny Hall wrote:
>> [...]
>>> ... However, in my application, the input frequency of
>>> the si5342 is not known in advance, is derived from an external
>>> source, and can change during runtime. The si5342 will need to be
>>> (re)configured during operation with the frequency of this root clock
>>> source in order to properly lock onto it and generate the correct
>>> output frequencies -- it cannot independently determine the input
>>> frequency, only "locked" / "unlocked" state.  The application software
>>> (other drivers and usermode application code) will know the input
>>> clock rate.  I've though of a couple ways to do this:
>>>
>>> -Implement the root clock source as an "imaginary" divider where the
>>> set_rate call actually configures the input dividers of the si5342.
>>> This approach seems to abuse the common clock framework, as I'm not
>>> actually *setting* the rate, I'm *informing* the driver of a rate that
>>> was determined independently.
>>
>> It sounds like registering a clk notifier on the si5342 root source clock
>> might be a way to go, wouldn't that work for you?
>> For an example you could have a look at drivers/clk/sunxi-ng/ccu_mux.c.

> Maybe my understanding is incorrect, but to me it looks like a
> notifier (callback registered with clk_notifier_register) is actually
> the opposite case -- this method would be used by a clock consumer
> that wants to be notified by the common clock framework that a clock
> rate has changed (I, as an endpoint, want to know when my clock
> source, which is controlled by CCF drivers, changes rate).  The use
> case I'm looking for is when a clock chip needs to be notified by
> *something else* that something in the system has changed (I, as a
> clock chip, need to be informed by other parts of the system what my
> input clock rate is).

How about modelling SI5432 input clocks as clock objects? Don't you do it 
already? These are clocks the SI5432 consumes so would be needed anyway.
 
> To add a bit of clarity to the scenario -- in my use case, the si5342
> is generating video pixel clocks for video outputs from the system.
> The inputs of the si5342 are other video pixel clocks, from video
> inputs to the system.  The parts of the system that are aware of the
> input clock rates are things like HDMI subsystem drivers and usermode
> application code.  I need a way to connect these
> "parts-that-are-aware-of-the-clock-rate" to my si5342 driver so it can
> properly configure that portion of the si5342 -- preferably within the
> common clock framework, because on the output side of the si5342, our
> video output drivers already work with the CCF.

Assuming the HDMI receiver is source of the clock, couldn't the HDMI 
driver just register a clock and modify its rate according to the HW
state changes or user ioctls, etc.? The rate is then propagated through
whole clock tree and any element can get notified about changes.

> It looks like some similar chips use recalc_rate as their function to
> configure input dividers -- but there appears to be no way to call
> recalc_rate through the clk.h API -- it looks like recalc_rate is only
> used for keeping track of things internal to the CCF.
-- 
Regards,
Sylwester