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From: Sylwester Nawrocki <>
To: Jonny Hall <>,
Cc: Stephen Boyd <>,
	Michael Turquette <>
Subject: Re: Informing common clock framework driver of externally-derived base clock frequency
Date: Fri, 04 Jan 2019 10:30:33 +0100
Message-ID: <> (raw)
In-Reply-To: <>


Cc: CCF maintainers

On 1/4/19 03:35, Jonny Hall wrote:

> ... However, in my application, the input frequency of
> the si5342 is not known in advance, is derived from an external
> source, and can change during runtime. The si5342 will need to be
> (re)configured during operation with the frequency of this root clock
> source in order to properly lock onto it and generate the correct
> output frequencies -- it cannot independently determine the input
> frequency, only "locked" / "unlocked" state.  The application software
> (other drivers and usermode application code) will know the input
> clock rate.  I've though of a couple ways to do this:
> -Implement the root clock source as an "imaginary" divider where the
> set_rate call actually configures the input dividers of the si5342.
> This approach seems to abuse the common clock framework, as I'm not
> actually *setting* the rate, I'm *informing* the driver of a rate that
> was determined independently.

It sounds like registering a clk notifier on the si5342 root source clock
might be a way to go, wouldn't that work for you?
For an example you could have a look at drivers/clk/sunxi-ng/ccu_mux.c.


  reply index

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <>
2019-01-04  2:35 ` Jonny Hall
2019-01-04  9:30   ` Sylwester Nawrocki [this message]
2019-01-04 21:29     ` Jonny Hall
2019-01-09 14:22       ` Sylwester Nawrocki
2019-01-29 22:26         ` Stephen Boyd

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