From: Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>
To: <herbert@gondor.apana.org.au>, <davem@davemloft.net>,
<tglx@linutronix.de>, <mingo@redhat.com>, <bp@alien8.de>,
<x86@kernel.org>, <hpa@zytor.com>, <linux-crypto@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Cc: <TimGuo-oc@zhaoxin.com>, <CooperYan@zhaoxin.com>,
<QiyuanWang@zhaoxin.com>, <HerryYang@zhaoxin.com>,
<CobeChen@zhaoxin.com>, <SilviaZhao@zhaoxin.com>
Subject: [PATCH] crypto: x86/crc32c-intel - Don't match some Zhaoxin CPUs
Date: Tue, 15 Dec 2020 18:28:11 +0800 [thread overview]
Message-ID: <1608028091-29439-1-git-send-email-TonyWWang-oc@zhaoxin.com> (raw)
The driver crc32c-intel match CPUs supporting X86_FEATURE_XMM4_2.
On platforms with Zhaoxin CPUs supporting this X86 feature, when
crc32c-intel and crc32c-generic are both registered, system will
use crc32c-intel because its .cra_priority is greater than
crc32c-generic.
When doing lmbench3 Create and Delete file test on partitions with
ext4 enabling metadata checksum, found using crc32c-generic driver
could get about 20% performance gain than using the driver crc32c-intel
on some Zhaoxin CPUs.
This case expect to use crc32c-generic driver for these Zhaoxin CPUs
to get performance gain, so remove these Zhaoxin CPUs support from
crc32c-intel.
Signed-off-by: Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>
---
arch/x86/crypto/crc32c-intel_glue.c | 21 +++++++++++++++++++--
1 file changed, 19 insertions(+), 2 deletions(-)
diff --git a/arch/x86/crypto/crc32c-intel_glue.c b/arch/x86/crypto/crc32c-intel_glue.c
index feccb52..5171091 100644
--- a/arch/x86/crypto/crc32c-intel_glue.c
+++ b/arch/x86/crypto/crc32c-intel_glue.c
@@ -215,14 +215,31 @@ static struct shash_alg alg = {
};
static const struct x86_cpu_id crc32c_cpu_id[] = {
- X86_MATCH_FEATURE(X86_FEATURE_XMM4_2, NULL),
+ /*
+ * Negative entries; exclude these chips from using this driver.
+ * They match the positive rule below, but their CRC32 instruction
+ * implementation is so slow, it doesn't merit use.
+ */
+ X86_MATCH_VENDOR_FAM_FEATURE(ZHAOXIN, 0x6, X86_FEATURE_XMM4_2, false),
+ X86_MATCH_VENDOR_FAM_MODEL_FEATURE(ZHAOXIN, 0x7, 0x1b, X86_FEATURE_XMM4_2, false),
+ X86_MATCH_VENDOR_FAM_MODEL_FEATURE(ZHAOXIN, 0x7, 0x3b, X86_FEATURE_XMM4_2, false),
+ X86_MATCH_VENDOR_FAM_FEATURE(CENTAUR, 0x6, X86_FEATURE_XMM4_2, false),
+ X86_MATCH_VENDOR_FAM_MODEL_FEATURE(CENTAUR, 0x7, 0x1b, X86_FEATURE_XMM4_2, false),
+ X86_MATCH_VENDOR_FAM_MODEL_FEATURE(CENTAUR, 0x7, 0x3b, X86_FEATURE_XMM4_2, false),
+ /*
+ * Positive entry; SSE-4.2 instructions include special purpose CRC32
+ * instructions.
+ */
+ X86_MATCH_FEATURE(X86_FEATURE_XMM4_2, true),
{}
};
MODULE_DEVICE_TABLE(x86cpu, crc32c_cpu_id);
static int __init crc32c_intel_mod_init(void)
{
- if (!x86_match_cpu(crc32c_cpu_id))
+ const struct x86_cpu_id *m = x86_match_cpu(crc32c_cpu_id);
+
+ if (!m || !m->driver_data)
return -ENODEV;
#ifdef CONFIG_X86_64
if (boot_cpu_has(X86_FEATURE_PCLMULQDQ)) {
--
2.7.4
next reply other threads:[~2020-12-15 10:29 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-15 10:28 Tony W Wang-oc [this message]
2021-01-02 21:12 ` [PATCH] crypto: x86/crc32c-intel - Don't match some Zhaoxin CPUs Herbert Xu
2021-01-07 6:27 ` Tony W Wang-oc
-- strict thread matches above, loose matches on Subject: below --
2020-12-14 3:59 Tony W Wang-oc
2020-12-15 8:58 ` Peter Zijlstra
2020-12-15 10:02 ` Tony W Wang-oc
2020-12-11 11:29 Tony W Wang-oc
2020-12-11 13:00 ` Peter Zijlstra
2020-12-12 4:32 ` Tony W Wang-oc
2020-12-11 17:43 ` Eric Biggers
2020-12-12 9:36 ` Ard Biesheuvel
2020-12-12 10:54 ` Ard Biesheuvel
2020-12-14 2:29 ` Tony W Wang-oc
2020-12-14 2:28 ` Tony W Wang-oc
2020-12-14 20:41 ` Eric Biggers
2020-12-15 2:15 ` Tony W Wang-oc
2020-12-15 17:56 ` Eric Biggers
2020-12-21 2:46 ` tonywwang-oc
2020-12-21 19:27 ` hpa
2020-12-22 3:01 ` tonywwang-oc
2020-12-22 4:54 ` hpa
2021-01-07 6:23 ` Tony W Wang-oc
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