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* [PATCH v2 0/2] hwrng: add support for Silex Insight BA431
@ 2020-06-01 14:27 Olivier Sobrie
  2020-06-01 14:27 ` [PATCH v2 1/2] dt-bindings: rng: document Silex Insight BA431 hwrng Olivier Sobrie
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: Olivier Sobrie @ 2020-06-01 14:27 UTC (permalink / raw)
  To: Matt Mackall, Herbert Xu, Rob Herring, Arnd Bergmann,
	Greg Kroah-Hartman, linux-crypto, devicetree, linux-kernel
  Cc: Olivier Sobrie, Waleed Ziad, sebastien.rabou

Hello all,

This set of patches aims at introducing a linux hwrng driver for the
Silex Insight BA431 IP which is available for various FPGA.
This hardware is for instance present in Silex Insight Viper OEM boards.

The first patch documents the device tree bindings.
The second one contains the BA431 hwrng driver.

Olivier Sobrie (2):
  dt-bindings: rng: document Silex Insight BA431 hwrng
  hwrng: ba431-rng: add support for BA431 hwrng

 .../bindings/rng/silex-insight,ba431-rng.yaml |  36 +++
 drivers/char/hw_random/Kconfig                |  12 +
 drivers/char/hw_random/Makefile               |   1 +
 drivers/char/hw_random/ba431-rng.c            | 234 ++++++++++++++++++
 4 files changed, 283 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/rng/silex-insight,ba431-rng.yaml
 create mode 100644 drivers/char/hw_random/ba431-rng.c

Changes in v2:
  - Dropped the first patch that has been applied by Rob.
  - Added Rob's review tag in the first patch.
  - Fixed copyright header.
  - Added missing endpoint and "If unsure, say Y" in the Kconfig like it is
    done for the other rng drivers.
  - Replaced the udelay() loop by readx_poll_timeout() in the driver.
  - Added Arnd's ack in the second patch.

-- 
2.26.2


^ permalink raw reply	[flat|nested] 4+ messages in thread

* [PATCH v2 1/2] dt-bindings: rng: document Silex Insight BA431 hwrng
  2020-06-01 14:27 [PATCH v2 0/2] hwrng: add support for Silex Insight BA431 Olivier Sobrie
@ 2020-06-01 14:27 ` Olivier Sobrie
  2020-06-01 14:27 ` [PATCH v2 2/2] hwrng: ba431-rng: add support for " Olivier Sobrie
  2020-06-18  7:56 ` [PATCH v2 0/2] hwrng: add support for Silex Insight BA431 Herbert Xu
  2 siblings, 0 replies; 4+ messages in thread
From: Olivier Sobrie @ 2020-06-01 14:27 UTC (permalink / raw)
  To: Matt Mackall, Herbert Xu, Rob Herring, Arnd Bergmann,
	Greg Kroah-Hartman, linux-crypto, devicetree, linux-kernel
  Cc: Olivier Sobrie, Waleed Ziad, sebastien.rabou, Rob Herring

This patch documents the device tree bindings of the BA431 hardware
random number generator.

This IP is for instance present in the Viper OEM boards sold by Silex
Insight.

Signed-off-by: Olivier Sobrie <olivier.sobrie@silexinsight.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
 .../bindings/rng/silex-insight,ba431-rng.yaml | 36 +++++++++++++++++++
 1 file changed, 36 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/rng/silex-insight,ba431-rng.yaml

diff --git a/Documentation/devicetree/bindings/rng/silex-insight,ba431-rng.yaml b/Documentation/devicetree/bindings/rng/silex-insight,ba431-rng.yaml
new file mode 100644
index 0000000000000..48ab82abf50ec
--- /dev/null
+++ b/Documentation/devicetree/bindings/rng/silex-insight,ba431-rng.yaml
@@ -0,0 +1,36 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/rng/silex-insight,ba431-rng.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Silex Insight BA431 RNG bindings
+
+description: |
+  The BA431 hardware random number generator is an IP that is FIPS-140-2/3
+  certified.
+
+maintainers:
+  - Olivier Sobrie <olivier.sobrie@silexinsight.com>
+
+properties:
+  compatible:
+    const: silex-insight,ba431-rng
+
+  reg:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: false
+
+examples:
+  - |
+    rng@42800000 {
+      compatible = "silex-insight,ba431-rng";
+      reg = <0x42800000 0x1000>;
+    };
+
+...
-- 
2.26.2


^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [PATCH v2 2/2] hwrng: ba431-rng: add support for BA431 hwrng
  2020-06-01 14:27 [PATCH v2 0/2] hwrng: add support for Silex Insight BA431 Olivier Sobrie
  2020-06-01 14:27 ` [PATCH v2 1/2] dt-bindings: rng: document Silex Insight BA431 hwrng Olivier Sobrie
@ 2020-06-01 14:27 ` Olivier Sobrie
  2020-06-18  7:56 ` [PATCH v2 0/2] hwrng: add support for Silex Insight BA431 Herbert Xu
  2 siblings, 0 replies; 4+ messages in thread
From: Olivier Sobrie @ 2020-06-01 14:27 UTC (permalink / raw)
  To: Matt Mackall, Herbert Xu, Rob Herring, Arnd Bergmann,
	Greg Kroah-Hartman, linux-crypto, devicetree, linux-kernel
  Cc: Olivier Sobrie, Waleed Ziad, sebastien.rabou

Silex insight BA431 is an IP designed to generate random numbers that
can be integrated in various FPGA.
This driver adds support for it through the hwrng interface.

This driver is used in Silex Insight Viper OEM boards.

Signed-off-by: Olivier Sobrie <olivier.sobrie@silexinsight.com>
Signed-off-by: Waleed Ziad <waleed94ziad@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
---
 drivers/char/hw_random/Kconfig     |  12 ++
 drivers/char/hw_random/Makefile    |   1 +
 drivers/char/hw_random/ba431-rng.c | 234 +++++++++++++++++++++++++++++
 3 files changed, 247 insertions(+)
 create mode 100644 drivers/char/hw_random/ba431-rng.c

diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
index 9bc46da8d77a8..4f50ee02c639e 100644
--- a/drivers/char/hw_random/Kconfig
+++ b/drivers/char/hw_random/Kconfig
@@ -74,6 +74,18 @@ config HW_RANDOM_ATMEL
 
 	  If unsure, say Y.
 
+config HW_RANDOM_BA431
+	tristate "Silex Insight BA431 Random Number Generator support"
+	default HW_RANDOM
+	help
+	  This driver provides kernel-side support for the Random Number
+	  Generator hardware based on Silex Insight BA431 IP.
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called ba431-rng.
+
+	  If unsure, say Y.
+
 config HW_RANDOM_BCM2835
 	tristate "Broadcom BCM2835/BCM63xx Random Number Generator support"
 	depends on ARCH_BCM2835 || ARCH_BCM_NSP || ARCH_BCM_5301X || \
diff --git a/drivers/char/hw_random/Makefile b/drivers/char/hw_random/Makefile
index a7801b49ce6c0..02ccadafcca99 100644
--- a/drivers/char/hw_random/Makefile
+++ b/drivers/char/hw_random/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_HW_RANDOM_TIMERIOMEM) += timeriomem-rng.o
 obj-$(CONFIG_HW_RANDOM_INTEL) += intel-rng.o
 obj-$(CONFIG_HW_RANDOM_AMD) += amd-rng.o
 obj-$(CONFIG_HW_RANDOM_ATMEL) += atmel-rng.o
+obj-$(CONFIG_HW_RANDOM_BA431) += ba431-rng.o
 obj-$(CONFIG_HW_RANDOM_GEODE) += geode-rng.o
 obj-$(CONFIG_HW_RANDOM_N2RNG) += n2-rng.o
 n2-rng-y := n2-drv.o n2-asm.o
diff --git a/drivers/char/hw_random/ba431-rng.c b/drivers/char/hw_random/ba431-rng.c
new file mode 100644
index 0000000000000..a39e3abf50b94
--- /dev/null
+++ b/drivers/char/hw_random/ba431-rng.c
@@ -0,0 +1,234 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2020 Silex Insight
+
+#include <linux/delay.h>
+#include <linux/hw_random.h>
+#include <linux/io.h>
+#include <linux/iopoll.h>
+#include <linux/mod_devicetable.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/workqueue.h>
+
+#define BA431_RESET_DELAY			1 /* usec */
+#define BA431_RESET_READ_STATUS_TIMEOUT		1000 /* usec */
+#define BA431_RESET_READ_STATUS_INTERVAL	10 /* usec */
+#define BA431_READ_RETRY_INTERVAL		1 /* usec */
+
+#define BA431_REG_CTRL				0x00
+#define BA431_REG_FIFO_LEVEL			0x04
+#define BA431_REG_STATUS			0x30
+#define BA431_REG_FIFODATA			0x80
+
+#define BA431_CTRL_ENABLE			BIT(0)
+#define BA431_CTRL_SOFTRESET			BIT(8)
+
+#define BA431_STATUS_STATE_MASK			(BIT(1) | BIT(2) | BIT(3))
+#define BA431_STATUS_STATE_OFFSET		1
+
+enum ba431_state {
+	BA431_STATE_RESET,
+	BA431_STATE_STARTUP,
+	BA431_STATE_FIFOFULLON,
+	BA431_STATE_FIFOFULLOFF,
+	BA431_STATE_RUNNING,
+	BA431_STATE_ERROR
+};
+
+struct ba431_trng {
+	struct device *dev;
+	void __iomem *base;
+	struct hwrng rng;
+	atomic_t reset_pending;
+	struct work_struct reset_work;
+};
+
+static inline u32 ba431_trng_read_reg(struct ba431_trng *ba431, u32 reg)
+{
+	return ioread32(ba431->base + reg);
+}
+
+static inline void ba431_trng_write_reg(struct ba431_trng *ba431, u32 reg,
+					u32 val)
+{
+	iowrite32(val, ba431->base + reg);
+}
+
+static inline enum ba431_state ba431_trng_get_state(struct ba431_trng *ba431)
+{
+	u32 status = ba431_trng_read_reg(ba431, BA431_REG_STATUS);
+
+	return (status & BA431_STATUS_STATE_MASK) >> BA431_STATUS_STATE_OFFSET;
+}
+
+static int ba431_trng_is_in_error(struct ba431_trng *ba431)
+{
+	enum ba431_state state = ba431_trng_get_state(ba431);
+
+	if ((state < BA431_STATE_STARTUP) ||
+	    (state >= BA431_STATE_ERROR))
+		return 1;
+
+	return 0;
+}
+
+static int ba431_trng_reset(struct ba431_trng *ba431)
+{
+	int ret;
+
+	/* Disable interrupts, random generation and enable the softreset */
+	ba431_trng_write_reg(ba431, BA431_REG_CTRL, BA431_CTRL_SOFTRESET);
+	udelay(BA431_RESET_DELAY);
+	ba431_trng_write_reg(ba431, BA431_REG_CTRL, BA431_CTRL_ENABLE);
+
+	/* Wait until the state changed */
+	if (readx_poll_timeout(ba431_trng_is_in_error, ba431, ret, !ret,
+			       BA431_RESET_READ_STATUS_INTERVAL,
+			       BA431_RESET_READ_STATUS_TIMEOUT)) {
+		dev_err(ba431->dev, "reset failed (state: %d)\n",
+			ba431_trng_get_state(ba431));
+		return -ETIMEDOUT;
+	}
+
+	dev_info(ba431->dev, "reset done\n");
+
+	return 0;
+}
+
+static void ba431_trng_reset_work(struct work_struct *work)
+{
+	struct ba431_trng *ba431 = container_of(work, struct ba431_trng,
+						reset_work);
+	ba431_trng_reset(ba431);
+	atomic_set(&ba431->reset_pending, 0);
+}
+
+static void ba431_trng_schedule_reset(struct ba431_trng *ba431)
+{
+	if (atomic_cmpxchg(&ba431->reset_pending, 0, 1))
+		return;
+
+	schedule_work(&ba431->reset_work);
+}
+
+static int ba431_trng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
+{
+	struct ba431_trng *ba431 = container_of(rng, struct ba431_trng, rng);
+	u32 *data = buf;
+	unsigned int level, i;
+	int n = 0;
+
+	while (max > 0) {
+		level = ba431_trng_read_reg(ba431, BA431_REG_FIFO_LEVEL);
+		if (!level) {
+			if (ba431_trng_is_in_error(ba431)) {
+				ba431_trng_schedule_reset(ba431);
+				break;
+			}
+
+			if (!wait)
+				break;
+
+			udelay(BA431_READ_RETRY_INTERVAL);
+			continue;
+		}
+
+		i = level;
+		do {
+			data[n++] = ba431_trng_read_reg(ba431,
+							BA431_REG_FIFODATA);
+			max -= sizeof(*data);
+		} while (--i && (max > 0));
+
+		if (ba431_trng_is_in_error(ba431)) {
+			n -= (level - i);
+			ba431_trng_schedule_reset(ba431);
+			break;
+		}
+	}
+
+	n *= sizeof(data);
+	return (n || !wait) ? n : -EIO;
+}
+
+static void ba431_trng_cleanup(struct hwrng *rng)
+{
+	struct ba431_trng *ba431 = container_of(rng, struct ba431_trng, rng);
+
+	ba431_trng_write_reg(ba431, BA431_REG_CTRL, 0);
+	cancel_work_sync(&ba431->reset_work);
+}
+
+static int ba431_trng_init(struct hwrng *rng)
+{
+	struct ba431_trng *ba431 = container_of(rng, struct ba431_trng, rng);
+
+	return ba431_trng_reset(ba431);
+}
+
+static int ba431_trng_probe(struct platform_device *pdev)
+{
+	struct ba431_trng *ba431;
+	struct resource *res;
+	int ret;
+
+	ba431 = devm_kzalloc(&pdev->dev, sizeof(*ba431), GFP_KERNEL);
+	if (!ba431)
+		return -ENOMEM;
+
+	ba431->dev = &pdev->dev;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	ba431->base = devm_ioremap_resource(&pdev->dev, res);
+	if (IS_ERR(ba431->base))
+		return PTR_ERR(ba431->base);
+
+	atomic_set(&ba431->reset_pending, 0);
+	INIT_WORK(&ba431->reset_work, ba431_trng_reset_work);
+	ba431->rng.name = pdev->name;
+	ba431->rng.init = ba431_trng_init;
+	ba431->rng.cleanup = ba431_trng_cleanup;
+	ba431->rng.read = ba431_trng_read;
+
+	platform_set_drvdata(pdev, ba431);
+
+	ret = hwrng_register(&ba431->rng);
+	if (ret) {
+		dev_err(&pdev->dev, "BA431 registration failed (%d)\n", ret);
+		return ret;
+	}
+
+	dev_info(&pdev->dev, "BA431 TRNG registered\n");
+
+	return 0;
+}
+
+static int ba431_trng_remove(struct platform_device *pdev)
+{
+	struct ba431_trng *ba431 = platform_get_drvdata(pdev);
+
+	hwrng_unregister(&ba431->rng);
+
+	return 0;
+}
+
+static const struct of_device_id ba431_trng_dt_ids[] = {
+	{ .compatible = "silex-insight,ba431-rng", .data = NULL },
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, ba431_trng_dt_ids);
+
+static struct platform_driver ba431_trng_driver = {
+	.driver = {
+		.name = "ba431-rng",
+		.of_match_table = ba431_trng_dt_ids,
+	},
+	.probe = ba431_trng_probe,
+	.remove = ba431_trng_remove,
+};
+
+module_platform_driver(ba431_trng_driver);
+
+MODULE_AUTHOR("Olivier Sobrie <olivier@sobrie.be>");
+MODULE_DESCRIPTION("TRNG driver for Silex Insight BA431");
+MODULE_LICENSE("GPL");
-- 
2.26.2


^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH v2 0/2] hwrng: add support for Silex Insight BA431
  2020-06-01 14:27 [PATCH v2 0/2] hwrng: add support for Silex Insight BA431 Olivier Sobrie
  2020-06-01 14:27 ` [PATCH v2 1/2] dt-bindings: rng: document Silex Insight BA431 hwrng Olivier Sobrie
  2020-06-01 14:27 ` [PATCH v2 2/2] hwrng: ba431-rng: add support for " Olivier Sobrie
@ 2020-06-18  7:56 ` Herbert Xu
  2 siblings, 0 replies; 4+ messages in thread
From: Herbert Xu @ 2020-06-18  7:56 UTC (permalink / raw)
  To: Olivier Sobrie
  Cc: Matt Mackall, Rob Herring, Arnd Bergmann, Greg Kroah-Hartman,
	linux-crypto, devicetree, linux-kernel, Waleed Ziad,
	sebastien.rabou

On Mon, Jun 01, 2020 at 04:27:38PM +0200, Olivier Sobrie wrote:
> Hello all,
> 
> This set of patches aims at introducing a linux hwrng driver for the
> Silex Insight BA431 IP which is available for various FPGA.
> This hardware is for instance present in Silex Insight Viper OEM boards.
> 
> The first patch documents the device tree bindings.
> The second one contains the BA431 hwrng driver.
> 
> Olivier Sobrie (2):
>   dt-bindings: rng: document Silex Insight BA431 hwrng
>   hwrng: ba431-rng: add support for BA431 hwrng
> 
>  .../bindings/rng/silex-insight,ba431-rng.yaml |  36 +++
>  drivers/char/hw_random/Kconfig                |  12 +
>  drivers/char/hw_random/Makefile               |   1 +
>  drivers/char/hw_random/ba431-rng.c            | 234 ++++++++++++++++++
>  4 files changed, 283 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/rng/silex-insight,ba431-rng.yaml
>  create mode 100644 drivers/char/hw_random/ba431-rng.c
> 
> Changes in v2:
>   - Dropped the first patch that has been applied by Rob.
>   - Added Rob's review tag in the first patch.
>   - Fixed copyright header.
>   - Added missing endpoint and "If unsure, say Y" in the Kconfig like it is
>     done for the other rng drivers.
>   - Replaced the udelay() loop by readx_poll_timeout() in the driver.
>   - Added Arnd's ack in the second patch.

All applied.  Thanks.
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2020-06-18  7:56 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-06-01 14:27 [PATCH v2 0/2] hwrng: add support for Silex Insight BA431 Olivier Sobrie
2020-06-01 14:27 ` [PATCH v2 1/2] dt-bindings: rng: document Silex Insight BA431 hwrng Olivier Sobrie
2020-06-01 14:27 ` [PATCH v2 2/2] hwrng: ba431-rng: add support for " Olivier Sobrie
2020-06-18  7:56 ` [PATCH v2 0/2] hwrng: add support for Silex Insight BA431 Herbert Xu

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