[PATCH 0/3] crypto: qat - update admin interface

[PATCH 0/3] crypto: qat - update admin interface

[Giovanni Cabiddu]

Refactor and update the admin interface in the qat driver.

These changes are on top of "crypto: qat - remove packed attribute
in etr structs" (https://patchwork.kernel.org/patch/11586063/)

Wojciech Ziemba (3):
  crypto: qat - update fw init admin msg
  crypto: qat - send admin messages to set of AEs
  crypto: qat - update timeout logic in put admin msg

 drivers/crypto/qat/qat_common/adf_admin.c     | 96 ++++++++++++-------
 .../qat/qat_common/icp_qat_fw_init_admin.h    | 75 ++++++++++-----
 2 files changed, 114 insertions(+), 57 deletions(-)

-- 
2.26.2

[PATCH 1/3] crypto: qat - update fw init admin msg

[Giovanni Cabiddu]

From: Wojciech Ziemba <wojciech.ziemba@intel.com>

This patch tidies up the definition of init/admin request and response
messages by removing the icp_qat_fw_init_admin_resp_pars structure
and embedding it into icp_qat_fw_init_admin_resp.

Signed-off-by: Wojciech Ziemba <wojciech.ziemba@intel.com>
Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
---
 drivers/crypto/qat/qat_common/adf_admin.c     |  4 +-
 .../qat/qat_common/icp_qat_fw_init_admin.h    | 75 ++++++++++++-------
 2 files changed, 52 insertions(+), 27 deletions(-)

diff --git a/drivers/crypto/qat/qat_common/adf_admin.c b/drivers/crypto/qat/qat_common/adf_admin.c
index e363d13dcd78..a51ba0039cff 100644
--- a/drivers/crypto/qat/qat_common/adf_admin.c
+++ b/drivers/crypto/qat/qat_common/adf_admin.c
@@ -152,7 +152,7 @@ static int adf_send_admin_cmd(struct adf_accel_dev *accel_dev, int cmd)
 	int i;
 
 	memset(&req, 0, sizeof(struct icp_qat_fw_init_admin_req));
-	req.init_admin_cmd_id = cmd;
+	req.cmd_id = cmd;
 
 	if (cmd == ICP_QAT_FW_CONSTANTS_CFG) {
 		req.init_cfg_sz = 1024;
@@ -161,7 +161,7 @@ static int adf_send_admin_cmd(struct adf_accel_dev *accel_dev, int cmd)
 	for (i = 0; i < hw_device->get_num_aes(hw_device); i++) {
 		memset(&resp, 0, sizeof(struct icp_qat_fw_init_admin_resp));
 		if (adf_put_admin_msg_sync(accel_dev, i, &req, &resp) ||
-		    resp.init_resp_hdr.status)
+		    resp.status)
 			return -EFAULT;
 	}
 	return 0;
diff --git a/drivers/crypto/qat/qat_common/icp_qat_fw_init_admin.h b/drivers/crypto/qat/qat_common/icp_qat_fw_init_admin.h
index c867e9a0a540..d4d188cd7ed0 100644
--- a/drivers/crypto/qat/qat_common/icp_qat_fw_init_admin.h
+++ b/drivers/crypto/qat/qat_common/icp_qat_fw_init_admin.h
@@ -25,48 +25,73 @@ enum icp_qat_fw_init_admin_resp_status {
 struct icp_qat_fw_init_admin_req {
 	__u16 init_cfg_sz;
 	__u8 resrvd1;
-	__u8 init_admin_cmd_id;
+	__u8 cmd_id;
 	__u32 resrvd2;
 	__u64 opaque_data;
 	__u64 init_cfg_ptr;
-	__u64 resrvd3;
+
+	union {
+		struct {
+			__u16 ibuf_size_in_kb;
+			__u16 resrvd3;
+		};
+		__u32 idle_filter;
+	};
+
+	__u32 resrvd4;
 };
 
-struct icp_qat_fw_init_admin_resp_hdr {
+struct icp_qat_fw_init_admin_resp {
 	__u8 flags;
 	__u8 resrvd1;
 	__u8 status;
-	__u8 init_admin_cmd_id;
-};
-
-struct icp_qat_fw_init_admin_resp_pars {
+	__u8 cmd_id;
+	union {
+		__u32 resrvd2;
+		struct {
+			__u16 version_minor_num;
+			__u16 version_major_num;
+		};
+	};
+	__u64 opaque_data;
 	union {
-		__u32 resrvd1[ICP_QAT_FW_NUM_LONGWORDS_4];
+		__u32 resrvd3[ICP_QAT_FW_NUM_LONGWORDS_4];
 		struct {
 			__u32 version_patch_num;
 			__u8 context_id;
 			__u8 ae_id;
-			__u16 resrvd1;
-			__u64 resrvd2;
-		} s1;
+			__u16 resrvd4;
+			__u64 resrvd5;
+		};
 		struct {
 			__u64 req_rec_count;
 			__u64 resp_sent_count;
-		} s2;
-	} u;
-};
-
-struct icp_qat_fw_init_admin_resp {
-	struct icp_qat_fw_init_admin_resp_hdr init_resp_hdr;
-	union {
-		__u32 resrvd2;
+		};
 		struct {
-			__u16 version_minor_num;
-			__u16 version_major_num;
-		} s;
-	} u;
-	__u64 opaque_data;
-	struct icp_qat_fw_init_admin_resp_pars init_resp_pars;
+			__u16 compression_algos;
+			__u16 checksum_algos;
+			__u32 deflate_capabilities;
+			__u32 resrvd6;
+			__u32 lzs_capabilities;
+		};
+		struct {
+			__u32 cipher_algos;
+			__u32 hash_algos;
+			__u16 keygen_algos;
+			__u16 other;
+			__u16 public_key_algos;
+			__u16 prime_algos;
+		};
+		struct {
+			__u64 timestamp;
+			__u64 resrvd7;
+		};
+		struct {
+			__u32 successful_count;
+			__u32 unsuccessful_count;
+			__u64 resrvd8;
+		};
+	};
 };
 
 #define ICP_QAT_FW_COMN_HEARTBEAT_OK 0
-- 
2.26.2

[PATCH 2/3] crypto: qat - send admin messages to set of AEs

[Giovanni Cabiddu]

From: Wojciech Ziemba <wojciech.ziemba@intel.com>

Update the logic that sends admin messages to be able to target a subset
of Acceleration Engines (AEs) in the device.
In future not all admin messages need to be sent to all the AEs.

Signed-off-by: Wojciech Ziemba <wojciech.ziemba@intel.com>
Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
---
 drivers/crypto/qat/qat_common/adf_admin.c | 64 ++++++++++++++++-------
 1 file changed, 46 insertions(+), 18 deletions(-)

diff --git a/drivers/crypto/qat/qat_common/adf_admin.c b/drivers/crypto/qat/qat_common/adf_admin.c
index a51ba0039cff..aa610f80296d 100644
--- a/drivers/crypto/qat/qat_common/adf_admin.c
+++ b/drivers/crypto/qat/qat_common/adf_admin.c
@@ -16,6 +16,7 @@
 #define ADF_DH895XCC_MAILBOX_BASE_OFFSET 0x20970
 #define ADF_DH895XCC_MAILBOX_STRIDE 0x1000
 #define ADF_ADMINMSG_LEN 32
+#define ADF_CONST_TABLE_SIZE 1024
 
 static const u8 const_tab[1024] __aligned(1024) = {
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -114,6 +115,7 @@ static int adf_put_admin_msg_sync(struct adf_accel_dev *accel_dev, u32 ae,
 	int offset = ae * ADF_ADMINMSG_LEN * 2;
 	void __iomem *mailbox = admin->mailbox_addr;
 	int mb_offset = ae * ADF_DH895XCC_MAILBOX_STRIDE;
+	struct icp_qat_fw_init_admin_req *request = in;
 	int times, received;
 
 	mutex_lock(&admin->lock);
@@ -138,33 +140,57 @@ static int adf_put_admin_msg_sync(struct adf_accel_dev *accel_dev, u32 ae,
 		       ADF_ADMINMSG_LEN, ADF_ADMINMSG_LEN);
 	else
 		dev_err(&GET_DEV(accel_dev),
-			"Failed to send admin msg to accelerator\n");
+			"Failed to send admin msg %d to accelerator %d\n",
+			request->cmd_id, ae);
 
 	mutex_unlock(&admin->lock);
 	return received ? 0 : -EFAULT;
 }
 
-static int adf_send_admin_cmd(struct adf_accel_dev *accel_dev, int cmd)
+static int adf_send_admin(struct adf_accel_dev *accel_dev,
+			  struct icp_qat_fw_init_admin_req *req,
+			  struct icp_qat_fw_init_admin_resp *resp,
+			  const unsigned long ae_mask)
 {
+	u32 ae;
+
+	for_each_set_bit(ae, &ae_mask, ICP_QAT_HW_AE_DELIMITER)
+		if (adf_put_admin_msg_sync(accel_dev, ae, req, resp) ||
+		    resp->status)
+			return -EFAULT;
+
+	return 0;
+}
+
+static int adf_init_me(struct adf_accel_dev *accel_dev)
+{
+	struct icp_qat_fw_init_admin_req req;
+	struct icp_qat_fw_init_admin_resp resp;
 	struct adf_hw_device_data *hw_device = accel_dev->hw_device;
+	u32 ae_mask = hw_device->ae_mask;
+
+	memset(&req, 0, sizeof(req));
+	memset(&resp, 0, sizeof(resp));
+	req.cmd_id = ICP_QAT_FW_INIT_ME;
+
+	return adf_send_admin(accel_dev, &req, &resp, ae_mask);
+}
+
+static int adf_set_fw_constants(struct adf_accel_dev *accel_dev)
+{
 	struct icp_qat_fw_init_admin_req req;
 	struct icp_qat_fw_init_admin_resp resp;
-	int i;
+	struct adf_hw_device_data *hw_device = accel_dev->hw_device;
+	u32 ae_mask = hw_device->ae_mask;
 
-	memset(&req, 0, sizeof(struct icp_qat_fw_init_admin_req));
-	req.cmd_id = cmd;
+	memset(&req, 0, sizeof(req));
+	memset(&resp, 0, sizeof(resp));
+	req.cmd_id = ICP_QAT_FW_CONSTANTS_CFG;
 
-	if (cmd == ICP_QAT_FW_CONSTANTS_CFG) {
-		req.init_cfg_sz = 1024;
-		req.init_cfg_ptr = accel_dev->admin->const_tbl_addr;
-	}
-	for (i = 0; i < hw_device->get_num_aes(hw_device); i++) {
-		memset(&resp, 0, sizeof(struct icp_qat_fw_init_admin_resp));
-		if (adf_put_admin_msg_sync(accel_dev, i, &req, &resp) ||
-		    resp.status)
-			return -EFAULT;
-	}
-	return 0;
+	req.init_cfg_sz = ADF_CONST_TABLE_SIZE;
+	req.init_cfg_ptr = accel_dev->admin->const_tbl_addr;
+
+	return adf_send_admin(accel_dev, &req, &resp, ae_mask);
 }
 
 /**
@@ -177,11 +203,13 @@ static int adf_send_admin_cmd(struct adf_accel_dev *accel_dev, int cmd)
  */
 int adf_send_admin_init(struct adf_accel_dev *accel_dev)
 {
-	int ret = adf_send_admin_cmd(accel_dev, ICP_QAT_FW_INIT_ME);
+	int ret;
 
+	ret = adf_init_me(accel_dev);
 	if (ret)
 		return ret;
-	return adf_send_admin_cmd(accel_dev, ICP_QAT_FW_CONSTANTS_CFG);
+
+	return adf_set_fw_constants(accel_dev);
 }
 EXPORT_SYMBOL_GPL(adf_send_admin_init);
 
-- 
2.26.2

[PATCH 3/3] crypto: qat - update timeout logic in put admin msg

[Giovanni Cabiddu]

From: Wojciech Ziemba <wojciech.ziemba@intel.com>

Replace timeout logic in adf_put_admin_msg_sync() with existing macro
readl_poll_timeout().

Signed-off-by: Wojciech Ziemba <wojciech.ziemba@intel.com>
Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
---
 drivers/crypto/qat/qat_common/adf_admin.c | 34 +++++++++++++----------
 1 file changed, 19 insertions(+), 15 deletions(-)

diff --git a/drivers/crypto/qat/qat_common/adf_admin.c b/drivers/crypto/qat/qat_common/adf_admin.c
index aa610f80296d..1c8ca151a963 100644
--- a/drivers/crypto/qat/qat_common/adf_admin.c
+++ b/drivers/crypto/qat/qat_common/adf_admin.c
@@ -3,7 +3,7 @@
 #include <linux/types.h>
 #include <linux/mutex.h>
 #include <linux/slab.h>
-#include <linux/delay.h>
+#include <linux/iopoll.h>
 #include <linux/pci.h>
 #include <linux/dma-mapping.h>
 #include "adf_accel_devices.h"
@@ -17,6 +17,8 @@
 #define ADF_DH895XCC_MAILBOX_STRIDE 0x1000
 #define ADF_ADMINMSG_LEN 32
 #define ADF_CONST_TABLE_SIZE 1024
+#define ADF_ADMIN_POLL_DELAY_US 20
+#define ADF_ADMIN_POLL_TIMEOUT_US (5 * USEC_PER_SEC)
 
 static const u8 const_tab[1024] __aligned(1024) = {
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -111,12 +113,13 @@ struct adf_admin_comms {
 static int adf_put_admin_msg_sync(struct adf_accel_dev *accel_dev, u32 ae,
 				  void *in, void *out)
 {
+	int ret;
+	u32 status;
 	struct adf_admin_comms *admin = accel_dev->admin;
 	int offset = ae * ADF_ADMINMSG_LEN * 2;
 	void __iomem *mailbox = admin->mailbox_addr;
 	int mb_offset = ae * ADF_DH895XCC_MAILBOX_STRIDE;
 	struct icp_qat_fw_init_admin_req *request = in;
-	int times, received;
 
 	mutex_lock(&admin->lock);
 
@@ -127,24 +130,25 @@ static int adf_put_admin_msg_sync(struct adf_accel_dev *accel_dev, u32 ae,
 
 	memcpy(admin->virt_addr + offset, in, ADF_ADMINMSG_LEN);
 	ADF_CSR_WR(mailbox, mb_offset, 1);
-	received = 0;
-	for (times = 0; times < 50; times++) {
-		msleep(20);
-		if (ADF_CSR_RD(mailbox, mb_offset) == 0) {
-			received = 1;
-			break;
-		}
-	}
-	if (received)
-		memcpy(out, admin->virt_addr + offset +
-		       ADF_ADMINMSG_LEN, ADF_ADMINMSG_LEN);
-	else
+
+	ret = readl_poll_timeout(mailbox + mb_offset, status,
+				 status == 0, ADF_ADMIN_POLL_DELAY_US,
+				 ADF_ADMIN_POLL_TIMEOUT_US);
+	if (ret < 0) {
+		/* Response timeout */
 		dev_err(&GET_DEV(accel_dev),
 			"Failed to send admin msg %d to accelerator %d\n",
 			request->cmd_id, ae);
+	} else {
+		/* Response received from admin message, we can now
+		 * make response data available in "out" parameter.
+		 */
+		memcpy(out, admin->virt_addr + offset +
+		       ADF_ADMINMSG_LEN, ADF_ADMINMSG_LEN);
+	}
 
 	mutex_unlock(&admin->lock);
-	return received ? 0 : -EFAULT;
+	return ret;
 }
 
 static int adf_send_admin(struct adf_accel_dev *accel_dev,
-- 
2.26.2

Re: [PATCH 0/3] crypto: qat - update admin interface

[Herbert Xu]

On Thu, Jun 11, 2020 at 10:14:46PM +0100, Giovanni Cabiddu wrote:
> Refactor and update the admin interface in the qat driver.
> 
> These changes are on top of "crypto: qat - remove packed attribute
> in etr structs" (https://patchwork.kernel.org/patch/11586063/)
> 
> Wojciech Ziemba (3):
>   crypto: qat - update fw init admin msg
>   crypto: qat - send admin messages to set of AEs
>   crypto: qat - update timeout logic in put admin msg
> 
>  drivers/crypto/qat/qat_common/adf_admin.c     | 96 ++++++++++++-------
>  .../qat/qat_common/icp_qat_fw_init_admin.h    | 75 ++++++++++-----
>  2 files changed, 114 insertions(+), 57 deletions(-)

All applied.  Thanks.
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt