From: Neal Liu <neal_liu@aspeedtech.com>
To: Dhananjay Phadke <dphadke@linux.microsoft.com>,
Herbert Xu <herbert@gondor.apana.org.au>,
"David S . Miller" <davem@davemloft.net>,
"Joel Stanley" <joel@jms.id.au>, Andrew Jeffery <andrew@aj.id.au>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
"Chia-Wei Wang --cc=linux-kernel @ vger . kernel . org"
<chiawei_wang@aspeedtech.com>
Cc: <linux-crypto@vger.kernel.org>, <linux-aspeed@lists.ozlabs.org>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<BMC-SW@aspeedtech.com>
Subject: [PATCH v1 3/4] dt-bindings: crypto: add documentation for Aspeed ACRY
Date: Fri, 2 Sep 2022 14:00:11 +0800 [thread overview]
Message-ID: <20220902060012.3758637-4-neal_liu@aspeedtech.com> (raw)
In-Reply-To: <20220902060012.3758637-1-neal_liu@aspeedtech.com>
Add device tree binding documentation for the Aspeed
ECDSA/RSA ACRY Engines Controller.
Signed-off-by: Neal Liu <neal_liu@aspeedtech.com>
---
.../bindings/crypto/aspeed,ast2600-acry.yaml | 49 +++++++++++++++++++
MAINTAINERS | 2 +-
2 files changed, 50 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/crypto/aspeed,ast2600-acry.yaml
diff --git a/Documentation/devicetree/bindings/crypto/aspeed,ast2600-acry.yaml b/Documentation/devicetree/bindings/crypto/aspeed,ast2600-acry.yaml
new file mode 100644
index 000000000000..192b40cd0a39
--- /dev/null
+++ b/Documentation/devicetree/bindings/crypto/aspeed,ast2600-acry.yaml
@@ -0,0 +1,49 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/crypto/aspeed,ast2600-acry.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ASPEED ACRY ECDSA/RSA Hardware Accelerator Engines Device Tree Bindings
+
+maintainers:
+ - Neal Liu <neal_liu@aspeedtech.com>
+
+description: |
+ The ACRY ECDSA/RSA engines is designed to accelerate the throughput
+ of ECDSA/RSA signature and verification. Basically, ACRY can be
+ divided into two independently engines - ECC Engine and RSA Engine.
+
+properties:
+ compatible:
+ enum:
+ - aspeed,ast2600-acry
+
+ reg:
+ items:
+ - description: acry base address & size
+ - description: acry sram base address & size
+
+ clocks:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/ast2600-clock.h>
+ acry: crypto@1e6fa000 {
+ compatible = "aspeed,ast2600-acry";
+ reg = <0x1e6fa000 0x400>, <0x1e710000 0x1800>;
+ interrupts = <160>;
+ clocks = <&syscon ASPEED_CLK_GATE_RSACLK>;
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index 832da6d77374..09ab1c3adbb7 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3214,7 +3214,7 @@ ASPEED CRYPTO DRIVER
M: Neal Liu <neal_liu@aspeedtech.com>
L: linux-aspeed@lists.ozlabs.org (moderated for non-subscribers)
S: Maintained
-F: Documentation/devicetree/bindings/crypto/aspeed,ast2500-hace.yaml
+F: Documentation/devicetree/bindings/crypto/aspeed,*
F: drivers/crypto/aspeed/
ASUS NOTEBOOKS AND EEEPC ACPI/WMI EXTRAS DRIVERS
--
2.25.1
next prev parent reply other threads:[~2022-09-02 6:02 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-02 6:00 [PATCH v1 0/4] Add Aspeed ACRY driver for hardware acceleration Neal Liu
2022-09-02 6:00 ` [PATCH v1 1/4] crypto: aspeed: Add ACRY RSA driver Neal Liu
2022-10-05 17:54 ` Anirudh Venkataramanan
2022-10-06 3:43 ` Neal Liu
2022-09-02 6:00 ` [PATCH v1 2/4] ARM: dts: aspeed: Add ACRY/AHBC device controller node Neal Liu
2022-09-02 6:00 ` Neal Liu [this message]
2022-09-07 20:48 ` [PATCH v1 3/4] dt-bindings: crypto: add documentation for Aspeed ACRY Rob Herring
2022-09-02 6:00 ` [PATCH v1 4/4] dt-bindings: bus: add documentation for Aspeed AHBC Neal Liu
2022-09-07 20:50 ` Rob Herring
2022-09-08 3:26 ` Neal Liu
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