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From: Neal Liu <neal_liu@aspeedtech.com>
To: Dhananjay Phadke <dphadke@linux.microsoft.com>,
	Herbert Xu <herbert@gondor.apana.org.au>,
	"David S . Miller" <davem@davemloft.net>,
	"Joel Stanley" <joel@jms.id.au>, Andrew Jeffery <andrew@aj.id.au>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	"Chia-Wei Wang --cc=linux-kernel @ vger . kernel . org" 
	<chiawei_wang@aspeedtech.com>
Cc: <linux-crypto@vger.kernel.org>, <linux-aspeed@lists.ozlabs.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<BMC-SW@aspeedtech.com>
Subject: [PATCH v1 4/4] dt-bindings: bus: add documentation for Aspeed AHBC
Date: Fri, 2 Sep 2022 14:00:12 +0800	[thread overview]
Message-ID: <20220902060012.3758637-5-neal_liu@aspeedtech.com> (raw)
In-Reply-To: <20220902060012.3758637-1-neal_liu@aspeedtech.com>

Add device tree binding documentation for the Aspeed
Advanced High-Performance Bus (AHB) Controller.

Signed-off-by: Neal Liu <neal_liu@aspeedtech.com>
---
 .../bindings/bus/aspeed,ast2600-ahbc.yaml     | 39 +++++++++++++++++++
 1 file changed, 39 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml

diff --git a/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml b/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml
new file mode 100644
index 000000000000..ca09eb531666
--- /dev/null
+++ b/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml
@@ -0,0 +1,39 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bus/aspeed,ast2600-ahbc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ASPEED Advanced High-Performance Bus Controller (AHBC) Device Tree Bindings
+
+maintainers:
+  - Neal Liu <neal_liu@aspeedtech.com>
+  - Chia-Wei Wang <chiawei_wang@aspeedtech.com>
+
+description: |
+  Advanced High-performance Bus Controller (AHBC) supports plenty of mechanisms
+  including a priority arbiter, an address decoder and a data multiplexer
+  to control the overall operations of Advanced Highperformance
+  Bus (AHB). AHB is the main system bus for ARM CPU to communicate with the
+  related peripherals.
+
+properties:
+  compatible:
+    enum:
+      - aspeed,ast2600-ahbc
+
+  reg:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: false
+
+examples:
+  - |
+    ahbc: bus@1e600000 {
+        compatible = "aspeed,ast2600-ahbc";
+        reg = <0x1e600000 0x100>;
+    };
-- 
2.25.1


  parent reply	other threads:[~2022-09-02  6:02 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-02  6:00 [PATCH v1 0/4] Add Aspeed ACRY driver for hardware acceleration Neal Liu
2022-09-02  6:00 ` [PATCH v1 1/4] crypto: aspeed: Add ACRY RSA driver Neal Liu
2022-10-05 17:54   ` Anirudh Venkataramanan
2022-10-06  3:43     ` Neal Liu
2022-09-02  6:00 ` [PATCH v1 2/4] ARM: dts: aspeed: Add ACRY/AHBC device controller node Neal Liu
2022-09-02  6:00 ` [PATCH v1 3/4] dt-bindings: crypto: add documentation for Aspeed ACRY Neal Liu
2022-09-07 20:48   ` Rob Herring
2022-09-02  6:00 ` Neal Liu [this message]
2022-09-07 20:50   ` [PATCH v1 4/4] dt-bindings: bus: add documentation for Aspeed AHBC Rob Herring
2022-09-08  3:26     ` Neal Liu

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