* [PATCH 0/2] crypto: hisilicon - fix reg offset issue and cleanup dump information
@ 2024-04-23 1:19 Chenghai Huang
2024-04-23 1:19 ` [PATCH 1/2] crypto: hisilicon/debugfs - mask the unnecessary info from the dump Chenghai Huang
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Chenghai Huang @ 2024-04-23 1:19 UTC (permalink / raw)
To: herbert, davem
Cc: linux-kernel, linux-crypto, fanghao11, liulongfang, shenyang39,
songzhiqi1, qianweili, liushangbin, linwenkai6, taoqi10,
wangzhou1, huangchenghai2
Fix for register offset and cleanup dump information of debugfs.
Chenghai Huang (1):
crypto: hisilicon/debugfs - mask the unnecessary info from the dump
Wenkai Lin (1):
crypto: hisilicon/sec2 - fix for register offset
drivers/crypto/hisilicon/debugfs.c | 29 +++++++++++++++--------
drivers/crypto/hisilicon/hpre/hpre_main.c | 2 +-
drivers/crypto/hisilicon/sec2/sec_main.c | 6 ++---
3 files changed, 23 insertions(+), 14 deletions(-)
--
2.30.0
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 1/2] crypto: hisilicon/debugfs - mask the unnecessary info from the dump
2024-04-23 1:19 [PATCH 0/2] crypto: hisilicon - fix reg offset issue and cleanup dump information Chenghai Huang
@ 2024-04-23 1:19 ` Chenghai Huang
2024-04-23 1:19 ` [PATCH 2/2] crypto: hisilicon/sec2 - fix for register offset Chenghai Huang
2024-05-03 10:54 ` [PATCH 0/2] crypto: hisilicon - fix reg offset issue and cleanup dump information Herbert Xu
2 siblings, 0 replies; 4+ messages in thread
From: Chenghai Huang @ 2024-04-23 1:19 UTC (permalink / raw)
To: herbert, davem
Cc: linux-kernel, linux-crypto, fanghao11, liulongfang, shenyang39,
songzhiqi1, qianweili, liushangbin, linwenkai6, taoqi10,
wangzhou1, huangchenghai2
Some information showed by the dump function is invalid. Mask
the unnecessary information from the dump file.
Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com>
---
drivers/crypto/hisilicon/debugfs.c | 29 +++++++++++++++--------
drivers/crypto/hisilicon/hpre/hpre_main.c | 2 +-
drivers/crypto/hisilicon/sec2/sec_main.c | 4 ++--
3 files changed, 22 insertions(+), 13 deletions(-)
diff --git a/drivers/crypto/hisilicon/debugfs.c b/drivers/crypto/hisilicon/debugfs.c
index 8e7dfdc5b989..1b9b7bccdeff 100644
--- a/drivers/crypto/hisilicon/debugfs.c
+++ b/drivers/crypto/hisilicon/debugfs.c
@@ -13,6 +13,7 @@
#define QM_DFX_COMMON_LEN 0xC3
#define QM_DFX_REGS_LEN 4UL
#define QM_DBG_TMP_BUF_LEN 22
+#define QM_XQC_ADDR_MASK GENMASK(31, 0)
#define CURRENT_FUN_MASK GENMASK(5, 0)
#define CURRENT_Q_MASK GENMASK(31, 16)
#define QM_SQE_ADDR_MASK GENMASK(7, 0)
@@ -167,7 +168,6 @@ static void dump_show(struct hisi_qm *qm, void *info,
static int qm_sqc_dump(struct hisi_qm *qm, char *s, char *name)
{
struct device *dev = &qm->pdev->dev;
- struct qm_sqc *sqc_curr;
struct qm_sqc sqc;
u32 qp_id;
int ret;
@@ -183,6 +183,8 @@ static int qm_sqc_dump(struct hisi_qm *qm, char *s, char *name)
ret = qm_set_and_get_xqc(qm, QM_MB_CMD_SQC, &sqc, qp_id, 1);
if (!ret) {
+ sqc.base_h = cpu_to_le32(QM_XQC_ADDR_MASK);
+ sqc.base_l = cpu_to_le32(QM_XQC_ADDR_MASK);
dump_show(qm, &sqc, sizeof(struct qm_sqc), name);
return 0;
@@ -190,9 +192,10 @@ static int qm_sqc_dump(struct hisi_qm *qm, char *s, char *name)
down_read(&qm->qps_lock);
if (qm->sqc) {
- sqc_curr = qm->sqc + qp_id;
-
- dump_show(qm, sqc_curr, sizeof(*sqc_curr), "SOFT SQC");
+ memcpy(&sqc, qm->sqc + qp_id * sizeof(struct qm_sqc), sizeof(struct qm_sqc));
+ sqc.base_h = cpu_to_le32(QM_XQC_ADDR_MASK);
+ sqc.base_l = cpu_to_le32(QM_XQC_ADDR_MASK);
+ dump_show(qm, &sqc, sizeof(struct qm_sqc), "SOFT SQC");
}
up_read(&qm->qps_lock);
@@ -202,7 +205,6 @@ static int qm_sqc_dump(struct hisi_qm *qm, char *s, char *name)
static int qm_cqc_dump(struct hisi_qm *qm, char *s, char *name)
{
struct device *dev = &qm->pdev->dev;
- struct qm_cqc *cqc_curr;
struct qm_cqc cqc;
u32 qp_id;
int ret;
@@ -218,6 +220,8 @@ static int qm_cqc_dump(struct hisi_qm *qm, char *s, char *name)
ret = qm_set_and_get_xqc(qm, QM_MB_CMD_CQC, &cqc, qp_id, 1);
if (!ret) {
+ cqc.base_h = cpu_to_le32(QM_XQC_ADDR_MASK);
+ cqc.base_l = cpu_to_le32(QM_XQC_ADDR_MASK);
dump_show(qm, &cqc, sizeof(struct qm_cqc), name);
return 0;
@@ -225,9 +229,10 @@ static int qm_cqc_dump(struct hisi_qm *qm, char *s, char *name)
down_read(&qm->qps_lock);
if (qm->cqc) {
- cqc_curr = qm->cqc + qp_id;
-
- dump_show(qm, cqc_curr, sizeof(*cqc_curr), "SOFT CQC");
+ memcpy(&cqc, qm->cqc + qp_id * sizeof(struct qm_cqc), sizeof(struct qm_cqc));
+ cqc.base_h = cpu_to_le32(QM_XQC_ADDR_MASK);
+ cqc.base_l = cpu_to_le32(QM_XQC_ADDR_MASK);
+ dump_show(qm, &cqc, sizeof(struct qm_cqc), "SOFT CQC");
}
up_read(&qm->qps_lock);
@@ -263,6 +268,10 @@ static int qm_eqc_aeqc_dump(struct hisi_qm *qm, char *s, char *name)
if (ret)
return ret;
+ aeqc.base_h = cpu_to_le32(QM_XQC_ADDR_MASK);
+ aeqc.base_l = cpu_to_le32(QM_XQC_ADDR_MASK);
+ eqc.base_h = cpu_to_le32(QM_XQC_ADDR_MASK);
+ eqc.base_l = cpu_to_le32(QM_XQC_ADDR_MASK);
dump_show(qm, xeqc, size, name);
return ret;
@@ -310,10 +319,10 @@ static int q_dump_param_parse(struct hisi_qm *qm, char *s,
static int qm_sq_dump(struct hisi_qm *qm, char *s, char *name)
{
- u16 sq_depth = qm->qp_array->cq_depth;
- void *sqe;
+ u16 sq_depth = qm->qp_array->sq_depth;
struct hisi_qp *qp;
u32 qp_id, sqe_id;
+ void *sqe;
int ret;
ret = q_dump_param_parse(qm, s, &sqe_id, &qp_id, sq_depth);
diff --git a/drivers/crypto/hisilicon/hpre/hpre_main.c b/drivers/crypto/hisilicon/hpre/hpre_main.c
index 25b44416da45..10aa4da93323 100644
--- a/drivers/crypto/hisilicon/hpre/hpre_main.c
+++ b/drivers/crypto/hisilicon/hpre/hpre_main.c
@@ -106,7 +106,7 @@
#define HPRE_SHAPER_TYPE_RATE 640
#define HPRE_VIA_MSI_DSM 1
#define HPRE_SQE_MASK_OFFSET 8
-#define HPRE_SQE_MASK_LEN 24
+#define HPRE_SQE_MASK_LEN 44
#define HPRE_CTX_Q_NUM_DEF 1
#define HPRE_DFX_BASE 0x301000
diff --git a/drivers/crypto/hisilicon/sec2/sec_main.c b/drivers/crypto/hisilicon/sec2/sec_main.c
index 853b1cb85016..6eba1f22720f 100644
--- a/drivers/crypto/hisilicon/sec2/sec_main.c
+++ b/drivers/crypto/hisilicon/sec2/sec_main.c
@@ -99,8 +99,8 @@
#define SEC_DBGFS_VAL_MAX_LEN 20
#define SEC_SINGLE_PORT_MAX_TRANS 0x2060
-#define SEC_SQE_MASK_OFFSET 64
-#define SEC_SQE_MASK_LEN 48
+#define SEC_SQE_MASK_OFFSET 16
+#define SEC_SQE_MASK_LEN 108
#define SEC_SHAPER_TYPE_RATE 400
#define SEC_DFX_BASE 0x301000
--
2.30.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] crypto: hisilicon/sec2 - fix for register offset
2024-04-23 1:19 [PATCH 0/2] crypto: hisilicon - fix reg offset issue and cleanup dump information Chenghai Huang
2024-04-23 1:19 ` [PATCH 1/2] crypto: hisilicon/debugfs - mask the unnecessary info from the dump Chenghai Huang
@ 2024-04-23 1:19 ` Chenghai Huang
2024-05-03 10:54 ` [PATCH 0/2] crypto: hisilicon - fix reg offset issue and cleanup dump information Herbert Xu
2 siblings, 0 replies; 4+ messages in thread
From: Chenghai Huang @ 2024-04-23 1:19 UTC (permalink / raw)
To: herbert, davem
Cc: linux-kernel, linux-crypto, fanghao11, liulongfang, shenyang39,
songzhiqi1, qianweili, liushangbin, linwenkai6, taoqi10,
wangzhou1, huangchenghai2
From: Wenkai Lin <linwenkai6@hisilicon.com>
The offset of SEC_CORE_ENABLE_BITMAP should be 0 instead of 32,
it cause a kasan shift-out-bounds warning, fix it.
Signed-off-by: Wenkai Lin <linwenkai6@hisilicon.com>
---
drivers/crypto/hisilicon/sec2/sec_main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/hisilicon/sec2/sec_main.c b/drivers/crypto/hisilicon/sec2/sec_main.c
index 6eba1f22720f..75aad04ffe5e 100644
--- a/drivers/crypto/hisilicon/sec2/sec_main.c
+++ b/drivers/crypto/hisilicon/sec2/sec_main.c
@@ -152,7 +152,7 @@ static const struct hisi_qm_cap_info sec_basic_info[] = {
{SEC_CORE_TYPE_NUM_CAP, 0x313c, 16, GENMASK(3, 0), 0x1, 0x1, 0x1},
{SEC_CORE_NUM_CAP, 0x313c, 8, GENMASK(7, 0), 0x4, 0x4, 0x4},
{SEC_CORES_PER_CLUSTER_NUM_CAP, 0x313c, 0, GENMASK(7, 0), 0x4, 0x4, 0x4},
- {SEC_CORE_ENABLE_BITMAP, 0x3140, 32, GENMASK(31, 0), 0x17F, 0x17F, 0xF},
+ {SEC_CORE_ENABLE_BITMAP, 0x3140, 0, GENMASK(31, 0), 0x17F, 0x17F, 0xF},
{SEC_DRV_ALG_BITMAP_LOW, 0x3144, 0, GENMASK(31, 0), 0x18050CB, 0x18050CB, 0x18670CF},
{SEC_DRV_ALG_BITMAP_HIGH, 0x3148, 0, GENMASK(31, 0), 0x395C, 0x395C, 0x395C},
{SEC_DEV_ALG_BITMAP_LOW, 0x314c, 0, GENMASK(31, 0), 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF},
--
2.30.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 0/2] crypto: hisilicon - fix reg offset issue and cleanup dump information
2024-04-23 1:19 [PATCH 0/2] crypto: hisilicon - fix reg offset issue and cleanup dump information Chenghai Huang
2024-04-23 1:19 ` [PATCH 1/2] crypto: hisilicon/debugfs - mask the unnecessary info from the dump Chenghai Huang
2024-04-23 1:19 ` [PATCH 2/2] crypto: hisilicon/sec2 - fix for register offset Chenghai Huang
@ 2024-05-03 10:54 ` Herbert Xu
2 siblings, 0 replies; 4+ messages in thread
From: Herbert Xu @ 2024-05-03 10:54 UTC (permalink / raw)
To: Chenghai Huang
Cc: davem, linux-kernel, linux-crypto, fanghao11, liulongfang,
shenyang39, songzhiqi1, qianweili, liushangbin, linwenkai6,
taoqi10, wangzhou1
On Tue, Apr 23, 2024 at 09:19:20AM +0800, Chenghai Huang wrote:
> Fix for register offset and cleanup dump information of debugfs.
>
> Chenghai Huang (1):
> crypto: hisilicon/debugfs - mask the unnecessary info from the dump
>
> Wenkai Lin (1):
> crypto: hisilicon/sec2 - fix for register offset
>
> drivers/crypto/hisilicon/debugfs.c | 29 +++++++++++++++--------
> drivers/crypto/hisilicon/hpre/hpre_main.c | 2 +-
> drivers/crypto/hisilicon/sec2/sec_main.c | 6 ++---
> 3 files changed, 23 insertions(+), 14 deletions(-)
>
> --
> 2.30.0
All applied. Thanks.
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
^ permalink raw reply [flat|nested] 4+ messages in thread
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2024-04-23 1:19 ` [PATCH 2/2] crypto: hisilicon/sec2 - fix for register offset Chenghai Huang
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