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* Re: [PATCH v3 1/1] target/riscv: add vector integer operations
       [not found] <20200226024352.7719-1-zhiwei_liu@c-sky.com>
@ 2020-02-28  5:46 ` Richard Henderson
  2020-02-28  6:19   ` LIU Zhiwei
  0 siblings, 1 reply; 2+ messages in thread
From: Richard Henderson @ 2020-02-28  5:46 UTC (permalink / raw)
  To: LIU Zhiwei, alistair23, chihmin.chao, palmer
  Cc: wenmeng_zhang, wxy194768, linux-csky, qemu-devel, qemu-riscv

On 2/25/20 6:43 PM, LIU Zhiwei wrote:
> Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
> ---
>  target/riscv/helper.h                   |  395 +++++++
>  target/riscv/insn32.decode              |  127 +++
>  target/riscv/insn_trans/trans_rvv.inc.c |  671 +++++++++++-
>  target/riscv/vector_helper.c            | 1308 ++++++++++++++++++++++-
>  4 files changed, 2462 insertions(+), 39 deletions(-)

This patch is too large and needs splitting.

> -static bool vext_check_overlap_mask(DisasContext *s, uint32_t vd, bool vm)
> +static bool vext_check_overlap_mask(DisasContext *s, uint32_t vd, bool vm,
> +    bool widen)
>  {
> -    return !(s->lmul > 1 && vm == 0 && vd == 0);
> +    return (vm != 0 || vd != 0) ? true : (!widen && (s->lmul == 0));
>  }
>  

Best to move the addition of widen back to the patch that introduced this function.

The "? true :" is a funny way to write ||.


r~

^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [PATCH v3 1/1] target/riscv: add vector integer operations
  2020-02-28  5:46 ` [PATCH v3 1/1] target/riscv: add vector integer operations Richard Henderson
@ 2020-02-28  6:19   ` LIU Zhiwei
  0 siblings, 0 replies; 2+ messages in thread
From: LIU Zhiwei @ 2020-02-28  6:19 UTC (permalink / raw)
  To: Richard Henderson, alistair23, chihmin.chao, palmer
  Cc: wenmeng_zhang, wxy194768, linux-csky, qemu-devel, qemu-riscv



On 2020/2/28 13:46, Richard Henderson wrote:
> On 2/25/20 6:43 PM, LIU Zhiwei wrote:
>> Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
>> ---
>>   target/riscv/helper.h                   |  395 +++++++
>>   target/riscv/insn32.decode              |  127 +++
>>   target/riscv/insn_trans/trans_rvv.inc.c |  671 +++++++++++-
>>   target/riscv/vector_helper.c            | 1308 ++++++++++++++++++++++-
>>   4 files changed, 2462 insertions(+), 39 deletions(-)
> This patch is too large and needs splitting.
OK.
>> -static bool vext_check_overlap_mask(DisasContext *s, uint32_t vd, bool vm)
>> +static bool vext_check_overlap_mask(DisasContext *s, uint32_t vd, bool vm,
>> +    bool widen)
>>   {
>> -    return !(s->lmul > 1 && vm == 0 && vd == 0);
>> +    return (vm != 0 || vd != 0) ? true : (!widen && (s->lmul == 0));
>>   }
>>   
> Best to move the addition of widen back to the patch that introduced this function.
>
> The "? true :" is a funny way to write ||.
Oh yes. I did not notice it.
>
> r~


^ permalink raw reply	[flat|nested] 2+ messages in thread

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2020-02-28  5:46 ` [PATCH v3 1/1] target/riscv: add vector integer operations Richard Henderson
2020-02-28  6:19   ` LIU Zhiwei

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