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From: Dan Williams <dan.j.williams@intel.com>
To: linux-cxl@vger.kernel.org
Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com>,
	vishal.l.verma@intel.com, dave.jiang@intel.com,
	ira.weiny@intel.com, alison.schofield@intel.com
Subject: [ndctl PATCH 1/6] cxl/test: Validate endpoint interleave geometry
Date: Fri, 05 Aug 2022 13:37:56 -0700	[thread overview]
Message-ID: <165973187660.1528532.13832323649814892720.stgit@dwillia2-xfh.jf.intel.com> (raw)
In-Reply-To: <165973187080.1528532.8097010788284626448.stgit@dwillia2-xfh.jf.intel.com>

Check that endpoint interleave geometry settings are updated once the
endpoint decoders are associated with a region.

Reported-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
---
 test/cxl-region-sysfs.sh |   20 ++++++++++++++++++--
 1 file changed, 18 insertions(+), 2 deletions(-)

diff --git a/test/cxl-region-sysfs.sh b/test/cxl-region-sysfs.sh
index 2582edb3f306..110e03709e39 100644
--- a/test/cxl-region-sysfs.sh
+++ b/test/cxl-region-sysfs.sh
@@ -44,8 +44,8 @@ uuidgen > /sys/bus/cxl/devices/$region/uuid
 # setup interleave geometry
 nr_targets=${#endpoint[@]}
 echo $nr_targets > /sys/bus/cxl/devices/$region/interleave_ways
-g=$(cat /sys/bus/cxl/devices/$decoder/interleave_granularity)
-echo $g > /sys/bus/cxl/devices/$region/interleave_granularity
+r_ig=$(cat /sys/bus/cxl/devices/$decoder/interleave_granularity)
+echo $r_ig > /sys/bus/cxl/devices/$region/interleave_granularity
 echo $((nr_targets * (256<<20))) > /sys/bus/cxl/devices/$region/size
 
 # grab the list of memdevs grouped by host-bridge interleave position
@@ -96,6 +96,22 @@ do
 done
 echo "$region added ${#endpoint[@]} targets: ${endpoint[@]}"
 
+# validate all endpoint decoders have the correct setting
+region_size=$(cat /sys/bus/cxl/devices/$region/size)
+region_base=$(cat /sys/bus/cxl/devices/$region/resource)
+for i in ${endpoint[@]}
+do
+	iw=$(cat /sys/bus/cxl/devices/$i/interleave_ways)
+	ig=$(cat /sys/bus/cxl/devices/$i/interleave_granularity)
+	[ $iw -ne $nr_targets ] && err "$LINENO: decoder: $i iw: $iw targets: $nr_targets"
+	[ $ig -ne $r_ig] && err "$LINENO: decoder: $i ig: $ig root ig: $r_ig"
+
+	sz=$(cat /sys/bus/cxl/devices/$i/size)
+	res=$(cat /sys/bus/cxl/devices/$i/start)
+	[ $sz -ne $region_size ] && err "$LINENO: decoder: $i sz: $sz region_size: $region_size"
+	[ $res -ne $region_base ] && err "$LINENO: decoder: $i base: $res region_base: $region_base"
+done
+
 # walk up the topology and commit all decoders
 echo 1 > /sys/bus/cxl/devices/$region/commit
 


  reply	other threads:[~2022-08-05 20:38 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-05 20:37 [ndctl PATCH 0/6] cxl/test: Add more region ABI validation Dan Williams
2022-08-05 20:37 ` Dan Williams [this message]
2022-08-05 20:38 ` [ndctl PATCH 2/6] cxl/list: Add interleave parameters to decoder listings Dan Williams
2022-08-05 20:38 ` [ndctl PATCH 3/6] cxl/list: Add region " Dan Williams
2022-08-05 20:38 ` [ndctl PATCH 4/6] cxl/list: Filter decoders by region Dan Williams
2022-08-05 20:38 ` [ndctl PATCH 5/6] cxl/list: Add 'depth' to port listings Dan Williams
2022-08-05 20:38 ` [ndctl PATCH 6/6] cxl/test: Validate switch port settings in cxl-region-sysfs.sh Dan Williams
2022-09-20 21:19 ` [ndctl PATCH 0/6] cxl/test: Add more region ABI validation Dave Jiang

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