[GIT PULL] Compute Express Link (CXL) Fixes for 6.3-rc6

* [GIT PULL] Compute Express Link (CXL) Fixes for 6.3-rc6
@ 2023-04-09  7:31 Dan Williams
  2023-04-09 17:17 ` pr-tracker-bot
  0 siblings, 1 reply; 2+ messages in thread
From: Dan Williams @ 2023-04-09  7:31 UTC (permalink / raw)
  To: torvalds; +Cc: linux-cxl, linux-pci

Hi Linus, please pull from:

  git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl tags/cxl-fixes-6.3-rc6

...to receive several fixes for driver startup regressions that landed
in v6.3-rc1 as well as some older bugs.

The regressions were due to a lack of testing with what the CXL
specification calls Restricted CXL Host (RCH) topologies compared to the
testing with Virtual Host (VH) CXL topologies. A VH topology is typical
PCIe while RCH topologies map CXL endpoints as Root Complex Integrated
endpoints. The impact is some driver crashes on startup.

v6.3-rc1 also added compatibility for range registers (the mechanism
that CXL 1.1 defined for mapping memory) to treat them like HDM decoders
(the mechanism that CXL 2.0 defined for mapping Host-managed Device
Memory). That work collided with the new region enumeration code that
was tested with CXL 2.0 setups, and fails with crashes at startup.

Lastly, the DOE (Data Object Exchange) implementation for retrieving an
ACPI-like data table from CXL devices is being reworked for v6.4.
Several fixes fell out of that work that are suitable for v6.3.

All of this has been in linux-next for a while, and all reported issues
[1] have been addressed.

[1]: http://lore.kernel.org/r/20230405075704.33de8121@canb.auug.org.au

---

The following changes since commit e8d018dd0257f744ca50a729e3d042cf2ec9da65:

  Linux 6.3-rc3 (2023-03-19 13:27:55 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl tags/cxl-fixes-6.3-rc6

for you to fetch changes up to ca712e47054678c5ce93a0e0f686353ad5561195:

  Merge branch 'for-6.3/cxl-doe-fixes' into for-6.3/cxl (2023-04-04 15:37:25 -0700)

----------------------------------------------------------------
cxl fixes for v6.3-rc6

- Fix several issues with region enumeration in RCH topologies that can
  trigger crashes on driver startup or shutdown.

- Fix CXL DVSEC range register compatibility versus region enumeration
  that leads to startup crashes

- Fix CDAT endiannes handling

- Fix multiple buffer handling boundary conditions

- Fix Data Object Exchange (DOE) workqueue usage vs CONFIG_DEBUG_OBJECTS
  warn splats

----------------------------------------------------------------
Dan Williams (8):
      cxl/hdm: Fix double allocation of @cxlhdm
      cxl/hdm: Skip emulation when driver manages mem_enable
      cxl/port: Fix find_cxl_root() for RCDs and simplify it
      cxl/region: Fix region setup/teardown for RCDs
      cxl/region: Move coherence tracking into cxl_region_attach()
      cxl/hdm: Limit emulation to the number of range registers
      cxl/hdm: Extend DVSEC range register emulation for region enumeration
      Merge branch 'for-6.3/cxl-doe-fixes' into for-6.3/cxl

Lukas Wunner (6):
      cxl/pci: Fix CDAT retrieval on big endian
      cxl/pci: Handle truncated CDAT header
      cxl/pci: Handle truncated CDAT entries
      cxl/pci: Handle excessive CDAT length
      PCI/DOE: Silence WARN splat with CONFIG_DEBUG_OBJECTS=y
      PCI/DOE: Fix memory leak with CONFIG_DEBUG_OBJECTS=y

 drivers/cxl/core/hdm.c    | 126 +++++++++++++++++++++++++---------------------
 drivers/cxl/core/pci.c    |  38 ++++++++------
 drivers/cxl/core/pmem.c   |   6 +--
 drivers/cxl/core/port.c   |  38 +++-----------
 drivers/cxl/core/region.c |  33 ++++++++++--
 drivers/cxl/cxl.h         |   8 +--
 drivers/cxl/cxlpci.h      |  14 ++++++
 drivers/cxl/port.c        |   4 +-
 drivers/pci/doe.c         |  30 ++++++-----
 include/linux/pci-doe.h   |   8 ++-
 10 files changed, 175 insertions(+), 130 deletions(-)

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