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From: Ben Widawsky <>
Cc: Ben Widawsky <>,,
	Alison Schofield <>,
	Dan Williams <>,
	Ira Weiny <>,
	Jonathan Cameron <>,
	Vishal Verma <>
Subject: [PATCH] cxl: Rename mem to pci
Date: Tue,  4 May 2021 11:57:31 -0700	[thread overview]
Message-ID: <> (raw)

In preparation for introducing a new driver for the CXL.mem / HDM
decoder (Host-managed Device Memory) capabilities of a CXL memory
expander, rename mem.c to pci.c so that mem.c is available for this new

CXL capabilities exist in a parallel domain to PCIe. CXL devices are
enumerable and controllable via "legacy" PCIe mechanisms; however, their
CXL capabilities are a superset of PCIe. For example, a CXL device may
be connected to a non-CXL capable PCIe root port, and therefore will not
be able to participate in CXL.mem or CXL.cache operations, but can still
be accessed through PCIe mechanisms for operations.

To date, all existing drivers/cxl/ functionality is in support of the
PCIe-only based mechanisms, and due to the aforementioned distinction it
makes sense to move to a new file.

The result of the change is that a systems administrator may load only
the cxl_pci module and gain access to such operations as, firmware
update, offline provisioning of devices, and error collection. In
addition to freeing up the file name for another purpose, there are two
primary reasons this is useful,
    1. Acting upon devices which don't have full CXL capabilities. This
       may happen for instance if the CXL device is connected in a CXL
       unaware part of the platform topology.
    2. Userspace-first provisioning for devices without kernel driver
       interference. This may be useful when provisioning a new device
       in a specific manner that might otherwise be blocked or prevented
       by the real CXL mem driver.

Signed-off-by: Ben Widawsky <>
 Documentation/driver-api/cxl/memory-devices.rst |  6 +++---
 drivers/cxl/Kconfig                             | 13 ++++---------
 drivers/cxl/Makefile                            |  4 ++--
 drivers/cxl/{mem.c => pci.c}                    |  9 ++++-----
 4 files changed, 13 insertions(+), 19 deletions(-)
 rename drivers/cxl/{mem.c => pci.c} (99%)

diff --git a/Documentation/driver-api/cxl/memory-devices.rst b/Documentation/driver-api/cxl/memory-devices.rst
index 1bad466f9167..3876ee5fea53 100644
--- a/Documentation/driver-api/cxl/memory-devices.rst
+++ b/Documentation/driver-api/cxl/memory-devices.rst
@@ -22,10 +22,10 @@ This section covers the driver infrastructure for a CXL memory device.
 CXL Memory Device
-.. kernel-doc:: drivers/cxl/mem.c
-   :doc: cxl mem
+.. kernel-doc:: drivers/cxl/pci.c
+   :doc: cxl pci
-.. kernel-doc:: drivers/cxl/mem.c
+.. kernel-doc:: drivers/cxl/pci.c
 CXL Bus
diff --git a/drivers/cxl/Kconfig b/drivers/cxl/Kconfig
index 97dc4d751651..5483ba92b6da 100644
--- a/drivers/cxl/Kconfig
+++ b/drivers/cxl/Kconfig
@@ -21,15 +21,10 @@ config CXL_MEM
 	  as if the memory was attached to the typical CPU memory
-	  Say 'y/m' to enable a driver (named "cxl_mem.ko" when built as
-	  a module) that will attach to CXL.mem devices for
-	  configuration, provisioning, and health monitoring. This
-	  driver is required for dynamic provisioning of CXL.mem
-	  attached memory which is a prerequisite for persistent memory
-	  support. Typically volatile memory is mapped by platform
-	  firmware and included in the platform memory map, but in some
-	  cases the OS is responsible for mapping that memory. See
-	  Chapter 2.3 Type 3 CXL Device in the CXL 2.0 specification.
+	  Say 'y/m' to enable a driver that will attach to CXL.mem devices for
+	  configuration and management primarily via the mailbox interface. See
+	  Chapter 2.3 Type 3 CXL Device in the CXL 2.0 specification for more
+	  details.
 	  If unsure say 'm'.
diff --git a/drivers/cxl/Makefile b/drivers/cxl/Makefile
index a314a1891f4d..22a0ca59ab1b 100644
--- a/drivers/cxl/Makefile
+++ b/drivers/cxl/Makefile
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0
 obj-$(CONFIG_CXL_BUS) += cxl_bus.o
-obj-$(CONFIG_CXL_MEM) += cxl_mem.o
+obj-$(CONFIG_CXL_MEM) += cxl_pci.o
 cxl_bus-y := bus.o
-cxl_mem-y := mem.o
+cxl_pci-y := pci.o
diff --git a/drivers/cxl/mem.c b/drivers/cxl/pci.c
similarity index 99%
rename from drivers/cxl/mem.c
rename to drivers/cxl/pci.c
index 2acc6173da36..48fb3f56fc8f 100644
--- a/drivers/cxl/mem.c
+++ b/drivers/cxl/pci.c
@@ -15,10 +15,11 @@
 #include "cxl.h"
- * DOC: cxl mem
+ * DOC: cxl pci
- * This implements a CXL memory device ("type-3") as it is defined by the
- * Compute Express Link specification.
+ * This implements the PCI exclusive functionality for a CXL device as it is
+ * defined by the Compute Express Link specification. CXL devices may surface
+ * certain functionality even if it isn't CXL enabled.
  * The driver has several responsibilities, mainly:
  *  - Create the memX device and register on the CXL bus.
@@ -26,8 +27,6 @@
  *  - Probe the device attributes to establish sysfs interface.
  *  - Provide an IOCTL interface to userspace to communicate with the device for
  *    things like firmware update.
- *  - Support management of interleave sets.
- *  - Handle and manage error conditions.

             reply	other threads:[~2021-05-04 18:57 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-04 18:57 Ben Widawsky [this message]
2021-05-10 17:29 ` [PATCH] cxl: Rename mem to pci Jonathan Cameron
2021-05-20 18:41   ` [PATCH v2] " Ben Widawsky
2021-05-20 19:39     ` Dan Williams
2021-05-26 17:44       ` [PATCH v3] " Ben Widawsky
2021-05-26 18:01         ` Ben Widawsky

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