From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
To: qemu-devel@nongnu.org, "Alex Bennée" <alex.bennee@linaro.org>,
"Marcel Apfelbaum" <marcel@redhat.com>,
"Michael S . Tsirkin" <mst@redhat.com>,
"Igor Mammedov" <imammedo@redhat.com>
Cc: linux-cxl@vger.kernel.org,
"Ben Widawsky" <ben.widawsky@intel.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
linuxarm@huawei.com,
"Shameerali Kolothum Thodi"
<shameerali.kolothum.thodi@huawei.com>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Saransh Gupta1" <saransh@ibm.com>,
"Shreyas Shah" <shreyas.shah@elastics.cloud>,
"Chris Browy" <cbrowy@avery-design.com>,
"Samarth Saxena" <samarths@cadence.com>,
"Dan Williams" <dan.j.williams@intel.com>
Subject: [PATCH v5 16/43] tests/acpi: Add update DSDT.viot
Date: Wed, 2 Feb 2022 14:10:10 +0000 [thread overview]
Message-ID: <20220202141037.17352-17-Jonathan.Cameron@huawei.com> (raw)
In-Reply-To: <20220202141037.17352-1-Jonathan.Cameron@huawei.com>
From: Jonathan Cameron <jonathan.cameron@huawei.com>
The consolidation of DSDT AML generation for PCI host bridges
lead to some minor ordering changes and the addition of _ADR
with a default of 0 for those case that didn't already have it.
Only DSDT.viot test is affected.
Changes all similar to:
Scope (\_SB)
{
Device (PC30)
{
- Name (_UID, 0x30) // _UID: Unique ID
Name (_BBN, 0x30) // _BBN: BIOS Bus Number
Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID
Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID
+ Name (_ADR, Zero) // _ADR: Address
+ Name (_UID, 0x30) // _UID: Unique ID
Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities
Signed-off-by: Jonathan Cameron <jonathan.cameron@huawei.com>
---
tests/data/acpi/q35/DSDT.viot | Bin 9398 -> 9416 bytes
tests/qtest/bios-tables-test-allowed-diff.h | 1 -
2 files changed, 1 deletion(-)
diff --git a/tests/data/acpi/q35/DSDT.viot b/tests/data/acpi/q35/DSDT.viot
index 1c3b4da5cbe81ecab5e1ef50d383b561c5e0f55f..207ac5b9ae4c3a4bc0094c2242d1a1b08771b784 100644
GIT binary patch
delta 139
zcmdnydBT&+CD<k8gbD)#<CBeCu5zLdVlnZ-PVv!A?xF$C#s(bmPELMY6KfQhxC}No
z$Z0Y1qbM*kn0!E9nwKNq(Itq1BR<sAg-ZdbOrCM_F9mK?rG^HRr4><?3V@Yv4pmBI
F0sxp4B{u*7
delta 143
zcmX@%xy_TyCD<ion+gL1<MNGMu5zMYqA~HoPVv!Aj-mn1#s(bmp`I>WlVjy%CeC%7
z+^Kj^(SX5#0jQdxl0g7Ptr1kM!sPw((lEse3<_8k8$uNeOjb|?Dc;<vXwM7)8)+to
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index 08a8095432..dfb8523c8b 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1,2 +1 @@
/* List of comma-separated changed AML files to ignore */
-"tests/data/acpi/q35/DSDT.viot",
--
2.32.0
next prev parent reply other threads:[~2022-02-02 14:18 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-02 14:09 [PATCH v5 00/43] CXl 2.0 emulation Support Jonathan Cameron
2022-02-02 14:09 ` [PATCH v5 01/43] hw/pci/cxl: Add a CXL component type (interface) Jonathan Cameron
2022-02-02 14:09 ` [PATCH v5 02/43] hw/cxl/component: Introduce CXL components (8.1.x, 8.2.5) Jonathan Cameron
2022-02-02 14:09 ` [PATCH v5 03/43] MAINTAINERS: Add entry for Compute Express Link Emulation Jonathan Cameron
2022-02-02 14:09 ` [PATCH v5 04/43] hw/cxl/device: Introduce a CXL device (8.2.8) Jonathan Cameron
2022-02-02 14:09 ` [PATCH v5 05/43] hw/cxl/device: Implement the CAP array (8.2.8.1-2) Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 06/43] hw/cxl/device: Implement basic mailbox (8.2.8.4) Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 07/43] hw/cxl/device: Add memory device utilities Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 08/43] hw/cxl/device: Add cheap EVENTS implementation (8.2.9.1) Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 09/43] hw/cxl/device: Timestamp implementation (8.2.9.3) Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 10/43] hw/cxl/device: Add log commands (8.2.9.4) + CEL Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 11/43] hw/pxb: Use a type for realizing expanders Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 12/43] hw/pci/cxl: Create a CXL bus type Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 13/43] hw/pxb: Allow creation of a CXL PXB (host bridge) Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 14/43] tests/acpi: allow DSDT.viot table changes Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 15/43] acpi/pci: Consolidate host bridge setup Jonathan Cameron
2022-02-02 14:10 ` Jonathan Cameron [this message]
2022-02-04 14:01 ` [PATCH v5 16/43] tests/acpi: Add update DSDT.viot Michael S. Tsirkin
2022-02-07 15:10 ` Igor Mammedov
2022-02-07 18:19 ` Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 17/43] cxl: Machine level control on whether CXL support is enabled Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 18/43] hw/cxl/component: Implement host bridge MMIO (8.2.5, table 142) Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 19/43] hw/cxl/rp: Add a root port Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 20/43] hw/cxl/device: Add a memory device (8.2.8.5) Jonathan Cameron
2022-02-11 15:50 ` Ben Widawsky
2022-02-11 16:45 ` Jonathan Cameron
2022-02-11 16:52 ` Ben Widawsky
2022-02-02 14:10 ` [PATCH v5 21/43] hw/cxl/device: Implement MMIO HDM decoding (8.2.5.12) Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 22/43] acpi/cxl: Add _OSC implementation (9.14.2) Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 23/43] tests/acpi: allow CEDT table addition Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 24/43] acpi/cxl: Create the CEDT (9.14.1) Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 25/43] hw/cxl/device: Add some trivial commands Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 26/43] hw/cxl/device: Plumb real Label Storage Area (LSA) sizing Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 27/43] hw/cxl/device: Implement get/set Label Storage Area (LSA) Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 28/43] hw/cxl/component: Add utils for interleave parameter encoding/decoding Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 29/43] hw/cxl/host: Add support for CXL Fixed Memory Windows Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 30/43] acpi/cxl: Introduce CFMWS structures in CEDT Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 31/43] hw/pci-host/gpex-acpi: Add support for dsdt construction for pxb-cxl Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 32/43] pci/pcie_port: Add pci_find_port_by_pn() Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 33/43] CXL/cxl_component: Add cxl_get_hb_cstate() Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 34/43] mem/cxl_type3: Add read and write functions for associated hostmem Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 35/43] cxl/cxl-host: Add memops for CFMWS region Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 36/43] arm/virt: Allow virt/CEDT creation Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 37/43] hw/arm/virt: Basic CXL enablement on pci_expander_bridge instances pxb-cxl Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 38/43] RFC: softmmu/memory: Add ops to memory_region_ram_init_from_file Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 39/43] hw/cxl/component Add a dumb HDM decoder handler Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 40/43] i386/pc: Enable CXL fixed memory windows Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 41/43] qtest/acpi: Add reference CEDT tables Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 42/43] qtest/cxl: Add very basic sanity tests Jonathan Cameron
2022-02-02 14:10 ` [PATCH v5 43/43] scripts/device-crash-test: Add exception for pxb-cxl Jonathan Cameron
2022-02-04 14:03 ` [PATCH v5 00/43] CXl 2.0 emulation Support Michael S. Tsirkin
2022-02-04 14:27 ` Michael S. Tsirkin
2022-02-04 18:23 ` Jonathan Cameron
2022-02-07 14:20 ` Jonathan Cameron
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