* [PATCH v9 1/6] cxl/mbox: Add GET_POISON_LIST mailbox command
2023-03-20 4:31 [PATCH v9 0/6] CXL Poison List Retrieval & Tracing alison.schofield
@ 2023-03-20 4:31 ` alison.schofield
2023-03-20 4:31 ` [PATCH v9 2/6] cxl/trace: Add TRACE support for CXL media-error records alison.schofield
` (4 subsequent siblings)
5 siblings, 0 replies; 12+ messages in thread
From: alison.schofield @ 2023-03-20 4:31 UTC (permalink / raw)
To: Dan Williams, Ira Weiny, Vishal Verma, Dave Jiang, Ben Widawsky,
Steven Rostedt
Cc: Alison Schofield, linux-cxl, linux-kernel, Jonathan Cameron
From: Alison Schofield <alison.schofield@intel.com>
CXL devices maintain a list of locations that are poisoned or result
in poison if the addresses are accessed by the host.
Per the spec (CXL 3.0 8.2.9.8.4.1), the device returns this Poison
list as a set of Media Error Records that include the source of the
error, the starting device physical address and length. The length is
the number of adjacent DPAs in the record and is in units of 64 bytes.
Retrieve the poison list.
Signed-off-by: Alison Schofield <alison.schofield@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
---
drivers/cxl/core/mbox.c | 72 +++++++++++++++++++++++++++++++++++++++++
drivers/cxl/cxlmem.h | 67 ++++++++++++++++++++++++++++++++++++++
drivers/cxl/pci.c | 4 +++
3 files changed, 143 insertions(+)
diff --git a/drivers/cxl/core/mbox.c b/drivers/cxl/core/mbox.c
index f2addb457172..0da0a30511f2 100644
--- a/drivers/cxl/core/mbox.c
+++ b/drivers/cxl/core/mbox.c
@@ -5,6 +5,8 @@
#include <linux/debugfs.h>
#include <linux/ktime.h>
#include <linux/mutex.h>
+#include <asm/unaligned.h>
+#include <cxlpci.h>
#include <cxlmem.h>
#include <cxl.h>
@@ -994,6 +996,7 @@ int cxl_dev_state_identify(struct cxl_dev_state *cxlds)
/* See CXL 2.0 Table 175 Identify Memory Device Output Payload */
struct cxl_mbox_identify id;
struct cxl_mbox_cmd mbox_cmd;
+ u32 val;
int rc;
mbox_cmd = (struct cxl_mbox_cmd) {
@@ -1017,6 +1020,11 @@ int cxl_dev_state_identify(struct cxl_dev_state *cxlds)
cxlds->lsa_size = le32_to_cpu(id.lsa_size);
memcpy(cxlds->firmware_version, id.fw_revision, sizeof(id.fw_revision));
+ if (test_bit(CXL_MEM_COMMAND_ID_GET_POISON, cxlds->enabled_cmds)) {
+ val = get_unaligned_le24(id.poison_list_max_mer);
+ cxlds->poison.max_errors = min_t(u32, val, CXL_POISON_LIST_MAX);
+ }
+
return 0;
}
EXPORT_SYMBOL_NS_GPL(cxl_dev_state_identify, CXL);
@@ -1107,6 +1115,70 @@ int cxl_set_timestamp(struct cxl_dev_state *cxlds)
}
EXPORT_SYMBOL_NS_GPL(cxl_set_timestamp, CXL);
+int cxl_mem_get_poison(struct cxl_memdev *cxlmd, u64 offset, u64 len,
+ struct cxl_region *cxlr)
+{
+ struct cxl_dev_state *cxlds = cxlmd->cxlds;
+ struct cxl_mbox_poison_payload_out *po;
+ struct cxl_mbox_poison_payload_in pi;
+ struct cxl_mbox_cmd mbox_cmd;
+ int nr_records = 0;
+ int rc;
+
+ rc = mutex_lock_interruptible(&cxlds->poison.lock);
+ if (rc)
+ return rc;
+
+ po = cxlds->poison.payload_out;
+ pi.offset = cpu_to_le64(offset);
+ pi.length = cpu_to_le64(len / CXL_POISON_LEN_MULT);
+
+ mbox_cmd = (struct cxl_mbox_cmd) {
+ .opcode = CXL_MBOX_OP_GET_POISON,
+ .size_in = sizeof(pi),
+ .payload_in = &pi,
+ .size_out = cxlds->payload_size,
+ .payload_out = po,
+ .min_out = struct_size(po, record, 0),
+ };
+
+ do {
+ rc = cxl_internal_send_cmd(cxlds, &mbox_cmd);
+ if (rc)
+ break;
+
+ /* TODO TRACE the media error records */
+
+ /* Protect against an uncleared _FLAG_MORE */
+ nr_records = nr_records + le16_to_cpu(po->count);
+ if (nr_records >= cxlds->poison.max_errors) {
+ dev_dbg(&cxlmd->dev, "Max Error Records reached: %d\n",
+ nr_records);
+ break;
+ }
+ } while (po->flags & CXL_POISON_FLAG_MORE);
+
+ mutex_unlock(&cxlds->poison.lock);
+ return rc;
+}
+EXPORT_SYMBOL_NS_GPL(cxl_mem_get_poison, CXL);
+
+int cxl_poison_state_init(struct cxl_dev_state *cxlds)
+{
+ if (!test_bit(CXL_MEM_COMMAND_ID_GET_POISON, cxlds->enabled_cmds))
+ return 0;
+
+ cxlds->poison.payload_out = devm_kzalloc(cxlds->dev,
+ cxlds->payload_size,
+ GFP_KERNEL);
+ if (!cxlds->poison.payload_out)
+ return -ENOMEM;
+
+ mutex_init(&cxlds->poison.lock);
+ return 0;
+}
+EXPORT_SYMBOL_NS_GPL(cxl_poison_state_init, CXL);
+
struct cxl_dev_state *cxl_dev_state_create(struct device *dev)
{
struct cxl_dev_state *cxlds;
diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h
index ccbafc05a636..57a5999ddb35 100644
--- a/drivers/cxl/cxlmem.h
+++ b/drivers/cxl/cxlmem.h
@@ -215,6 +215,24 @@ struct cxl_event_state {
struct mutex log_lock;
};
+/**
+ * struct cxl_poison_state - Poison list retrieval
+ *
+ * @max_errors: Maximum media error records held in device cache
+ * @payload_out: The poison list payload returned by device
+ * @lock: Protect reads of the poison list
+ *
+ * Reads of the poison list are synchronized to ensure that a reader
+ * does not get an incomplete list because their request overlapped
+ * (was interrupted or preceded by) another read request of the same
+ * DPA range. CXL Spec 3.0 Section 8.2.9.8.4.1
+ */
+struct cxl_poison_state {
+ u32 max_errors;
+ struct cxl_mbox_poison_payload_out *payload_out;
+ struct mutex lock; /* Protect reads of poison list */
+};
+
/**
* struct cxl_dev_state - The driver device state
*
@@ -251,6 +269,7 @@ struct cxl_event_state {
* @serial: PCIe Device Serial Number
* @doe_mbs: PCI DOE mailbox array
* @event: event log driver state
+ * @poison: poison list retrieval info
* @mbox_send: @dev specific transport for transmitting mailbox commands
*
* See section 8.2.9.5.2 Capacity Configuration and Label Storage for
@@ -290,6 +309,7 @@ struct cxl_dev_state {
struct xarray doe_mbs;
struct cxl_event_state event;
+ struct cxl_poison_state poison;
int (*mbox_send)(struct cxl_dev_state *cxlds, struct cxl_mbox_cmd *cmd);
};
@@ -538,6 +558,50 @@ struct cxl_mbox_set_timestamp_in {
} __packed;
+/* Get Poison List CXL 3.0 Spec 8.2.9.8.4.1 */
+struct cxl_mbox_poison_payload_in {
+ __le64 offset;
+ __le64 length;
+} __packed;
+
+struct cxl_mbox_poison_payload_out {
+ u8 flags;
+ u8 rsvd1;
+ __le64 overflow_t;
+ __le16 count;
+ u8 rsvd2[20];
+ struct cxl_poison_record {
+ __le64 address;
+ __le32 length;
+ __le32 rsvd;
+ } __packed record[];
+} __packed;
+
+/*
+ * Get Poison List address field encodes the starting
+ * address of poison, and the source of the poison.
+ */
+#define CXL_POISON_START_MASK GENMASK_ULL(63, 6)
+#define CXL_POISON_SOURCE_MASK GENMASK(2, 0)
+
+/* Get Poison List record length is in units of 64 bytes */
+#define CXL_POISON_LEN_MULT 64
+
+/* Kernel defined maximum for a list of poison errors */
+#define CXL_POISON_LIST_MAX 1024
+
+/* Get Poison List: Payload out flags */
+#define CXL_POISON_FLAG_MORE BIT(0)
+#define CXL_POISON_FLAG_OVERFLOW BIT(1)
+#define CXL_POISON_FLAG_SCANNING BIT(2)
+
+/* Get Poison List: Poison Source */
+#define CXL_POISON_SOURCE_UNKNOWN 0
+#define CXL_POISON_SOURCE_EXTERNAL 1
+#define CXL_POISON_SOURCE_INTERNAL 2
+#define CXL_POISON_SOURCE_INJECTED 3
+#define CXL_POISON_SOURCE_VENDOR 7
+
/**
* struct cxl_mem_command - Driver representation of a memory device command
* @info: Command information as it exists for the UAPI
@@ -608,6 +672,9 @@ void set_exclusive_cxl_commands(struct cxl_dev_state *cxlds, unsigned long *cmds
void clear_exclusive_cxl_commands(struct cxl_dev_state *cxlds, unsigned long *cmds);
void cxl_mem_get_event_records(struct cxl_dev_state *cxlds, u32 status);
int cxl_set_timestamp(struct cxl_dev_state *cxlds);
+int cxl_poison_state_init(struct cxl_dev_state *cxlds);
+int cxl_mem_get_poison(struct cxl_memdev *cxlmd, u64 offset, u64 len,
+ struct cxl_region *cxlr);
#ifdef CONFIG_CXL_SUSPEND
void cxl_mem_active_inc(void);
diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
index 60b23624d167..827ea0895778 100644
--- a/drivers/cxl/pci.c
+++ b/drivers/cxl/pci.c
@@ -769,6 +769,10 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
if (rc)
return rc;
+ rc = cxl_poison_state_init(cxlds);
+ if (rc)
+ return rc;
+
rc = cxl_dev_state_identify(cxlds);
if (rc)
return rc;
--
2.37.3
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v9 2/6] cxl/trace: Add TRACE support for CXL media-error records
2023-03-20 4:31 [PATCH v9 0/6] CXL Poison List Retrieval & Tracing alison.schofield
2023-03-20 4:31 ` [PATCH v9 1/6] cxl/mbox: Add GET_POISON_LIST mailbox command alison.schofield
@ 2023-03-20 4:31 ` alison.schofield
2023-03-20 4:31 ` [PATCH v9 3/6] cxl/memdev: Add trigger_poison_list sysfs attribute alison.schofield
` (3 subsequent siblings)
5 siblings, 0 replies; 12+ messages in thread
From: alison.schofield @ 2023-03-20 4:31 UTC (permalink / raw)
To: Dan Williams, Ira Weiny, Vishal Verma, Dave Jiang, Ben Widawsky,
Steven Rostedt
Cc: Alison Schofield, linux-cxl, linux-kernel, Jonathan Cameron
From: Alison Schofield <alison.schofield@intel.com>
CXL devices may support the retrieval of a device poison list.
Add a new trace event that the CXL subsystem may use to log
the media-error records returned in the poison list.
Log each media-error record as a trace event of type 'cxl_poison'.
Signed-off-by: Alison Schofield <alison.schofield@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
drivers/cxl/core/mbox.c | 4 +-
drivers/cxl/core/trace.h | 84 ++++++++++++++++++++++++++++++++++++++++
2 files changed, 87 insertions(+), 1 deletion(-)
diff --git a/drivers/cxl/core/mbox.c b/drivers/cxl/core/mbox.c
index 0da0a30511f2..77fc811bdfed 100644
--- a/drivers/cxl/core/mbox.c
+++ b/drivers/cxl/core/mbox.c
@@ -1147,7 +1147,9 @@ int cxl_mem_get_poison(struct cxl_memdev *cxlmd, u64 offset, u64 len,
if (rc)
break;
- /* TODO TRACE the media error records */
+ for (int i = 0; i < le16_to_cpu(po->count); i++)
+ trace_cxl_poison(cxlmd, cxlr, &po->record[i],
+ po->flags, po->overflow_t);
/* Protect against an uncleared _FLAG_MORE */
nr_records = nr_records + le16_to_cpu(po->count);
diff --git a/drivers/cxl/core/trace.h b/drivers/cxl/core/trace.h
index 9b8d3d997834..33a22d26e742 100644
--- a/drivers/cxl/core/trace.h
+++ b/drivers/cxl/core/trace.h
@@ -7,6 +7,7 @@
#define _CXL_EVENTS_H
#include <linux/tracepoint.h>
+#include <linux/pci.h>
#include <asm-generic/unaligned.h>
#include <cxl.h>
@@ -600,6 +601,89 @@ TRACE_EVENT(cxl_memory_module,
)
);
+#define __show_poison_source(source) \
+ __print_symbolic(source, \
+ { CXL_POISON_SOURCE_UNKNOWN, "Unknown" }, \
+ { CXL_POISON_SOURCE_EXTERNAL, "External" }, \
+ { CXL_POISON_SOURCE_INTERNAL, "Internal" }, \
+ { CXL_POISON_SOURCE_INJECTED, "Injected" }, \
+ { CXL_POISON_SOURCE_VENDOR, "Vendor" })
+
+#define show_poison_source(source) \
+ (((source > CXL_POISON_SOURCE_INJECTED) && \
+ (source != CXL_POISON_SOURCE_VENDOR)) ? "Reserved" \
+ : __show_poison_source(source))
+
+#define show_poison_flags(flags) \
+ __print_flags(flags, "|", \
+ { CXL_POISON_FLAG_MORE, "More" }, \
+ { CXL_POISON_FLAG_OVERFLOW, "Overflow" }, \
+ { CXL_POISON_FLAG_SCANNING, "Scanning" })
+
+#define __cxl_poison_addr(record) \
+ (le64_to_cpu(record->address))
+#define cxl_poison_record_dpa(record) \
+ (__cxl_poison_addr(record) & CXL_POISON_START_MASK)
+#define cxl_poison_record_source(record) \
+ (__cxl_poison_addr(record) & CXL_POISON_SOURCE_MASK)
+#define cxl_poison_record_length(record) \
+ (le32_to_cpu(record->length) * CXL_POISON_LEN_MULT)
+#define cxl_poison_overflow(flags, time) \
+ (flags & CXL_POISON_FLAG_OVERFLOW ? le64_to_cpu(time) : 0)
+
+TRACE_EVENT(cxl_poison,
+
+ TP_PROTO(struct cxl_memdev *cxlmd, struct cxl_region *region,
+ const struct cxl_poison_record *record,
+ u8 flags, __le64 overflow_t),
+
+ TP_ARGS(cxlmd, region, record, flags, overflow_t),
+
+ TP_STRUCT__entry(
+ __string(memdev, dev_name(&cxlmd->dev))
+ __string(host, dev_name(cxlmd->dev.parent))
+ __field(u64, serial)
+ __string(region, region)
+ __field(u64, overflow_t)
+ __field(u64, dpa)
+ __field(u32, length)
+ __array(char, uuid, 16)
+ __field(u8, source)
+ __field(u8, flags)
+ ),
+
+ TP_fast_assign(
+ __assign_str(memdev, dev_name(&cxlmd->dev));
+ __assign_str(host, dev_name(cxlmd->dev.parent));
+ __entry->serial = cxlmd->cxlds->serial;
+ __entry->overflow_t = cxl_poison_overflow(flags, overflow_t);
+ __entry->dpa = cxl_poison_record_dpa(record);
+ __entry->length = cxl_poison_record_length(record);
+ __entry->source = cxl_poison_record_source(record);
+ __entry->flags = flags;
+ if (region) {
+ __assign_str(region, dev_name(®ion->dev));
+ memcpy(__entry->uuid, ®ion->params.uuid, 16);
+ } else {
+ __assign_str(region, "");
+ memset(__entry->uuid, 0, 16);
+ }
+ ),
+
+ TP_printk("memdev=%s host=%s serial=%lld region=%s region_uuid=%pU dpa=0x%llx length=0x%x source=%s flags=%s overflow_time=%llu",
+ __get_str(memdev),
+ __get_str(host),
+ __entry->serial,
+ __get_str(region),
+ __entry->uuid,
+ __entry->dpa,
+ __entry->length,
+ show_poison_source(__entry->source),
+ show_poison_flags(__entry->flags),
+ __entry->overflow_t
+ )
+);
+
#endif /* _CXL_EVENTS_H */
#define TRACE_INCLUDE_FILE trace
--
2.37.3
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v9 3/6] cxl/memdev: Add trigger_poison_list sysfs attribute
2023-03-20 4:31 [PATCH v9 0/6] CXL Poison List Retrieval & Tracing alison.schofield
2023-03-20 4:31 ` [PATCH v9 1/6] cxl/mbox: Add GET_POISON_LIST mailbox command alison.schofield
2023-03-20 4:31 ` [PATCH v9 2/6] cxl/trace: Add TRACE support for CXL media-error records alison.schofield
@ 2023-03-20 4:31 ` alison.schofield
2023-03-20 4:31 ` [PATCH v9 4/6] cxl/region: Provide region info to the cxl_poison trace event alison.schofield
` (2 subsequent siblings)
5 siblings, 0 replies; 12+ messages in thread
From: alison.schofield @ 2023-03-20 4:31 UTC (permalink / raw)
To: Dan Williams, Ira Weiny, Vishal Verma, Dave Jiang, Ben Widawsky,
Steven Rostedt
Cc: Alison Schofield, linux-cxl, linux-kernel, Jonathan Cameron
From: Alison Schofield <alison.schofield@intel.com>
When a boolean 'true' is written to this attribute the memdev driver
retrieves the poison list from the device. The list consists of
addresses that are poisoned, or would result in poison if accessed,
and the source of the poison. This attribute is only visible for
devices supporting the capability. The retrieved errors are logged
as kernel trace events with the label 'cxl_poison'.
Signed-off-by: Alison Schofield <alison.schofield@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
---
Documentation/ABI/testing/sysfs-bus-cxl | 14 ++++++++
drivers/cxl/core/memdev.c | 48 +++++++++++++++++++++++++
drivers/cxl/cxlmem.h | 5 ++-
drivers/cxl/mem.c | 36 +++++++++++++++++++
4 files changed, 102 insertions(+), 1 deletion(-)
diff --git a/Documentation/ABI/testing/sysfs-bus-cxl b/Documentation/ABI/testing/sysfs-bus-cxl
index 3acf2f17a73f..02776fee6d4c 100644
--- a/Documentation/ABI/testing/sysfs-bus-cxl
+++ b/Documentation/ABI/testing/sysfs-bus-cxl
@@ -415,3 +415,17 @@ Description:
1), and checks that the hardware accepts the commit request.
Reading this value indicates whether the region is committed or
not.
+
+
+What: /sys/bus/cxl/devices/memX/trigger_poison_list
+Date: March, 2023
+KernelVersion: v6.4
+Contact: linux-cxl@vger.kernel.org
+Description:
+ (WO) When a boolean 'true' is written to this attribute the
+ memdev driver retrieves the poison list from the device. The
+ list consists of addresses that are poisoned, or would result
+ in poison if accessed, and the source of the poison. This
+ attribute is only visible for devices supporting the
+ capability. The retrieved errors are logged as kernel
+ trace events with the label 'cxl_poison'.
diff --git a/drivers/cxl/core/memdev.c b/drivers/cxl/core/memdev.c
index 0af8856936dc..5ef40c36f1a3 100644
--- a/drivers/cxl/core/memdev.c
+++ b/drivers/cxl/core/memdev.c
@@ -106,6 +106,53 @@ static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
}
static DEVICE_ATTR_RO(numa_node);
+static int cxl_get_poison_by_memdev(struct cxl_memdev *cxlmd)
+{
+ struct cxl_dev_state *cxlds = cxlmd->cxlds;
+ u64 offset, length;
+ int rc = 0;
+
+ /* CXL 3.0 Spec 8.2.9.8.4.1 Separate pmem and ram poison requests */
+ if (resource_size(&cxlds->pmem_res)) {
+ offset = cxlds->pmem_res.start;
+ length = resource_size(&cxlds->pmem_res);
+ rc = cxl_mem_get_poison(cxlmd, offset, length, NULL);
+ if (rc)
+ return rc;
+ }
+ if (resource_size(&cxlds->ram_res)) {
+ offset = cxlds->ram_res.start;
+ length = resource_size(&cxlds->ram_res);
+ rc = cxl_mem_get_poison(cxlmd, offset, length, NULL);
+ /*
+ * Invalid Physical Address is not an error for
+ * volatile addresses. Device support is optional.
+ */
+ if (rc == -EFAULT)
+ rc = 0;
+ }
+ return rc;
+}
+
+ssize_t cxl_trigger_poison_list(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t len)
+{
+ struct cxl_memdev *cxlmd = to_cxl_memdev(dev);
+ bool trigger;
+ int rc;
+
+ if (kstrtobool(buf, &trigger) || !trigger)
+ return -EINVAL;
+
+ down_read(&cxl_dpa_rwsem);
+ rc = cxl_get_poison_by_memdev(cxlmd);
+ up_read(&cxl_dpa_rwsem);
+
+ return rc ? rc : len;
+}
+EXPORT_SYMBOL_NS_GPL(cxl_trigger_poison_list, CXL);
+
static struct attribute *cxl_memdev_attributes[] = {
&dev_attr_serial.attr,
&dev_attr_firmware_version.attr,
@@ -130,6 +177,7 @@ static umode_t cxl_memdev_visible(struct kobject *kobj, struct attribute *a,
{
if (!IS_ENABLED(CONFIG_NUMA) && a == &dev_attr_numa_node.attr)
return 0;
+
return a->mode;
}
diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h
index 57a5999ddb35..5febaa3f9b04 100644
--- a/drivers/cxl/cxlmem.h
+++ b/drivers/cxl/cxlmem.h
@@ -145,7 +145,7 @@ struct cxl_mbox_cmd {
C(FWROLLBACK, -ENXIO, "rolled back to the previous active FW"), \
C(FWRESET, -ENXIO, "FW failed to activate, needs cold reset"), \
C(HANDLE, -ENXIO, "one or more Event Record Handles were invalid"), \
- C(PADDR, -ENXIO, "physical address specified is invalid"), \
+ C(PADDR, -EFAULT, "physical address specified is invalid"), \
C(POISONLMT, -ENXIO, "poison injection limit has been reached"), \
C(MEDIAFAILURE, -ENXIO, "permanent issue with the media"), \
C(ABORT, -ENXIO, "background cmd was aborted by device"), \
@@ -675,6 +675,9 @@ int cxl_set_timestamp(struct cxl_dev_state *cxlds);
int cxl_poison_state_init(struct cxl_dev_state *cxlds);
int cxl_mem_get_poison(struct cxl_memdev *cxlmd, u64 offset, u64 len,
struct cxl_region *cxlr);
+ssize_t cxl_trigger_poison_list(struct device *dev,
+ struct device_attribute *attr, const char *buf,
+ size_t len);
#ifdef CONFIG_CXL_SUSPEND
void cxl_mem_active_inc(void);
diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c
index 39c4b54f0715..576f5b691589 100644
--- a/drivers/cxl/mem.c
+++ b/drivers/cxl/mem.c
@@ -176,10 +176,46 @@ static int cxl_mem_probe(struct device *dev)
return devm_add_action_or_reset(dev, enable_suspend, NULL);
}
+static ssize_t trigger_poison_list_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t len)
+{
+ return cxl_trigger_poison_list(dev, attr, buf, len);
+}
+
+static DEVICE_ATTR_WO(trigger_poison_list);
+
+static umode_t cxl_mem_visible(struct kobject *kobj, struct attribute *a, int n)
+{
+ if (a == &dev_attr_trigger_poison_list.attr) {
+ struct device *dev = kobj_to_dev(kobj);
+
+ if (!test_bit(CXL_MEM_COMMAND_ID_GET_POISON,
+ to_cxl_memdev(dev)->cxlds->enabled_cmds))
+ return 0;
+ }
+ return a->mode;
+}
+
+static struct attribute *cxl_mem_attrs[] = {
+ &dev_attr_trigger_poison_list.attr,
+ NULL
+};
+
+static struct attribute_group cxl_mem_group = {
+ .attrs = cxl_mem_attrs,
+ .is_visible = cxl_mem_visible,
+};
+
+__ATTRIBUTE_GROUPS(cxl_mem);
+
static struct cxl_driver cxl_mem_driver = {
.name = "cxl_mem",
.probe = cxl_mem_probe,
.id = CXL_DEVICE_MEMORY_EXPANDER,
+ .drv = {
+ .dev_groups = cxl_mem_groups,
+ },
};
module_cxl_driver(cxl_mem_driver);
--
2.37.3
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v9 4/6] cxl/region: Provide region info to the cxl_poison trace event
2023-03-20 4:31 [PATCH v9 0/6] CXL Poison List Retrieval & Tracing alison.schofield
` (2 preceding siblings ...)
2023-03-20 4:31 ` [PATCH v9 3/6] cxl/memdev: Add trigger_poison_list sysfs attribute alison.schofield
@ 2023-03-20 4:31 ` alison.schofield
2023-03-20 15:53 ` Jonathan Cameron
2023-03-20 4:31 ` [PATCH v9 5/6] cxl/trace: Add an HPA to cxl_poison trace events alison.schofield
2023-03-20 4:31 ` [PATCH v9 6/6] tools/testing/cxl: Mock support for Get Poison List alison.schofield
5 siblings, 1 reply; 12+ messages in thread
From: alison.schofield @ 2023-03-20 4:31 UTC (permalink / raw)
To: Dan Williams, Ira Weiny, Vishal Verma, Dave Jiang, Ben Widawsky,
Steven Rostedt
Cc: Alison Schofield, linux-cxl, linux-kernel, Jonathan Cameron
From: Alison Schofield <alison.schofield@intel.com>
User space may need to know which region, if any, maps the poison
address(es) logged in a cxl_poison trace event. Since the mapping
of DPAs (device physical addresses) to a region can change, the
kernel must provide this information at the time the poison list
is read. The event informs user space that at event <timestamp>
this <region> mapped to this <DPA>, which is poisoned.
The cxl_poison trace event is already wired up to log the region
name and uuid if it receives param 'struct cxl_region'.
In order to provide that cxl_region, add another method for gathering
poison - by committed endpoint decoder mappings. This method is only
available with CONFIG_CXL_REGION and is only used if a region actually
maps the memdev where poison is being read. After the region driver
reads the poison list for all the mapped resources, control returns
to the memdev driver, where poison is read for any remaining unmapped
resources.
Mixed mode decoders are not currently supported in Linux. Add a debug
message to the poison request path. That will serve as an alert that
poison list retrieval needs to add support for mixed mode.
The default method remains: read the poison by memdev resource.
Signed-off-by: Alison Schofield <alison.schofield@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
drivers/cxl/core/core.h | 11 +++++++
drivers/cxl/core/memdev.c | 64 +++++++++++++++++++++++++++++++++++++--
drivers/cxl/core/region.c | 63 ++++++++++++++++++++++++++++++++++++++
3 files changed, 136 insertions(+), 2 deletions(-)
diff --git a/drivers/cxl/core/core.h b/drivers/cxl/core/core.h
index cde475e13216..3d1b38255ab4 100644
--- a/drivers/cxl/core/core.h
+++ b/drivers/cxl/core/core.h
@@ -25,7 +25,12 @@ void cxl_decoder_kill_region(struct cxl_endpoint_decoder *cxled);
#define CXL_DAX_REGION_TYPE(x) (&cxl_dax_region_type)
int cxl_region_init(void);
void cxl_region_exit(void);
+int cxl_get_poison_by_endpoint(struct device *dev, void *data);
#else
+static inline int cxl_get_poison_by_endpoint(struct device *dev, void *data)
+{
+ return 0;
+}
static inline void cxl_decoder_kill_region(struct cxl_endpoint_decoder *cxled)
{
}
@@ -64,4 +69,10 @@ int cxl_memdev_init(void);
void cxl_memdev_exit(void);
void cxl_mbox_init(void);
+struct cxl_trigger_poison_context {
+ struct cxl_port *port;
+ enum cxl_decoder_mode mode;
+ u64 offset;
+};
+
#endif /* __CXL_CORE_H__ */
diff --git a/drivers/cxl/core/memdev.c b/drivers/cxl/core/memdev.c
index 5ef40c36f1a3..0b8b8996e588 100644
--- a/drivers/cxl/core/memdev.c
+++ b/drivers/cxl/core/memdev.c
@@ -106,6 +106,47 @@ static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
}
static DEVICE_ATTR_RO(numa_node);
+static int cxl_get_poison_unmapped(struct cxl_memdev *cxlmd,
+ struct cxl_trigger_poison_context *ctx)
+{
+ struct cxl_dev_state *cxlds = cxlmd->cxlds;
+ u64 offset, length;
+ int rc = 0;
+
+ /*
+ * Collect poison for the remaining unmapped resources
+ * after poison is collected by committed endpoints.
+ *
+ * Knowing that PMEM must always follow RAM, get poison
+ * for unmapped resources based on the last decoder's mode:
+ * ram: scan remains of ram range, then any pmem range
+ * pmem: scan remains of pmem range
+ */
+
+ if (ctx->mode == CXL_DECODER_RAM) {
+ offset = ctx->offset;
+ length = resource_size(&cxlds->ram_res) - offset;
+ rc = cxl_mem_get_poison(cxlmd, offset, length, NULL);
+ if (rc == -EFAULT)
+ rc = 0;
+ if (rc)
+ return rc;
+ }
+ if (ctx->mode == CXL_DECODER_PMEM) {
+ offset = ctx->offset;
+ length = resource_size(&cxlds->dpa_res) - offset;
+ if (!length)
+ return 0;
+ } else if (resource_size(&cxlds->pmem_res)) {
+ offset = cxlds->pmem_res.start;
+ length = resource_size(&cxlds->pmem_res);
+ } else {
+ return 0;
+ }
+
+ return cxl_mem_get_poison(cxlmd, offset, length, NULL);
+}
+
static int cxl_get_poison_by_memdev(struct cxl_memdev *cxlmd)
{
struct cxl_dev_state *cxlds = cxlmd->cxlds;
@@ -139,17 +180,36 @@ ssize_t cxl_trigger_poison_list(struct device *dev,
const char *buf, size_t len)
{
struct cxl_memdev *cxlmd = to_cxl_memdev(dev);
+ struct cxl_trigger_poison_context ctx;
+ struct cxl_port *port;
bool trigger;
int rc;
if (kstrtobool(buf, &trigger) || !trigger)
return -EINVAL;
+ port = dev_get_drvdata(&cxlmd->dev);
+ if (!port || !is_cxl_endpoint(port))
+ return -EINVAL;
+
down_read(&cxl_dpa_rwsem);
- rc = cxl_get_poison_by_memdev(cxlmd);
+ if (port->commit_end == -1) {
+ /* No regions mapped to this memdev */
+ rc = cxl_get_poison_by_memdev(cxlmd);
+ } else {
+ /* Regions mapped, collect poison by endpoint */
+ ctx = (struct cxl_trigger_poison_context) {
+ .port = port,
+ };
+ rc = device_for_each_child(&port->dev, &ctx,
+ cxl_get_poison_by_endpoint);
+ if (rc == 1)
+ rc = cxl_get_poison_unmapped(cxlmd, &ctx);
+ }
+
up_read(&cxl_dpa_rwsem);
-
return rc ? rc : len;
+
}
EXPORT_SYMBOL_NS_GPL(cxl_trigger_poison_list, CXL);
diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
index f29028148806..4c4d3a6d631d 100644
--- a/drivers/cxl/core/region.c
+++ b/drivers/cxl/core/region.c
@@ -2213,6 +2213,69 @@ struct cxl_pmem_region *to_cxl_pmem_region(struct device *dev)
}
EXPORT_SYMBOL_NS_GPL(to_cxl_pmem_region, CXL);
+int cxl_get_poison_by_endpoint(struct device *dev, void *arg)
+{
+ struct cxl_trigger_poison_context *ctx = arg;
+ struct cxl_endpoint_decoder *cxled;
+ struct cxl_port *port = ctx->port;
+ struct cxl_memdev *cxlmd;
+ u64 offset, length;
+ int rc = 0;
+
+ down_read(&cxl_region_rwsem);
+
+ if (!is_endpoint_decoder(dev))
+ goto out;
+
+ cxled = to_cxl_endpoint_decoder(dev);
+ if (!cxled->dpa_res || !resource_size(cxled->dpa_res))
+ goto out;
+
+ /*
+ * Regions are only created with single mode decoders: pmem or ram.
+ * Linux does not currently support mixed mode decoders. This means
+ * that reading poison per endpoint decoder adheres to the spec
+ * requirement that poison reads of pmem and ram must be separated.
+ * CXL 3.0 Spec 8.2.9.8.4.1
+ *
+ * Watch for future support of mixed with a dev_dbg() msg.
+ */
+ if (cxled->mode == CXL_DECODER_MIXED) {
+ dev_dbg(dev, "poison list read unsupported in mixed mode\n");
+ goto out;
+ }
+
+ cxlmd = cxled_to_memdev(cxled);
+ if (cxled->skip) {
+ offset = cxled->dpa_res->start - cxled->skip;
+ length = cxled->skip;
+ rc = cxl_mem_get_poison(cxlmd, offset, length, NULL);
+ if (rc == -EFAULT && cxled->mode == CXL_DECODER_RAM)
+ rc = 0;
+ if (rc)
+ goto out;
+ }
+
+ offset = cxled->dpa_res->start;
+ length = cxled->dpa_res->end - offset + 1;
+ rc = cxl_mem_get_poison(cxlmd, offset, length, cxled->cxld.region);
+ if (rc == -EFAULT && cxled->mode == CXL_DECODER_RAM)
+ rc = 0;
+ if (rc)
+ goto out;
+
+ /* Iterate until commit_end is reached */
+ if (cxled->cxld.id == port->commit_end)
+ rc = 1;
+
+ /* ctx informs the memdev driver of last read poison */
+ ctx->mode = cxled->mode;
+ ctx->offset = cxled->dpa_res->end + 1;
+out:
+ up_read(&cxl_region_rwsem);
+ return rc;
+}
+
static struct lock_class_key cxl_pmem_region_key;
static struct cxl_pmem_region *cxl_pmem_region_alloc(struct cxl_region *cxlr)
--
2.37.3
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v9 4/6] cxl/region: Provide region info to the cxl_poison trace event
2023-03-20 4:31 ` [PATCH v9 4/6] cxl/region: Provide region info to the cxl_poison trace event alison.schofield
@ 2023-03-20 15:53 ` Jonathan Cameron
2023-03-20 19:12 ` Alison Schofield
0 siblings, 1 reply; 12+ messages in thread
From: Jonathan Cameron @ 2023-03-20 15:53 UTC (permalink / raw)
To: alison.schofield
Cc: Dan Williams, Ira Weiny, Vishal Verma, Dave Jiang, Ben Widawsky,
Steven Rostedt, linux-cxl, linux-kernel
On Sun, 19 Mar 2023 21:31:49 -0700
alison.schofield@intel.com wrote:
> From: Alison Schofield <alison.schofield@intel.com>
>
> User space may need to know which region, if any, maps the poison
> address(es) logged in a cxl_poison trace event. Since the mapping
> of DPAs (device physical addresses) to a region can change, the
> kernel must provide this information at the time the poison list
> is read. The event informs user space that at event <timestamp>
> this <region> mapped to this <DPA>, which is poisoned.
>
> The cxl_poison trace event is already wired up to log the region
> name and uuid if it receives param 'struct cxl_region'.
>
> In order to provide that cxl_region, add another method for gathering
> poison - by committed endpoint decoder mappings. This method is only
> available with CONFIG_CXL_REGION and is only used if a region actually
> maps the memdev where poison is being read. After the region driver
> reads the poison list for all the mapped resources, control returns
> to the memdev driver, where poison is read for any remaining unmapped
> resources.
>
> Mixed mode decoders are not currently supported in Linux. Add a debug
> message to the poison request path. That will serve as an alert that
> poison list retrieval needs to add support for mixed mode.
>
> The default method remains: read the poison by memdev resource.
>
> Signed-off-by: Alison Schofield <alison.schofield@intel.com>
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Hi Alison,
I could be wrong but I don't think I gave a reviewed-by for this individual patch
(I made a note locally that I still needed to test v8 before doing so).
Doesn't matter in the end though..
Tested-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+ keep the RB.
A few whitespace changes have sneaked in here though that would be good to
clean up. (inline)
Thanks,
Jonathan
> ---
> drivers/cxl/core/core.h | 11 +++++++
> drivers/cxl/core/memdev.c | 64 +++++++++++++++++++++++++++++++++++++--
> drivers/cxl/core/region.c | 63 ++++++++++++++++++++++++++++++++++++++
> 3 files changed, 136 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/cxl/core/core.h b/drivers/cxl/core/core.h
> index cde475e13216..3d1b38255ab4 100644
> --- a/drivers/cxl/core/core.h
> +++ b/drivers/cxl/core/core.h
> @@ -25,7 +25,12 @@ void cxl_decoder_kill_region(struct cxl_endpoint_decoder *cxled);
> #define CXL_DAX_REGION_TYPE(x) (&cxl_dax_region_type)
> int cxl_region_init(void);
> void cxl_region_exit(void);
> +int cxl_get_poison_by_endpoint(struct device *dev, void *data);
> #else
> +static inline int cxl_get_poison_by_endpoint(struct device *dev, void *data)
> +{
> + return 0;
> +}
> static inline void cxl_decoder_kill_region(struct cxl_endpoint_decoder *cxled)
> {
> }
> @@ -64,4 +69,10 @@ int cxl_memdev_init(void);
> void cxl_memdev_exit(void);
> void cxl_mbox_init(void);
>
> +struct cxl_trigger_poison_context {
> + struct cxl_port *port;
> + enum cxl_decoder_mode mode;
> + u64 offset;
> +};
> +
> #endif /* __CXL_CORE_H__ */
> diff --git a/drivers/cxl/core/memdev.c b/drivers/cxl/core/memdev.c
> index 5ef40c36f1a3..0b8b8996e588 100644
> --- a/drivers/cxl/core/memdev.c
> +++ b/drivers/cxl/core/memdev.c
> @@ -106,6 +106,47 @@ static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
> }
> static DEVICE_ATTR_RO(numa_node);
>
> +static int cxl_get_poison_unmapped(struct cxl_memdev *cxlmd,
> + struct cxl_trigger_poison_context *ctx)
> +{
> + struct cxl_dev_state *cxlds = cxlmd->cxlds;
> + u64 offset, length;
> + int rc = 0;
> +
> + /*
> + * Collect poison for the remaining unmapped resources
> + * after poison is collected by committed endpoints.
> + *
> + * Knowing that PMEM must always follow RAM, get poison
> + * for unmapped resources based on the last decoder's mode:
> + * ram: scan remains of ram range, then any pmem range
> + * pmem: scan remains of pmem range
> + */
> +
> + if (ctx->mode == CXL_DECODER_RAM) {
> + offset = ctx->offset;
> + length = resource_size(&cxlds->ram_res) - offset;
> + rc = cxl_mem_get_poison(cxlmd, offset, length, NULL);
> + if (rc == -EFAULT)
> + rc = 0;
> + if (rc)
> + return rc;
> + }
> + if (ctx->mode == CXL_DECODER_PMEM) {
> + offset = ctx->offset;
> + length = resource_size(&cxlds->dpa_res) - offset;
> + if (!length)
> + return 0;
> + } else if (resource_size(&cxlds->pmem_res)) {
> + offset = cxlds->pmem_res.start;
> + length = resource_size(&cxlds->pmem_res);
> + } else {
> + return 0;
> + }
> +
> + return cxl_mem_get_poison(cxlmd, offset, length, NULL);
> +}
> +
> static int cxl_get_poison_by_memdev(struct cxl_memdev *cxlmd)
> {
> struct cxl_dev_state *cxlds = cxlmd->cxlds;
> @@ -139,17 +180,36 @@ ssize_t cxl_trigger_poison_list(struct device *dev,
> const char *buf, size_t len)
> {
> struct cxl_memdev *cxlmd = to_cxl_memdev(dev);
> + struct cxl_trigger_poison_context ctx;
> + struct cxl_port *port;
> bool trigger;
> int rc;
>
> if (kstrtobool(buf, &trigger) || !trigger)
> return -EINVAL;
>
> + port = dev_get_drvdata(&cxlmd->dev);
> + if (!port || !is_cxl_endpoint(port))
> + return -EINVAL;
> +
> down_read(&cxl_dpa_rwsem);
> - rc = cxl_get_poison_by_memdev(cxlmd);
> + if (port->commit_end == -1) {
> + /* No regions mapped to this memdev */
> + rc = cxl_get_poison_by_memdev(cxlmd);
> + } else {
> + /* Regions mapped, collect poison by endpoint */
> + ctx = (struct cxl_trigger_poison_context) {
> + .port = port,
> + };
> + rc = device_for_each_child(&port->dev, &ctx,
> + cxl_get_poison_by_endpoint);
> + if (rc == 1)
> + rc = cxl_get_poison_unmapped(cxlmd, &ctx);
> + }
> +
> up_read(&cxl_dpa_rwsem);
> -
I'd keep this one.
> return rc ? rc : len;
> +
Doesn't want to be here.
> }
> EXPORT_SYMBOL_NS_GPL(cxl_trigger_poison_list, CXL);
>
> diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
> index f29028148806..4c4d3a6d631d 100644
> --- a/drivers/cxl/core/region.c
> +++ b/drivers/cxl/core/region.c
> @@ -2213,6 +2213,69 @@ struct cxl_pmem_region *to_cxl_pmem_region(struct device *dev)
> }
> EXPORT_SYMBOL_NS_GPL(to_cxl_pmem_region, CXL);
>
> +int cxl_get_poison_by_endpoint(struct device *dev, void *arg)
> +{
> + struct cxl_trigger_poison_context *ctx = arg;
> + struct cxl_endpoint_decoder *cxled;
> + struct cxl_port *port = ctx->port;
> + struct cxl_memdev *cxlmd;
> + u64 offset, length;
> + int rc = 0;
> +
> + down_read(&cxl_region_rwsem);
> +
> + if (!is_endpoint_decoder(dev))
> + goto out;
> +
> + cxled = to_cxl_endpoint_decoder(dev);
> + if (!cxled->dpa_res || !resource_size(cxled->dpa_res))
> + goto out;
> +
> + /*
> + * Regions are only created with single mode decoders: pmem or ram.
> + * Linux does not currently support mixed mode decoders. This means
> + * that reading poison per endpoint decoder adheres to the spec
> + * requirement that poison reads of pmem and ram must be separated.
> + * CXL 3.0 Spec 8.2.9.8.4.1
> + *
> + * Watch for future support of mixed with a dev_dbg() msg.
> + */
> + if (cxled->mode == CXL_DECODER_MIXED) {
> + dev_dbg(dev, "poison list read unsupported in mixed mode\n");
> + goto out;
> + }
> +
> + cxlmd = cxled_to_memdev(cxled);
> + if (cxled->skip) {
> + offset = cxled->dpa_res->start - cxled->skip;
> + length = cxled->skip;
> + rc = cxl_mem_get_poison(cxlmd, offset, length, NULL);
> + if (rc == -EFAULT && cxled->mode == CXL_DECODER_RAM)
> + rc = 0;
> + if (rc)
> + goto out;
> + }
> +
> + offset = cxled->dpa_res->start;
> + length = cxled->dpa_res->end - offset + 1;
> + rc = cxl_mem_get_poison(cxlmd, offset, length, cxled->cxld.region);
> + if (rc == -EFAULT && cxled->mode == CXL_DECODER_RAM)
> + rc = 0;
> + if (rc)
> + goto out;
> +
> + /* Iterate until commit_end is reached */
> + if (cxled->cxld.id == port->commit_end)
> + rc = 1;
> +
> + /* ctx informs the memdev driver of last read poison */
> + ctx->mode = cxled->mode;
> + ctx->offset = cxled->dpa_res->end + 1;
> +out:
> + up_read(&cxl_region_rwsem);
> + return rc;
> +}
> +
> static struct lock_class_key cxl_pmem_region_key;
>
> static struct cxl_pmem_region *cxl_pmem_region_alloc(struct cxl_region *cxlr)
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v9 4/6] cxl/region: Provide region info to the cxl_poison trace event
2023-03-20 15:53 ` Jonathan Cameron
@ 2023-03-20 19:12 ` Alison Schofield
0 siblings, 0 replies; 12+ messages in thread
From: Alison Schofield @ 2023-03-20 19:12 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Dan Williams, Ira Weiny, Vishal Verma, Dave Jiang, Ben Widawsky,
Steven Rostedt, linux-cxl, linux-kernel
On Mon, Mar 20, 2023 at 03:53:06PM +0000, Jonathan Cameron wrote:
> On Sun, 19 Mar 2023 21:31:49 -0700
> alison.schofield@intel.com wrote:
>
> > From: Alison Schofield <alison.schofield@intel.com>
> >
> > User space may need to know which region, if any, maps the poison
> > address(es) logged in a cxl_poison trace event. Since the mapping
> > of DPAs (device physical addresses) to a region can change, the
> > kernel must provide this information at the time the poison list
> > is read. The event informs user space that at event <timestamp>
> > this <region> mapped to this <DPA>, which is poisoned.
> >
> > The cxl_poison trace event is already wired up to log the region
> > name and uuid if it receives param 'struct cxl_region'.
> >
> > In order to provide that cxl_region, add another method for gathering
> > poison - by committed endpoint decoder mappings. This method is only
> > available with CONFIG_CXL_REGION and is only used if a region actually
> > maps the memdev where poison is being read. After the region driver
> > reads the poison list for all the mapped resources, control returns
> > to the memdev driver, where poison is read for any remaining unmapped
> > resources.
> >
> > Mixed mode decoders are not currently supported in Linux. Add a debug
> > message to the poison request path. That will serve as an alert that
> > poison list retrieval needs to add support for mixed mode.
> >
> > The default method remains: read the poison by memdev resource.
> >
> > Signed-off-by: Alison Schofield <alison.schofield@intel.com>
> > Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> Hi Alison,
>
> I could be wrong but I don't think I gave a reviewed-by for this individual patch
> (I made a note locally that I still needed to test v8 before doing so).
> Doesn't matter in the end though..
>
> Tested-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> + keep the RB.
>
> A few whitespace changes have sneaked in here though that would be good to
> clean up. (inline)
Jonathan,
My apologies for applying the reviewed by tag.
Thanks for the tags now
I'll clean up the whitespace and try to keep it that way. There's
something about the spacing around returns, that my subconscious
struggles with. I'm not deliberately ignoring you ;)
Alison
>
> Thanks,
>
> Jonathan
>
> > ---
> > drivers/cxl/core/core.h | 11 +++++++
> > drivers/cxl/core/memdev.c | 64 +++++++++++++++++++++++++++++++++++++--
> > drivers/cxl/core/region.c | 63 ++++++++++++++++++++++++++++++++++++++
> > 3 files changed, 136 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/cxl/core/core.h b/drivers/cxl/core/core.h
> > index cde475e13216..3d1b38255ab4 100644
> > --- a/drivers/cxl/core/core.h
> > +++ b/drivers/cxl/core/core.h
> > @@ -25,7 +25,12 @@ void cxl_decoder_kill_region(struct cxl_endpoint_decoder *cxled);
> > #define CXL_DAX_REGION_TYPE(x) (&cxl_dax_region_type)
> > int cxl_region_init(void);
> > void cxl_region_exit(void);
> > +int cxl_get_poison_by_endpoint(struct device *dev, void *data);
> > #else
> > +static inline int cxl_get_poison_by_endpoint(struct device *dev, void *data)
> > +{
> > + return 0;
> > +}
> > static inline void cxl_decoder_kill_region(struct cxl_endpoint_decoder *cxled)
> > {
> > }
> > @@ -64,4 +69,10 @@ int cxl_memdev_init(void);
> > void cxl_memdev_exit(void);
> > void cxl_mbox_init(void);
> >
> > +struct cxl_trigger_poison_context {
> > + struct cxl_port *port;
> > + enum cxl_decoder_mode mode;
> > + u64 offset;
> > +};
> > +
> > #endif /* __CXL_CORE_H__ */
> > diff --git a/drivers/cxl/core/memdev.c b/drivers/cxl/core/memdev.c
> > index 5ef40c36f1a3..0b8b8996e588 100644
> > --- a/drivers/cxl/core/memdev.c
> > +++ b/drivers/cxl/core/memdev.c
> > @@ -106,6 +106,47 @@ static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
> > }
> > static DEVICE_ATTR_RO(numa_node);
> >
> > +static int cxl_get_poison_unmapped(struct cxl_memdev *cxlmd,
> > + struct cxl_trigger_poison_context *ctx)
> > +{
> > + struct cxl_dev_state *cxlds = cxlmd->cxlds;
> > + u64 offset, length;
> > + int rc = 0;
> > +
> > + /*
> > + * Collect poison for the remaining unmapped resources
> > + * after poison is collected by committed endpoints.
> > + *
> > + * Knowing that PMEM must always follow RAM, get poison
> > + * for unmapped resources based on the last decoder's mode:
> > + * ram: scan remains of ram range, then any pmem range
> > + * pmem: scan remains of pmem range
> > + */
> > +
> > + if (ctx->mode == CXL_DECODER_RAM) {
> > + offset = ctx->offset;
> > + length = resource_size(&cxlds->ram_res) - offset;
> > + rc = cxl_mem_get_poison(cxlmd, offset, length, NULL);
> > + if (rc == -EFAULT)
> > + rc = 0;
> > + if (rc)
> > + return rc;
> > + }
> > + if (ctx->mode == CXL_DECODER_PMEM) {
> > + offset = ctx->offset;
> > + length = resource_size(&cxlds->dpa_res) - offset;
> > + if (!length)
> > + return 0;
> > + } else if (resource_size(&cxlds->pmem_res)) {
> > + offset = cxlds->pmem_res.start;
> > + length = resource_size(&cxlds->pmem_res);
> > + } else {
> > + return 0;
> > + }
> > +
> > + return cxl_mem_get_poison(cxlmd, offset, length, NULL);
> > +}
> > +
> > static int cxl_get_poison_by_memdev(struct cxl_memdev *cxlmd)
> > {
> > struct cxl_dev_state *cxlds = cxlmd->cxlds;
> > @@ -139,17 +180,36 @@ ssize_t cxl_trigger_poison_list(struct device *dev,
> > const char *buf, size_t len)
> > {
> > struct cxl_memdev *cxlmd = to_cxl_memdev(dev);
> > + struct cxl_trigger_poison_context ctx;
> > + struct cxl_port *port;
> > bool trigger;
> > int rc;
> >
> > if (kstrtobool(buf, &trigger) || !trigger)
> > return -EINVAL;
> >
> > + port = dev_get_drvdata(&cxlmd->dev);
> > + if (!port || !is_cxl_endpoint(port))
> > + return -EINVAL;
> > +
> > down_read(&cxl_dpa_rwsem);
> > - rc = cxl_get_poison_by_memdev(cxlmd);
> > + if (port->commit_end == -1) {
> > + /* No regions mapped to this memdev */
> > + rc = cxl_get_poison_by_memdev(cxlmd);
> > + } else {
> > + /* Regions mapped, collect poison by endpoint */
> > + ctx = (struct cxl_trigger_poison_context) {
> > + .port = port,
> > + };
> > + rc = device_for_each_child(&port->dev, &ctx,
> > + cxl_get_poison_by_endpoint);
> > + if (rc == 1)
> > + rc = cxl_get_poison_unmapped(cxlmd, &ctx);
> > + }
> > +
> > up_read(&cxl_dpa_rwsem);
> > -
> I'd keep this one.
> > return rc ? rc : len;
> > +
> Doesn't want to be here.
>
> > }
> > EXPORT_SYMBOL_NS_GPL(cxl_trigger_poison_list, CXL);
> >
> > diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
> > index f29028148806..4c4d3a6d631d 100644
> > --- a/drivers/cxl/core/region.c
> > +++ b/drivers/cxl/core/region.c
> > @@ -2213,6 +2213,69 @@ struct cxl_pmem_region *to_cxl_pmem_region(struct device *dev)
> > }
> > EXPORT_SYMBOL_NS_GPL(to_cxl_pmem_region, CXL);
> >
> > +int cxl_get_poison_by_endpoint(struct device *dev, void *arg)
> > +{
> > + struct cxl_trigger_poison_context *ctx = arg;
> > + struct cxl_endpoint_decoder *cxled;
> > + struct cxl_port *port = ctx->port;
> > + struct cxl_memdev *cxlmd;
> > + u64 offset, length;
> > + int rc = 0;
> > +
> > + down_read(&cxl_region_rwsem);
> > +
> > + if (!is_endpoint_decoder(dev))
> > + goto out;
> > +
> > + cxled = to_cxl_endpoint_decoder(dev);
> > + if (!cxled->dpa_res || !resource_size(cxled->dpa_res))
> > + goto out;
> > +
> > + /*
> > + * Regions are only created with single mode decoders: pmem or ram.
> > + * Linux does not currently support mixed mode decoders. This means
> > + * that reading poison per endpoint decoder adheres to the spec
> > + * requirement that poison reads of pmem and ram must be separated.
> > + * CXL 3.0 Spec 8.2.9.8.4.1
> > + *
> > + * Watch for future support of mixed with a dev_dbg() msg.
> > + */
> > + if (cxled->mode == CXL_DECODER_MIXED) {
> > + dev_dbg(dev, "poison list read unsupported in mixed mode\n");
> > + goto out;
> > + }
> > +
> > + cxlmd = cxled_to_memdev(cxled);
> > + if (cxled->skip) {
> > + offset = cxled->dpa_res->start - cxled->skip;
> > + length = cxled->skip;
> > + rc = cxl_mem_get_poison(cxlmd, offset, length, NULL);
> > + if (rc == -EFAULT && cxled->mode == CXL_DECODER_RAM)
> > + rc = 0;
> > + if (rc)
> > + goto out;
> > + }
> > +
> > + offset = cxled->dpa_res->start;
> > + length = cxled->dpa_res->end - offset + 1;
> > + rc = cxl_mem_get_poison(cxlmd, offset, length, cxled->cxld.region);
> > + if (rc == -EFAULT && cxled->mode == CXL_DECODER_RAM)
> > + rc = 0;
> > + if (rc)
> > + goto out;
> > +
> > + /* Iterate until commit_end is reached */
> > + if (cxled->cxld.id == port->commit_end)
> > + rc = 1;
> > +
> > + /* ctx informs the memdev driver of last read poison */
> > + ctx->mode = cxled->mode;
> > + ctx->offset = cxled->dpa_res->end + 1;
> > +out:
> > + up_read(&cxl_region_rwsem);
> > + return rc;
> > +}
> > +
> > static struct lock_class_key cxl_pmem_region_key;
> >
> > static struct cxl_pmem_region *cxl_pmem_region_alloc(struct cxl_region *cxlr)
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v9 5/6] cxl/trace: Add an HPA to cxl_poison trace events
2023-03-20 4:31 [PATCH v9 0/6] CXL Poison List Retrieval & Tracing alison.schofield
` (3 preceding siblings ...)
2023-03-20 4:31 ` [PATCH v9 4/6] cxl/region: Provide region info to the cxl_poison trace event alison.schofield
@ 2023-03-20 4:31 ` alison.schofield
2023-03-20 16:30 ` Jonathan Cameron
2023-03-20 4:31 ` [PATCH v9 6/6] tools/testing/cxl: Mock support for Get Poison List alison.schofield
5 siblings, 1 reply; 12+ messages in thread
From: alison.schofield @ 2023-03-20 4:31 UTC (permalink / raw)
To: Dan Williams, Ira Weiny, Vishal Verma, Dave Jiang, Ben Widawsky,
Steven Rostedt
Cc: Alison Schofield, linux-cxl, linux-kernel, Jonathan Cameron
From: Alison Schofield <alison.schofield@intel.com>
When a cxl_poison trace event is reported for a region, the poisoned
Device Physical Address (DPA) can be translated to a Host Physical
Address (HPA) for consumption by user space.
Translate and add the resulting HPA to the cxl_poison trace event.
Follow the device decode logic as defined in the CXL Spec 3.0 Section
8.2.4.19.13.
If no region currently maps the poison, assign ULLONG_MAX to the
cxl_poison event hpa field.
Signed-off-by: Alison Schofield <alison.schofield@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
---
drivers/cxl/core/trace.c | 94 ++++++++++++++++++++++++++++++++++++++++
drivers/cxl/core/trace.h | 9 +++-
2 files changed, 102 insertions(+), 1 deletion(-)
diff --git a/drivers/cxl/core/trace.c b/drivers/cxl/core/trace.c
index 29ae7ce81dc5..d0403dc3c8ab 100644
--- a/drivers/cxl/core/trace.c
+++ b/drivers/cxl/core/trace.c
@@ -1,5 +1,99 @@
// SPDX-License-Identifier: GPL-2.0-only
/* Copyright(c) 2022 Intel Corporation. All rights reserved. */
+#include <cxl.h>
+#include "core.h"
+
#define CREATE_TRACE_POINTS
#include "trace.h"
+
+static bool cxl_is_hpa_in_range(u64 hpa, struct cxl_region *cxlr, int pos)
+{
+ struct cxl_region_params *p = &cxlr->params;
+ int gran = p->interleave_granularity;
+ int ways = p->interleave_ways;
+ u64 offset;
+
+ /* Is the hpa within this region at all */
+ if (hpa < p->res->start || hpa > p->res->end) {
+ dev_dbg(&cxlr->dev,
+ "Addr trans fail: hpa 0x%llx not in region\n", hpa);
+ return false;
+ }
+
+ /* Is the hpa in an expected chunk for its pos(-ition) */
+ offset = hpa - p->res->start;
+ offset = do_div(offset, gran * ways);
+ if ((offset >= pos * gran) && (offset < (pos + 1) * gran))
+ return true;
+
+ dev_dbg(&cxlr->dev,
+ "Addr trans fail: hpa 0x%llx not in expected chunk\n", hpa);
+
+ return false;
+}
+
+static u64 cxl_dpa_to_hpa(u64 dpa, struct cxl_region *cxlr,
+ struct cxl_endpoint_decoder *cxled)
+{
+ u64 dpa_offset, hpa_offset, bits_upper, mask_upper, hpa;
+ struct cxl_region_params *p = &cxlr->params;
+ int pos = cxled->pos;
+ u16 eig = 0;
+ u8 eiw = 0;
+
+ ways_to_eiw(p->interleave_ways, &eiw);
+ granularity_to_eig(p->interleave_granularity, &eig);
+
+ /*
+ * The device position in the region interleave set was removed
+ * from the offset at HPA->DPA translation. To reconstruct the
+ * HPA, place the 'pos' in the offset.
+ *
+ * The placement of 'pos' in the HPA is determined by interleave
+ * ways and granularity and is defined in the CXL Spec 3.0 Section
+ * 8.2.4.19.13 Implementation Note: Device Decode Logic
+ */
+
+ /* Remove the dpa base */
+ dpa_offset = dpa - cxl_dpa_resource_start(cxled);
+
+ mask_upper = GENMASK_ULL(51, eig + 8);
+
+ if (eiw < 8) {
+ hpa_offset = (dpa_offset & mask_upper) << eiw;
+ hpa_offset |= pos << (eig + 8);
+ } else {
+ bits_upper = (dpa_offset & mask_upper) >> (eig + 8);
+ bits_upper = bits_upper * 3;
+ hpa_offset = ((bits_upper << (eiw - 8)) + pos) << (eig + 8);
+ }
+
+ /* The lower bits remain unchanged */
+ hpa_offset |= dpa_offset & GENMASK_ULL(eig + 7, 0);
+
+ /* Apply the hpa_offset to the region base address */
+ hpa = hpa_offset + p->res->start;
+
+ if (!cxl_is_hpa_in_range(hpa, cxlr, cxled->pos))
+ return ULLONG_MAX;
+
+ return hpa;
+}
+
+u64 cxl_trace_hpa(struct cxl_region *cxlr, struct cxl_memdev *cxlmd,
+ u64 dpa)
+{
+ struct cxl_region_params *p = &cxlr->params;
+ struct cxl_endpoint_decoder *cxled = NULL;
+
+ for (int i = 0; i < p->nr_targets; i++) {
+ cxled = p->targets[i];
+ if (cxlmd == cxled_to_memdev(cxled))
+ break;
+ }
+ if (!cxled || cxlmd != cxled_to_memdev(cxled))
+ return ULLONG_MAX;
+
+ return cxl_dpa_to_hpa(dpa, cxlr, cxled);
+}
diff --git a/drivers/cxl/core/trace.h b/drivers/cxl/core/trace.h
index 33a22d26e742..25dbf52ac327 100644
--- a/drivers/cxl/core/trace.h
+++ b/drivers/cxl/core/trace.h
@@ -631,6 +631,8 @@ TRACE_EVENT(cxl_memory_module,
#define cxl_poison_overflow(flags, time) \
(flags & CXL_POISON_FLAG_OVERFLOW ? le64_to_cpu(time) : 0)
+u64 cxl_trace_hpa(struct cxl_region *cxlr, struct cxl_memdev *memdev, u64 dpa);
+
TRACE_EVENT(cxl_poison,
TP_PROTO(struct cxl_memdev *cxlmd, struct cxl_region *region,
@@ -645,6 +647,7 @@ TRACE_EVENT(cxl_poison,
__field(u64, serial)
__string(region, region)
__field(u64, overflow_t)
+ __field(u64, hpa)
__field(u64, dpa)
__field(u32, length)
__array(char, uuid, 16)
@@ -664,18 +667,22 @@ TRACE_EVENT(cxl_poison,
if (region) {
__assign_str(region, dev_name(®ion->dev));
memcpy(__entry->uuid, ®ion->params.uuid, 16);
+ __entry->hpa = cxl_trace_hpa(region, cxlmd,
+ __entry->dpa);
} else {
__assign_str(region, "");
memset(__entry->uuid, 0, 16);
+ __entry->hpa = ULLONG_MAX;
}
),
- TP_printk("memdev=%s host=%s serial=%lld region=%s region_uuid=%pU dpa=0x%llx length=0x%x source=%s flags=%s overflow_time=%llu",
+ TP_printk("memdev=%s host=%s serial=%lld region=%s region_uuid=%pU hpa=0x%llx dpa=0x%llx length=0x%x source=%s flags=%s overflow_time=%llu",
__get_str(memdev),
__get_str(host),
__entry->serial,
__get_str(region),
__entry->uuid,
+ __entry->hpa,
__entry->dpa,
__entry->length,
show_poison_source(__entry->source),
--
2.37.3
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v9 5/6] cxl/trace: Add an HPA to cxl_poison trace events
2023-03-20 4:31 ` [PATCH v9 5/6] cxl/trace: Add an HPA to cxl_poison trace events alison.schofield
@ 2023-03-20 16:30 ` Jonathan Cameron
2023-03-20 19:06 ` Alison Schofield
0 siblings, 1 reply; 12+ messages in thread
From: Jonathan Cameron @ 2023-03-20 16:30 UTC (permalink / raw)
To: alison.schofield
Cc: Dan Williams, Ira Weiny, Vishal Verma, Dave Jiang, Ben Widawsky,
Steven Rostedt, linux-cxl, linux-kernel
On Sun, 19 Mar 2023 21:31:50 -0700
alison.schofield@intel.com wrote:
> From: Alison Schofield <alison.schofield@intel.com>
>
> When a cxl_poison trace event is reported for a region, the poisoned
> Device Physical Address (DPA) can be translated to a Host Physical
> Address (HPA) for consumption by user space.
>
> Translate and add the resulting HPA to the cxl_poison trace event.
> Follow the device decode logic as defined in the CXL Spec 3.0 Section
> 8.2.4.19.13.
>
> If no region currently maps the poison, assign ULLONG_MAX to the
> cxl_poison event hpa field.
>
> Signed-off-by: Alison Schofield <alison.schofield@intel.com>
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Hi Alison,
I poked this with a few more test cases in QEMU and ran into a corner that
probably wants addressing.
What should the tracepoints contain if the poisoned DPA length of a single
record returned by the device is greater than the interleave granularity of
of an interleaved region?
That didn't matter until HPA was added as we were just reporting a DPA
base and length, but with the HPA present, the length is only in DPA space
not HPA space. Userspace can figure this out, but that's rather inelegant
and would require ras-daemon or similar to go and query the interleave granularity
and ways.
I think the best thing to do in this case would be to break the single returned DPA
base record up into multiple trace points at the interleave granual boundaries.
What do you think we should do?
Jonathan
> ---
> drivers/cxl/core/trace.c | 94 ++++++++++++++++++++++++++++++++++++++++
> drivers/cxl/core/trace.h | 9 +++-
> 2 files changed, 102 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/cxl/core/trace.c b/drivers/cxl/core/trace.c
> index 29ae7ce81dc5..d0403dc3c8ab 100644
> --- a/drivers/cxl/core/trace.c
> +++ b/drivers/cxl/core/trace.c
> @@ -1,5 +1,99 @@
> // SPDX-License-Identifier: GPL-2.0-only
> /* Copyright(c) 2022 Intel Corporation. All rights reserved. */
>
> +#include <cxl.h>
> +#include "core.h"
> +
> #define CREATE_TRACE_POINTS
> #include "trace.h"
> +
> +static bool cxl_is_hpa_in_range(u64 hpa, struct cxl_region *cxlr, int pos)
> +{
> + struct cxl_region_params *p = &cxlr->params;
> + int gran = p->interleave_granularity;
> + int ways = p->interleave_ways;
> + u64 offset;
> +
> + /* Is the hpa within this region at all */
> + if (hpa < p->res->start || hpa > p->res->end) {
> + dev_dbg(&cxlr->dev,
> + "Addr trans fail: hpa 0x%llx not in region\n", hpa);
> + return false;
> + }
> +
> + /* Is the hpa in an expected chunk for its pos(-ition) */
> + offset = hpa - p->res->start;
> + offset = do_div(offset, gran * ways);
> + if ((offset >= pos * gran) && (offset < (pos + 1) * gran))
> + return true;
> +
> + dev_dbg(&cxlr->dev,
> + "Addr trans fail: hpa 0x%llx not in expected chunk\n", hpa);
> +
> + return false;
> +}
> +
> +static u64 cxl_dpa_to_hpa(u64 dpa, struct cxl_region *cxlr,
> + struct cxl_endpoint_decoder *cxled)
> +{
> + u64 dpa_offset, hpa_offset, bits_upper, mask_upper, hpa;
> + struct cxl_region_params *p = &cxlr->params;
> + int pos = cxled->pos;
> + u16 eig = 0;
> + u8 eiw = 0;
> +
> + ways_to_eiw(p->interleave_ways, &eiw);
> + granularity_to_eig(p->interleave_granularity, &eig);
> +
> + /*
> + * The device position in the region interleave set was removed
> + * from the offset at HPA->DPA translation. To reconstruct the
> + * HPA, place the 'pos' in the offset.
> + *
> + * The placement of 'pos' in the HPA is determined by interleave
> + * ways and granularity and is defined in the CXL Spec 3.0 Section
> + * 8.2.4.19.13 Implementation Note: Device Decode Logic
> + */
> +
> + /* Remove the dpa base */
> + dpa_offset = dpa - cxl_dpa_resource_start(cxled);
> +
> + mask_upper = GENMASK_ULL(51, eig + 8);
> +
> + if (eiw < 8) {
> + hpa_offset = (dpa_offset & mask_upper) << eiw;
> + hpa_offset |= pos << (eig + 8);
> + } else {
> + bits_upper = (dpa_offset & mask_upper) >> (eig + 8);
> + bits_upper = bits_upper * 3;
> + hpa_offset = ((bits_upper << (eiw - 8)) + pos) << (eig + 8);
> + }
> +
> + /* The lower bits remain unchanged */
> + hpa_offset |= dpa_offset & GENMASK_ULL(eig + 7, 0);
> +
> + /* Apply the hpa_offset to the region base address */
> + hpa = hpa_offset + p->res->start;
> +
> + if (!cxl_is_hpa_in_range(hpa, cxlr, cxled->pos))
> + return ULLONG_MAX;
> +
> + return hpa;
> +}
> +
> +u64 cxl_trace_hpa(struct cxl_region *cxlr, struct cxl_memdev *cxlmd,
> + u64 dpa)
> +{
> + struct cxl_region_params *p = &cxlr->params;
> + struct cxl_endpoint_decoder *cxled = NULL;
> +
> + for (int i = 0; i < p->nr_targets; i++) {
> + cxled = p->targets[i];
> + if (cxlmd == cxled_to_memdev(cxled))
> + break;
> + }
> + if (!cxled || cxlmd != cxled_to_memdev(cxled))
> + return ULLONG_MAX;
> +
> + return cxl_dpa_to_hpa(dpa, cxlr, cxled);
> +}
> diff --git a/drivers/cxl/core/trace.h b/drivers/cxl/core/trace.h
> index 33a22d26e742..25dbf52ac327 100644
> --- a/drivers/cxl/core/trace.h
> +++ b/drivers/cxl/core/trace.h
> @@ -631,6 +631,8 @@ TRACE_EVENT(cxl_memory_module,
> #define cxl_poison_overflow(flags, time) \
> (flags & CXL_POISON_FLAG_OVERFLOW ? le64_to_cpu(time) : 0)
>
> +u64 cxl_trace_hpa(struct cxl_region *cxlr, struct cxl_memdev *memdev, u64 dpa);
> +
> TRACE_EVENT(cxl_poison,
>
> TP_PROTO(struct cxl_memdev *cxlmd, struct cxl_region *region,
> @@ -645,6 +647,7 @@ TRACE_EVENT(cxl_poison,
> __field(u64, serial)
> __string(region, region)
> __field(u64, overflow_t)
> + __field(u64, hpa)
> __field(u64, dpa)
> __field(u32, length)
> __array(char, uuid, 16)
> @@ -664,18 +667,22 @@ TRACE_EVENT(cxl_poison,
> if (region) {
> __assign_str(region, dev_name(®ion->dev));
> memcpy(__entry->uuid, ®ion->params.uuid, 16);
> + __entry->hpa = cxl_trace_hpa(region, cxlmd,
> + __entry->dpa);
> } else {
> __assign_str(region, "");
> memset(__entry->uuid, 0, 16);
> + __entry->hpa = ULLONG_MAX;
> }
> ),
>
> - TP_printk("memdev=%s host=%s serial=%lld region=%s region_uuid=%pU dpa=0x%llx length=0x%x source=%s flags=%s overflow_time=%llu",
> + TP_printk("memdev=%s host=%s serial=%lld region=%s region_uuid=%pU hpa=0x%llx dpa=0x%llx length=0x%x source=%s flags=%s overflow_time=%llu",
> __get_str(memdev),
> __get_str(host),
> __entry->serial,
> __get_str(region),
> __entry->uuid,
> + __entry->hpa,
> __entry->dpa,
> __entry->length,
> show_poison_source(__entry->source),
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v9 5/6] cxl/trace: Add an HPA to cxl_poison trace events
2023-03-20 16:30 ` Jonathan Cameron
@ 2023-03-20 19:06 ` Alison Schofield
2023-03-21 10:13 ` Jonathan Cameron
0 siblings, 1 reply; 12+ messages in thread
From: Alison Schofield @ 2023-03-20 19:06 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Dan Williams, Ira Weiny, Vishal Verma, Dave Jiang, Ben Widawsky,
Steven Rostedt, linux-cxl, linux-kernel
On Mon, Mar 20, 2023 at 04:30:59PM +0000, Jonathan Cameron wrote:
> On Sun, 19 Mar 2023 21:31:50 -0700
> alison.schofield@intel.com wrote:
>
> > From: Alison Schofield <alison.schofield@intel.com>
> >
> > When a cxl_poison trace event is reported for a region, the poisoned
> > Device Physical Address (DPA) can be translated to a Host Physical
> > Address (HPA) for consumption by user space.
> >
> > Translate and add the resulting HPA to the cxl_poison trace event.
> > Follow the device decode logic as defined in the CXL Spec 3.0 Section
> > 8.2.4.19.13.
> >
> > If no region currently maps the poison, assign ULLONG_MAX to the
> > cxl_poison event hpa field.
> >
> > Signed-off-by: Alison Schofield <alison.schofield@intel.com>
> > Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> > Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> > Reviewed-by: Ira Weiny <ira.weiny@intel.com>
>
> Hi Alison,
>
> I poked this with a few more test cases in QEMU and ran into a corner that
> probably wants addressing.
>
> What should the tracepoints contain if the poisoned DPA length of a single
> record returned by the device is greater than the interleave granularity of
> of an interleaved region?
Jonathan,
How does that happen now that we are reading poison by endpoint decoder,
when committed decoders exist?
If we are always bounding the poison read requests by the decoder
resource, then the device cannot give us a length that goes beyond
that decoder's mapping.
For an endpoint decoder - a contiguous DPA space maps to a contiguous
HPA space.
Or not?
Alison
>
> That didn't matter until HPA was added as we were just reporting a DPA
> base and length, but with the HPA present, the length is only in DPA space
> not HPA space. Userspace can figure this out, but that's rather inelegant
> and would require ras-daemon or similar to go and query the interleave granularity
> and ways.
>
> I think the best thing to do in this case would be to break the single returned DPA
> base record up into multiple trace points at the interleave granual boundaries.
>
> What do you think we should do?
>
> Jonathan
>
> > ---
> > drivers/cxl/core/trace.c | 94 ++++++++++++++++++++++++++++++++++++++++
> > drivers/cxl/core/trace.h | 9 +++-
> > 2 files changed, 102 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/cxl/core/trace.c b/drivers/cxl/core/trace.c
> > index 29ae7ce81dc5..d0403dc3c8ab 100644
> > --- a/drivers/cxl/core/trace.c
> > +++ b/drivers/cxl/core/trace.c
> > @@ -1,5 +1,99 @@
> > // SPDX-License-Identifier: GPL-2.0-only
> > /* Copyright(c) 2022 Intel Corporation. All rights reserved. */
> >
> > +#include <cxl.h>
> > +#include "core.h"
> > +
> > #define CREATE_TRACE_POINTS
> > #include "trace.h"
> > +
> > +static bool cxl_is_hpa_in_range(u64 hpa, struct cxl_region *cxlr, int pos)
> > +{
> > + struct cxl_region_params *p = &cxlr->params;
> > + int gran = p->interleave_granularity;
> > + int ways = p->interleave_ways;
> > + u64 offset;
> > +
> > + /* Is the hpa within this region at all */
> > + if (hpa < p->res->start || hpa > p->res->end) {
> > + dev_dbg(&cxlr->dev,
> > + "Addr trans fail: hpa 0x%llx not in region\n", hpa);
> > + return false;
> > + }
> > +
> > + /* Is the hpa in an expected chunk for its pos(-ition) */
> > + offset = hpa - p->res->start;
> > + offset = do_div(offset, gran * ways);
> > + if ((offset >= pos * gran) && (offset < (pos + 1) * gran))
> > + return true;
> > +
> > + dev_dbg(&cxlr->dev,
> > + "Addr trans fail: hpa 0x%llx not in expected chunk\n", hpa);
> > +
> > + return false;
> > +}
> > +
> > +static u64 cxl_dpa_to_hpa(u64 dpa, struct cxl_region *cxlr,
> > + struct cxl_endpoint_decoder *cxled)
> > +{
> > + u64 dpa_offset, hpa_offset, bits_upper, mask_upper, hpa;
> > + struct cxl_region_params *p = &cxlr->params;
> > + int pos = cxled->pos;
> > + u16 eig = 0;
> > + u8 eiw = 0;
> > +
> > + ways_to_eiw(p->interleave_ways, &eiw);
> > + granularity_to_eig(p->interleave_granularity, &eig);
> > +
> > + /*
> > + * The device position in the region interleave set was removed
> > + * from the offset at HPA->DPA translation. To reconstruct the
> > + * HPA, place the 'pos' in the offset.
> > + *
> > + * The placement of 'pos' in the HPA is determined by interleave
> > + * ways and granularity and is defined in the CXL Spec 3.0 Section
> > + * 8.2.4.19.13 Implementation Note: Device Decode Logic
> > + */
> > +
> > + /* Remove the dpa base */
> > + dpa_offset = dpa - cxl_dpa_resource_start(cxled);
> > +
> > + mask_upper = GENMASK_ULL(51, eig + 8);
> > +
> > + if (eiw < 8) {
> > + hpa_offset = (dpa_offset & mask_upper) << eiw;
> > + hpa_offset |= pos << (eig + 8);
> > + } else {
> > + bits_upper = (dpa_offset & mask_upper) >> (eig + 8);
> > + bits_upper = bits_upper * 3;
> > + hpa_offset = ((bits_upper << (eiw - 8)) + pos) << (eig + 8);
> > + }
> > +
> > + /* The lower bits remain unchanged */
> > + hpa_offset |= dpa_offset & GENMASK_ULL(eig + 7, 0);
> > +
> > + /* Apply the hpa_offset to the region base address */
> > + hpa = hpa_offset + p->res->start;
> > +
> > + if (!cxl_is_hpa_in_range(hpa, cxlr, cxled->pos))
> > + return ULLONG_MAX;
> > +
> > + return hpa;
> > +}
> > +
> > +u64 cxl_trace_hpa(struct cxl_region *cxlr, struct cxl_memdev *cxlmd,
> > + u64 dpa)
> > +{
> > + struct cxl_region_params *p = &cxlr->params;
> > + struct cxl_endpoint_decoder *cxled = NULL;
> > +
> > + for (int i = 0; i < p->nr_targets; i++) {
> > + cxled = p->targets[i];
> > + if (cxlmd == cxled_to_memdev(cxled))
> > + break;
> > + }
> > + if (!cxled || cxlmd != cxled_to_memdev(cxled))
> > + return ULLONG_MAX;
> > +
> > + return cxl_dpa_to_hpa(dpa, cxlr, cxled);
> > +}
> > diff --git a/drivers/cxl/core/trace.h b/drivers/cxl/core/trace.h
> > index 33a22d26e742..25dbf52ac327 100644
> > --- a/drivers/cxl/core/trace.h
> > +++ b/drivers/cxl/core/trace.h
> > @@ -631,6 +631,8 @@ TRACE_EVENT(cxl_memory_module,
> > #define cxl_poison_overflow(flags, time) \
> > (flags & CXL_POISON_FLAG_OVERFLOW ? le64_to_cpu(time) : 0)
> >
> > +u64 cxl_trace_hpa(struct cxl_region *cxlr, struct cxl_memdev *memdev, u64 dpa);
> > +
> > TRACE_EVENT(cxl_poison,
> >
> > TP_PROTO(struct cxl_memdev *cxlmd, struct cxl_region *region,
> > @@ -645,6 +647,7 @@ TRACE_EVENT(cxl_poison,
> > __field(u64, serial)
> > __string(region, region)
> > __field(u64, overflow_t)
> > + __field(u64, hpa)
> > __field(u64, dpa)
> > __field(u32, length)
> > __array(char, uuid, 16)
> > @@ -664,18 +667,22 @@ TRACE_EVENT(cxl_poison,
> > if (region) {
> > __assign_str(region, dev_name(®ion->dev));
> > memcpy(__entry->uuid, ®ion->params.uuid, 16);
> > + __entry->hpa = cxl_trace_hpa(region, cxlmd,
> > + __entry->dpa);
> > } else {
> > __assign_str(region, "");
> > memset(__entry->uuid, 0, 16);
> > + __entry->hpa = ULLONG_MAX;
> > }
> > ),
> >
> > - TP_printk("memdev=%s host=%s serial=%lld region=%s region_uuid=%pU dpa=0x%llx length=0x%x source=%s flags=%s overflow_time=%llu",
> > + TP_printk("memdev=%s host=%s serial=%lld region=%s region_uuid=%pU hpa=0x%llx dpa=0x%llx length=0x%x source=%s flags=%s overflow_time=%llu",
> > __get_str(memdev),
> > __get_str(host),
> > __entry->serial,
> > __get_str(region),
> > __entry->uuid,
> > + __entry->hpa,
> > __entry->dpa,
> > __entry->length,
> > show_poison_source(__entry->source),
>
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v9 5/6] cxl/trace: Add an HPA to cxl_poison trace events
2023-03-20 19:06 ` Alison Schofield
@ 2023-03-21 10:13 ` Jonathan Cameron
0 siblings, 0 replies; 12+ messages in thread
From: Jonathan Cameron @ 2023-03-21 10:13 UTC (permalink / raw)
To: Alison Schofield
Cc: Dan Williams, Ira Weiny, Vishal Verma, Dave Jiang, Ben Widawsky,
Steven Rostedt, linux-cxl, linux-kernel
On Mon, 20 Mar 2023 12:06:36 -0700
Alison Schofield <alison.schofield@intel.com> wrote:
> On Mon, Mar 20, 2023 at 04:30:59PM +0000, Jonathan Cameron wrote:
> > On Sun, 19 Mar 2023 21:31:50 -0700
> > alison.schofield@intel.com wrote:
> >
> > > From: Alison Schofield <alison.schofield@intel.com>
> > >
> > > When a cxl_poison trace event is reported for a region, the poisoned
> > > Device Physical Address (DPA) can be translated to a Host Physical
> > > Address (HPA) for consumption by user space.
> > >
> > > Translate and add the resulting HPA to the cxl_poison trace event.
> > > Follow the device decode logic as defined in the CXL Spec 3.0 Section
> > > 8.2.4.19.13.
> > >
> > > If no region currently maps the poison, assign ULLONG_MAX to the
> > > cxl_poison event hpa field.
> > >
> > > Signed-off-by: Alison Schofield <alison.schofield@intel.com>
> > > Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> > > Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> > > Reviewed-by: Ira Weiny <ira.weiny@intel.com>
> >
> > Hi Alison,
> >
> > I poked this with a few more test cases in QEMU and ran into a corner that
> > probably wants addressing.
> >
> > What should the tracepoints contain if the poisoned DPA length of a single
> > record returned by the device is greater than the interleave granularity of
> > of an interleaved region?
>
> Jonathan,
>
> How does that happen now that we are reading poison by endpoint decoder,
> when committed decoders exist?
>
> If we are always bounding the poison read requests by the decoder
> resource, then the device cannot give us a length that goes beyond
> that decoder's mapping.
>
> For an endpoint decoder - a contiguous DPA space maps to a contiguous
> HPA space.
>
> Or not?
Not unfortunately. Whilst the ranges are contiguous in the sense that no
other decoders on the end point will overlap with them, not all HPA in that
range will be routed to the EP by decoders in switches / host bridges / host.
Taking an example. HB with 2 RP, each with an type 3 direct attached (X and Y).
256 byte interleave across the EPs. First EP HDM decoders programmed for an
HPA base address of A, interleave ways = 2, interleave granularity = 256
Interleave set position for X = 0 , for Y = 1
DPA range 0 to 255 on X maps to HPA range A + 0 to A + 255
DPA range 0 to 255 on Y maps to HPA range A + 256 to A + 511
DPA range 256 to 511 on X maps to HPA range A + 512 to A + 767
DPA range 256 to 511 on Y maps to HPA range A + 768 to A + 1023
DPA range 512 to 767 on X maps to HAP Range A + 1024 to A + ...
So if we get a poison record from EP X for 0 to 1024 as a single record
(which the spec allows - QEMU injection via QMP can create this)
and we want report trace points that reflect the HPA + length then
they should be
DPA 0 HPA A , Length = 256
DPA 256 HPA A + 512, Length = 256
DPA 512 HPA A + 1024, Length = 256
DPA 768 HPA A + 1536, Length = 256
Today we report
DPA 0 HPA A Length = 1024
for equivalent on Y we report
DPA 0 HPA A + 256 Length = 1024
so if a consumer of the tracepoint wants to work out the effected HPA's it will
need to also know the interleave granularity and ways so it knows how to chunk
up the HPA space and what the jumps are between each chunk.
Jonathan
>
> Alison
>
> >
> > That didn't matter until HPA was added as we were just reporting a DPA
> > base and length, but with the HPA present, the length is only in DPA space
> > not HPA space. Userspace can figure this out, but that's rather inelegant
> > and would require ras-daemon or similar to go and query the interleave granularity
> > and ways.
> >
> > I think the best thing to do in this case would be to break the single returned DPA
> > base record up into multiple trace points at the interleave granual boundaries.
> >
> > What do you think we should do?
> >
> > Jonathan
> >
> > > ---
> > > drivers/cxl/core/trace.c | 94 ++++++++++++++++++++++++++++++++++++++++
> > > drivers/cxl/core/trace.h | 9 +++-
> > > 2 files changed, 102 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/cxl/core/trace.c b/drivers/cxl/core/trace.c
> > > index 29ae7ce81dc5..d0403dc3c8ab 100644
> > > --- a/drivers/cxl/core/trace.c
> > > +++ b/drivers/cxl/core/trace.c
> > > @@ -1,5 +1,99 @@
> > > // SPDX-License-Identifier: GPL-2.0-only
> > > /* Copyright(c) 2022 Intel Corporation. All rights reserved. */
> > >
> > > +#include <cxl.h>
> > > +#include "core.h"
> > > +
> > > #define CREATE_TRACE_POINTS
> > > #include "trace.h"
> > > +
> > > +static bool cxl_is_hpa_in_range(u64 hpa, struct cxl_region *cxlr, int pos)
> > > +{
> > > + struct cxl_region_params *p = &cxlr->params;
> > > + int gran = p->interleave_granularity;
> > > + int ways = p->interleave_ways;
> > > + u64 offset;
> > > +
> > > + /* Is the hpa within this region at all */
> > > + if (hpa < p->res->start || hpa > p->res->end) {
> > > + dev_dbg(&cxlr->dev,
> > > + "Addr trans fail: hpa 0x%llx not in region\n", hpa);
> > > + return false;
> > > + }
> > > +
> > > + /* Is the hpa in an expected chunk for its pos(-ition) */
> > > + offset = hpa - p->res->start;
> > > + offset = do_div(offset, gran * ways);
> > > + if ((offset >= pos * gran) && (offset < (pos + 1) * gran))
> > > + return true;
> > > +
> > > + dev_dbg(&cxlr->dev,
> > > + "Addr trans fail: hpa 0x%llx not in expected chunk\n", hpa);
> > > +
> > > + return false;
> > > +}
> > > +
> > > +static u64 cxl_dpa_to_hpa(u64 dpa, struct cxl_region *cxlr,
> > > + struct cxl_endpoint_decoder *cxled)
> > > +{
> > > + u64 dpa_offset, hpa_offset, bits_upper, mask_upper, hpa;
> > > + struct cxl_region_params *p = &cxlr->params;
> > > + int pos = cxled->pos;
> > > + u16 eig = 0;
> > > + u8 eiw = 0;
> > > +
> > > + ways_to_eiw(p->interleave_ways, &eiw);
> > > + granularity_to_eig(p->interleave_granularity, &eig);
> > > +
> > > + /*
> > > + * The device position in the region interleave set was removed
> > > + * from the offset at HPA->DPA translation. To reconstruct the
> > > + * HPA, place the 'pos' in the offset.
> > > + *
> > > + * The placement of 'pos' in the HPA is determined by interleave
> > > + * ways and granularity and is defined in the CXL Spec 3.0 Section
> > > + * 8.2.4.19.13 Implementation Note: Device Decode Logic
> > > + */
> > > +
> > > + /* Remove the dpa base */
> > > + dpa_offset = dpa - cxl_dpa_resource_start(cxled);
> > > +
> > > + mask_upper = GENMASK_ULL(51, eig + 8);
> > > +
> > > + if (eiw < 8) {
> > > + hpa_offset = (dpa_offset & mask_upper) << eiw;
> > > + hpa_offset |= pos << (eig + 8);
> > > + } else {
> > > + bits_upper = (dpa_offset & mask_upper) >> (eig + 8);
> > > + bits_upper = bits_upper * 3;
> > > + hpa_offset = ((bits_upper << (eiw - 8)) + pos) << (eig + 8);
> > > + }
> > > +
> > > + /* The lower bits remain unchanged */
> > > + hpa_offset |= dpa_offset & GENMASK_ULL(eig + 7, 0);
> > > +
> > > + /* Apply the hpa_offset to the region base address */
> > > + hpa = hpa_offset + p->res->start;
> > > +
> > > + if (!cxl_is_hpa_in_range(hpa, cxlr, cxled->pos))
> > > + return ULLONG_MAX;
> > > +
> > > + return hpa;
> > > +}
> > > +
> > > +u64 cxl_trace_hpa(struct cxl_region *cxlr, struct cxl_memdev *cxlmd,
> > > + u64 dpa)
> > > +{
> > > + struct cxl_region_params *p = &cxlr->params;
> > > + struct cxl_endpoint_decoder *cxled = NULL;
> > > +
> > > + for (int i = 0; i < p->nr_targets; i++) {
> > > + cxled = p->targets[i];
> > > + if (cxlmd == cxled_to_memdev(cxled))
> > > + break;
> > > + }
> > > + if (!cxled || cxlmd != cxled_to_memdev(cxled))
> > > + return ULLONG_MAX;
> > > +
> > > + return cxl_dpa_to_hpa(dpa, cxlr, cxled);
> > > +}
> > > diff --git a/drivers/cxl/core/trace.h b/drivers/cxl/core/trace.h
> > > index 33a22d26e742..25dbf52ac327 100644
> > > --- a/drivers/cxl/core/trace.h
> > > +++ b/drivers/cxl/core/trace.h
> > > @@ -631,6 +631,8 @@ TRACE_EVENT(cxl_memory_module,
> > > #define cxl_poison_overflow(flags, time) \
> > > (flags & CXL_POISON_FLAG_OVERFLOW ? le64_to_cpu(time) : 0)
> > >
> > > +u64 cxl_trace_hpa(struct cxl_region *cxlr, struct cxl_memdev *memdev, u64 dpa);
> > > +
> > > TRACE_EVENT(cxl_poison,
> > >
> > > TP_PROTO(struct cxl_memdev *cxlmd, struct cxl_region *region,
> > > @@ -645,6 +647,7 @@ TRACE_EVENT(cxl_poison,
> > > __field(u64, serial)
> > > __string(region, region)
> > > __field(u64, overflow_t)
> > > + __field(u64, hpa)
> > > __field(u64, dpa)
> > > __field(u32, length)
> > > __array(char, uuid, 16)
> > > @@ -664,18 +667,22 @@ TRACE_EVENT(cxl_poison,
> > > if (region) {
> > > __assign_str(region, dev_name(®ion->dev));
> > > memcpy(__entry->uuid, ®ion->params.uuid, 16);
> > > + __entry->hpa = cxl_trace_hpa(region, cxlmd,
> > > + __entry->dpa);
> > > } else {
> > > __assign_str(region, "");
> > > memset(__entry->uuid, 0, 16);
> > > + __entry->hpa = ULLONG_MAX;
> > > }
> > > ),
> > >
> > > - TP_printk("memdev=%s host=%s serial=%lld region=%s region_uuid=%pU dpa=0x%llx length=0x%x source=%s flags=%s overflow_time=%llu",
> > > + TP_printk("memdev=%s host=%s serial=%lld region=%s region_uuid=%pU hpa=0x%llx dpa=0x%llx length=0x%x source=%s flags=%s overflow_time=%llu",
> > > __get_str(memdev),
> > > __get_str(host),
> > > __entry->serial,
> > > __get_str(region),
> > > __entry->uuid,
> > > + __entry->hpa,
> > > __entry->dpa,
> > > __entry->length,
> > > show_poison_source(__entry->source),
> >
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v9 6/6] tools/testing/cxl: Mock support for Get Poison List
2023-03-20 4:31 [PATCH v9 0/6] CXL Poison List Retrieval & Tracing alison.schofield
` (4 preceding siblings ...)
2023-03-20 4:31 ` [PATCH v9 5/6] cxl/trace: Add an HPA to cxl_poison trace events alison.schofield
@ 2023-03-20 4:31 ` alison.schofield
5 siblings, 0 replies; 12+ messages in thread
From: alison.schofield @ 2023-03-20 4:31 UTC (permalink / raw)
To: Dan Williams, Ira Weiny, Vishal Verma, Dave Jiang, Ben Widawsky,
Steven Rostedt
Cc: Alison Schofield, linux-cxl, linux-kernel, Jonathan Cameron
From: Alison Schofield <alison.schofield@intel.com>
Make mock memdevs support the Get Poison List mailbox command.
Return a fake poison error record when the get poison list command
is issued.
This supports testing the kernel tracing and cxl list capabilities
for media errors.
Signed-off-by: Alison Schofield <alison.schofield@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
---
tools/testing/cxl/test/mem.c | 42 ++++++++++++++++++++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/tools/testing/cxl/test/mem.c b/tools/testing/cxl/test/mem.c
index 9263b04d35f7..2fa9c18d4c2c 100644
--- a/tools/testing/cxl/test/mem.c
+++ b/tools/testing/cxl/test/mem.c
@@ -7,6 +7,7 @@
#include <linux/delay.h>
#include <linux/sizes.h>
#include <linux/bits.h>
+#include <asm/unaligned.h>
#include <cxlmem.h>
#include "trace.h"
@@ -40,6 +41,10 @@ static struct cxl_cel_entry mock_cel[] = {
.opcode = cpu_to_le16(CXL_MBOX_OP_GET_HEALTH_INFO),
.effect = cpu_to_le16(0),
},
+ {
+ .opcode = cpu_to_le16(CXL_MBOX_OP_GET_POISON),
+ .effect = cpu_to_le16(0),
+ },
};
/* See CXL 2.0 Table 181 Get Health Info Output Payload */
@@ -471,6 +476,8 @@ static int mock_id(struct cxl_dev_state *cxlds, struct cxl_mbox_cmd *cmd)
cpu_to_le64(DEV_SIZE / CXL_CAPACITY_MULTIPLIER),
};
+ put_unaligned_le24(CXL_POISON_LIST_MAX, id.poison_list_max_mer);
+
if (cmd->size_out < sizeof(id))
return -EINVAL;
@@ -888,6 +895,34 @@ static int mock_health_info(struct cxl_dev_state *cxlds,
return 0;
}
+static int mock_get_poison(struct cxl_dev_state *cxlds,
+ struct cxl_mbox_cmd *cmd)
+{
+ struct cxl_mbox_poison_payload_in *pi = cmd->payload_in;
+
+ /* Mock one poison record at pi.offset for 64 bytes */
+ struct {
+ struct cxl_mbox_poison_payload_out po;
+ struct cxl_poison_record record;
+ } __packed mock_plist = {
+ .po = {
+ .count = cpu_to_le16(1),
+ },
+ .record = {
+ .length = cpu_to_le32(1),
+ .address = cpu_to_le64(le64_to_cpu(pi->offset) +
+ CXL_POISON_SOURCE_INJECTED),
+ },
+ };
+
+ if (cmd->size_out < sizeof(mock_plist))
+ return -EINVAL;
+
+ memcpy(cmd->payload_out, &mock_plist, sizeof(mock_plist));
+ cmd->size_out = sizeof(mock_plist);
+ return 0;
+}
+
static int cxl_mock_mbox_send(struct cxl_dev_state *cxlds, struct cxl_mbox_cmd *cmd)
{
struct device *dev = cxlds->dev;
@@ -942,6 +977,9 @@ static int cxl_mock_mbox_send(struct cxl_dev_state *cxlds, struct cxl_mbox_cmd *
case CXL_MBOX_OP_PASSPHRASE_SECURE_ERASE:
rc = mock_passphrase_secure_erase(cxlds, cmd);
break;
+ case CXL_MBOX_OP_GET_POISON:
+ rc = mock_get_poison(cxlds, cmd);
+ break;
default:
break;
}
@@ -1010,6 +1048,10 @@ static int cxl_mock_mem_probe(struct platform_device *pdev)
if (rc)
return rc;
+ rc = cxl_poison_state_init(cxlds);
+ if (rc)
+ return rc;
+
rc = cxl_dev_state_identify(cxlds);
if (rc)
return rc;
--
2.37.3
^ permalink raw reply related [flat|nested] 12+ messages in thread